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* OMAP3: control/PM: move padconf save code to mach-omap2/control.cPaul Walmsley2010-12-211-10/+1
| | | | | | | | | | | | | | | | | | | | | | Move the padconf save code from pm34xx.c to the System Control Module code in mach-omap2/control.c. This is part of the general push to move direct register access from middle-layer core code to low-level core code, so the middle-layer code can be abstracted to work on multiple platforms and cleaned up. In the medium-to-long term, this code should be called by the mux layer code, not the PM idle code. This is because, according to the TRM, saving the padconf only needs to be done when the padconf changes[1]. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Tony Lindgren <tony@atomide.com> Tested-by: Rajendra Nayak <rnayak@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> 1. OMAP34xx Multimedia Device Silicon Revision 3.1.x [Rev. ZH] [SWPU222H] Section 4.11.4 "Device Off-Mode Sequences"
* OMAP2+: powerdomain: move header file from plat-omap to mach-omap2Paul Walmsley2010-12-211-2/+4
| | | | | | | | | | | | | | | | | | | | The OMAP powerdomain code and data is all OMAP2+-specific. This seems unlikely to change any time soon. Move plat-omap/include/plat/powerdomain.h to mach-omap2/powerdomain.h. The primary point of doing this is to remove the temptation for unrelated upper-layer code to access powerdomain code and data directly. As part of this process, remove the references to powerdomain data from the GPIO "driver" and the OMAP PM no-op layer, both in plat-omap. Change the DSPBridge code to point to the new location for the powerdomain headers. The DSPBridge code should not be including the powerdomain headers; these should be removed. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Omar Ramirez Luna <omar.ramirez@ti.com> Cc: Felipe Contreras <felipe.contreras@gmail.com> Cc: Greg Kroah-Hartman <greg@kroah.com>
* OMAP2+: clockdomain: move header file from plat-omap to mach-omap2Paul Walmsley2010-12-211-1/+1
| | | | | | | | | | | | | | | | | | | | The OMAP clockdomain code and data is all OMAP2+-specific. This seems unlikely to change any time soon. Move plat-omap/include/plat/clockdomain.h to mach-omap2/clockdomain.h. The primary point of doing this is to remove the temptation for unrelated upper-layer code to access clockdomain code and data directly. DSPBridge also uses the clockdomain headers for some reason, so, modify it also. The DSPBridge code should not be including the clockdomain headers; these should be removed. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Omar Ramirez Luna <omar.ramirez@ti.com> Cc: Felipe Contreras <felipe.contreras@gmail.com> Cc: Greg Kroah-Hartman <greg@kroah.com> Tested-by: Rajendra Nayak <rnayak@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* OMAP2/3: PRM/CM: prefix OMAP2 PRM/CM functions with "omap2_"Paul Walmsley2010-12-211-71/+72
| | | | | | | | | | | | | | | | Now that OMAP4-specific PRCM functions have been added, distinguish the existing OMAP2/3-specific PRCM functions by prefixing them with "omap2_". This patch should not result in any functional change. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Jarkko Nikula <jhnikula@gmail.com> Cc: Peter Ujfalusi <peter.ujfalusi@nokia.com> Cc: Liam Girdwood <lrg@slimlogic.co.uk> Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Rajendra Nayak <rnayak@ti.com>
* OMAP3: PRM/CM: separate CM context save/restore; remove PRM context save/restorePaul Walmsley2010-12-211-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | The OMAP3 PRM module is in the WKUP powerdomain, which is always powered when the chip is powered, so it shouldn't be necessary to save and restore those PRM registers. Remove the PRM register save/restore code, which should save several microseconds during off-mode entry/exit, since PRM register accesses are relatively slow. While doing so, move the CM register save/restore code into CM-specific code. The CM module has been distinct from the PRM module since 2430. This patch includes some minor changes to pm34xx.c. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tero Kristo <tero.kristo@nokia.com> Cc: Kalle Jokiniemi <kalle.jokiniemi@digia.com> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Rajendra Nayak <rnayak@ti.com>
* OMAP2/3: PRCM: split OMAP2/3-specific PRCM code into OMAP2/3-specific filesPaul Walmsley2010-12-211-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for adding OMAP4-specific PRCM accessor/mutator functions, split the existing OMAP2/3 PRCM code into OMAP2/3-specific files. Most of what was in mach-omap2/{cm,prm}.{c,h} has now been moved into mach-omap2/{cm,prm}2xxx_3xxx.{c,h}, since it was OMAP2xxx/3xxx-specific. This process also requires the #includes in each of these files to be changed to reference the new file name. As part of doing so, add some comments into plat-omap/sram.c and plat-omap/mcbsp.c, which use "sideways includes", to indicate that these users of the PRM/CM includes should not be doing so. Thanks to Felipe Contreras <felipe.contreras@gmail.com> for comments on this patch. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Jarkko Nikula <jhnikula@gmail.com> Cc: Peter Ujfalusi <peter.ujfalusi@nokia.com> Cc: Liam Girdwood <lrg@slimlogic.co.uk> Cc: Omar Ramirez Luna <omar.ramirez@ti.com> Acked-by: Omar Ramirez Luna <omar.ramirez@ti.com> Cc: Felipe Contreras <felipe.contreras@gmail.com> Acked-by: Felipe Contreras <felipe.contreras@gmail.com> Cc: Greg Kroah-Hartman <greg@kroah.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com> Tested-by: Rajendra Nayak <rnayak@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* OMAP3: add comments for low power code errataJean Pihet2010-12-211-2/+2
| | | | | | | | | | | | | | | Errata covered: - 1.157 & 1.185 - i443 - i581 Tested on N900 and Beagleboard with full RET and OFF modes, using cpuidle and suspend. Signed-off-by: Jean Pihet <j-pihet@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3630: PM: Erratum i583: disable coreoff if < ES1.2Eduardo Valentin2010-12-211-3/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Limitation i583: Self_Refresh Exit issue after OFF mode Issue: When device is waking up from OFF mode, then SDRC state machine sends inappropriate sequence violating JEDEC standards. Impact: OMAP3630 < ES1.2 is impacted as follows depending on the platform: CS0: for 38.4MHz as internal sysclk, DDR content seen to be stable, while for all other sysclk frequencies, varied levels of instability seen based on varied parameters. CS1: impacted This patch takes option #3 as recommended by the Silicon erratum: Avoid core power domain transitioning to OFF mode. Power consumption impact is expected in this case. To do this, we route core OFF requests to RET request on the impacted revisions of silicon. Acked-by: Jean Pihet <j-pihet@ti.com> [nm@ti.com: rebased the code to 2.6.37-rc2- short circuit code changed a bit] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Eduardo Valentin <eduardo.valentin@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: PM: make omap3_cpuidle_update_states independent of enable_off_modeNishanth Menon2010-12-211-1/+1
| | | | | | | | | | | | | | Currently omap3_cpuidle_update_states makes whole sale decision on which C states to update based on enable_off_mode variable Instead, achieve the same functionality by independently providing mpu and core deepest states the system is allowed to achieve and update the idle states accordingly. Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> [khilman: fixed additional user of this API in OMAP CPUidle driver] Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3630: PM: Disable L2 cache while invalidating L2 cachePeter 'p2' De Schrijver2010-12-211-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | While coming out of MPU OSWR/OFF states, L2 controller is reseted. The reset behavior is implementation specific as per ARMv7 TRM and hence $L2 needs to be invalidated before it's use. Since the AUXCTRL register is also reconfigured, disable L2 cache before invalidating it and re-enables it afterwards. This is as per Cortex-A8 ARM documentation. Currently this is identified as being needed on OMAP3630 as the disable/enable is done from "public side" while, on OMAP3430, this is done in the "secure side". Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by: Jean Pihet <j-pihet@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [nm@ti.com: ported to 2.6.37-rc2, added hooks to enable the logic only on 3630] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Eduardo Valentin <eduardo.valentin@nokia.com> Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3630: PM: Erratum i608: disable RTANishanth Menon2010-12-211-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | Erratum id: i608 RTA (Retention Till Access) feature is not supported and leads to device stability issues when enabled. This impacts modules with embedded memories on OMAP3630 Workaround is to disable RTA on boot and coming out of core off. For disabling RTA coming out of off mode, we do this by overriding the restore pointer for 3630 as the first point of entry before caches are touched and is common for GP and HS devices. To disable earlier than this could be possible by modifying the PPA for HS devices, but not for GP devices. Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by: Jean Pihet <j-pihet@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [ambresh@ti.com: co-developer] Signed-off-by: Ambresh K <ambresh@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: pm: introduce errata handlingNishanth Menon2010-12-211-0/+9
| | | | | | | | | Introduce errata handling for OMAP3. This patch introduces errata variable and stub for initialization which will be filled up by follow-on patches. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP2+: disable idle early in the suspend sequenceJean Pihet2010-12-211-13/+2
| | | | | | | | | | | | | | | | | Some bad interaction between the idle and the suspend paths has been identified: the idle code is called during the suspend enter and exit sequences. This could cause corruption or lock-up of resources. The solution is to move the calls to disable_hlt at the very beginning of the suspend sequence (ex. in omap3_pm_begin instead of omap3_pm_prepare), and the call to enable_hlt at the very end of the suspend sequence (ex. in omap3_pm_end instead of omap3_pm_finish). Tested with RET and OFF on Beagle and OMAP3EVM. Signed-off-by: Jean Pihet <j-pihet@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP2+: PM/serial: fix console semaphore acquire during suspendKevin Hilman2010-12-091-7/+20
| | | | | | | | | | | | | | | | | | | | | | | | commit 0d8e2d0dad98a693bad88aea6876ac8b94ad95c6 (OMAP2+: PM/serial: hold console semaphore while OMAP UARTs are disabled) added use of the console semaphore to protect UARTs from being accessed after disabled during idle, but this causes problems in suspend. During suspend, the console semaphore is acquired by the console suspend method (console_suspend()) so the try_acquire_console_sem() will always fail and suspend will be aborted. To fix, introduce a check so the console semaphore is only attempted during idle, and not during suspend. Also use the same check so that the console semaphore is not prematurely released during resume. Thanks to Paul Walmsley for suggesting adding the same check during resume. Cc: Paul Walmsley <paul@pwsan.com> Tested-by: Jean Pihet <j-pihet@ti.com> Tested-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP2+: PM/serial: hold console semaphore while OMAP UARTs are disabledPaul Walmsley2010-11-241-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The console semaphore must be held while the OMAP UART devices are disabled, lest a console write cause an ARM abort (and a kernel crash) when the underlying console device is inaccessible. These crashes only occur when the console is on one of the OMAP internal serial ports. While this problem has been latent in the PM idle loop for some time, the crash was not triggerable with an unmodified kernel until commit 6f251e9db1093c187addc309b5f2f7fe3efd2995 ("OMAP: UART: omap_device conversions, remove implicit 8520 assumptions"). After this patch, a console write often occurs after the console UART has been disabled in the idle loop, crashing the system. Several users have encountered this bug: http://www.mail-archive.com/linux-omap@vger.kernel.org/msg38396.html http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36602.html The same commit also introduced new code that disabled the UARTs during init, in omap_serial_init_port(). The kernel will also crash in this code when earlyconsole and extra debugging is enabled: http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36411.html The minimal fix for the -rc series is to hold the console semaphore while the OMAP UARTs are disabled. This is a somewhat overbroad fix, since the console may not be located on an OMAP UART, as is the case with the GPMC UART on Zoom3. While it is technically possible to determine which devices the console or earlyconsole is actually running on, it is not a trivial problem to solve, and the code to do so is not really appropriate for the -rc series. The right long-term fix is to ensure that no code outside of the OMAP serial driver can disable an OMAP UART. As I understand it, code to implement this is under development by TI. This patch is a collaboration between Paul Walmsley <paul@pwsan.com> and Tony Lindgren <tony@atomide.com>. Thanks to Ming Lei <tom.leiming@gmail.com> and Pramod <pramod.gurav@ti.com> for their feedback on earlier versions of this patch. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Cc: Ming Lei <tom.leiming@gmail.com> Cc: Pramod <pramod.gurav@ti.com> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Jean Pihet <jean.pihet@newoldbits.com> Cc: Govindraj.R <govindraj.raja@ti.com>
* OMAP3: PM: fix scratchpad memory accesses for off-modeKevin Hilman2010-10-111-3/+3
| | | | | | | | | | | | | | | | | | | | Commit 914bab936fe0388a529079679e2f137aa4ff548d (OMAP: mach-omap2: Fix incorrect assignment warnings) changed a pointer from 'u32 *' to 'void *' without also fixing up the pointer arithmetic. Fix the scratchpad offsets so they are byte offsets instead of word offsets and thus work correctly with a void pointer base. Special thanks to Jean Pihet for taking the time track down this problem and propose an initial solution. Tested with off-idle and off-suspend on 36xx/Zoom3 and 34xx/omap3evm. Cc: Manjunath Kondaiah G <manjugk@ti.com> Reported-by: Jean Pihet <jean.pihet@newoldbits.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Tested-by: Jean Pihet <jean.pihet@newoldbits.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP: control: move plat-omap/control.h to mach-omap2/control.hPaul Walmsley2010-10-081-1/+1
| | | | | | | | | | | | | | | | | Only OMAP2+ platforms have the System Control Module (SCM) IP block. In the past, we've kept the SCM header file in plat-omap. This has led to abuse - device drivers including it; includes being added that create implicit dependencies on OMAP2+ builds; etc. In response, move the SCM headers into mach-omap2/. As part of this, remove the direct SCM access from the OMAP UDC driver. It was clearly broken. The UDC code needs an indepth review for use on OMAP2+ chips. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Cory Maccarrone <darkstar6262@gmail.com> Cc: Kyungmin Park <kyungmin.park@samsung.com>
* Merge branch 'pm-hwmods' of ↵Tony Lindgren2010-10-081-2/+15
|\ | | | | | | ssh://master.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-linus
| * OMAP3: PM: Add prepare idle and resume idle call for uart4Govindraj.R2010-09-291-0/+2
| | | | | | | | | | | | | | Add prepare idle and resume idle call for uart4 used by 3630. Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * OMAP3: PRCM: Consider UART4 for 3630 chip in prcm_setup_regsGovindraj.R2010-09-291-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | To standarize among other uarts (1 to 3), we shall now: - Enable uart4 autodile bit. - Enable uart4 wakeup in PER. - Allow uart4 to wakeup the MPU. Signed-off-by: Sergio Aguirre <saaguirre@ti.com> Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* | OMAP: mach-omap2: Fix incorrect assignment warningsManjunath Kondaiah G2010-10-081-1/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes below sparse warnings for incorrect assignments. arch/arm/mach-omap2/control.c:195:16: warning: incorrect type in assignment (different address spaces) arch/arm/mach-omap2/control.c:195:16: expected unsigned int [usertype] *v_addr arch/arm/mach-omap2/control.c:195:16: got void [noderef] <asn:2>*<noident> arch/arm/mach-omap2/control.c:199:25: warning: incorrect type in argument 1 (different address spaces) arch/arm/mach-omap2/control.c:199:25: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/control.c:199:25: got unsigned int [usertype] * arch/arm/mach-omap2/control.c:320:28: warning: incorrect type in assignment (different address spaces) arch/arm/mach-omap2/control.c:320:28: expected void *[noderef] <asn:2>scratchpad_address arch/arm/mach-omap2/control.c:320:28: got void [noderef] <asn:2>*<noident> arch/arm/mach-omap2/control.c:321:9: warning: incorrect type in argument 1 (different address spaces) arch/arm/mach-omap2/control.c:321:9: expected void volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/control.c:321:9: got void *[noderef] <asn:2>scratchpad_address arch/arm/mach-omap2/control.c:324:9: warning: incorrect type in argument 1 (different address spaces) arch/arm/mach-omap2/control.c:324:9: expected void volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/control.c:324:9: got void * arch/arm/mach-omap2/control.c:327:9: warning: incorrect type in argument 1 (different address spaces) arch/arm/mach-omap2/control.c:327:9: expected void volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/control.c:327:9: got void * arch/arm/mach-omap2/control.c:334:9: warning: incorrect type in argument 1 (different address spaces) arch/arm/mach-omap2/control.c:334:9: expected void volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/control.c:334:9: got void * arch/arm/mach-omap2/control.c:321:9: warning: dereference of noderef expression arch/arm/mach-omap2/control.c:324:9: warning: dereference of noderef expression arch/arm/mach-omap2/control.c:327:9: warning: dereference of noderef expression arch/arm/mach-omap2/control.c:334:9: warning: dereference of noderef expression arch/arm/mach-omap2/pm34xx.c:323:28: warning: incorrect type in assignment (different address spaces) arch/arm/mach-omap2/pm34xx.c:323:28: expected unsigned int [usertype] *scratchpad_address arch/arm/mach-omap2/pm34xx.c:323:28: got void [noderef] <asn:2>*<noident> arch/arm/mach-omap2/pm34xx.c:326:26: warning: incorrect type in argument 1 (different address spaces) arch/arm/mach-omap2/pm34xx.c:326:26: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/pm34xx.c:326:26: got unsigned int [usertype] * arch/arm/mach-omap2/pm34xx.c:329:26: warning: incorrect type in argument 1 (different address spaces) arch/arm/mach-omap2/pm34xx.c:329:26: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/pm34xx.c:329:26: got unsigned int [usertype] * arch/arm/mach-omap2/pm34xx.c:334:29: warning: incorrect type in argument 1 (different address spaces) arch/arm/mach-omap2/pm34xx.c:334:29: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/pm34xx.c:334:29: got unsigned int [usertype] * Signed-off-by: Manjunath Kondaiah G <manjugk@ti.com> Cc: linux-arm-kernel@lists.infradead.org Cc: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP clockdomain: initialize clockdomain registers when the clockdomain ↵Paul Walmsley2010-09-231-3/+0
| | | | | | | | | | | | | | | | | | | layer starts When the clockdomain layer initializes, place all clockdomains into software-supervised mode, and clear all wakeup and sleep dependencies immediately, rather than waiting for the PM code to do this later. This fixes a major bug where critical sleep dependencies added by the hwmod code are cleared during late PM init. As a side benefit, the _init_{wk,sleep}dep_usecount() functions are no longer needed, so remove them. Kevin Hilman <khilman@deeprootsystems.com> did all the really hard work on this, identifying the problem and finding the bug. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* omap: pm: Move set_pwrdm_state routine to common pm.cSantosh Shilimkar2010-09-231-49/+4
| | | | | | | | | The set_pwrdm_state() is needed on omap4 as well so move this routine to common pm.c file so that it's available for omap3/4 Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* omap: pm-debug: Move common debug code to pm-debug.cSantosh Shilimkar2010-09-231-18/+0
| | | | | | | | | This patch moves omap2_pm_wakeup_on_timer() and pm debug entries form pm34xx.c to pm-debug.c and export it, so that it is available to other OMAPs Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: PM: move device-specific special cases from PM core into CPUidleKevin Hilman2010-09-231-13/+1
| | | | | | | | | | | | | | | | | | | | | | In an effort to simplify the core idle path, move any device-specific special case handling from the core PM idle path into the CPUidle pre-idle checking path. This keeps the core, interrupts-disabled idle path streamlined and independent of any device-specific handling, and also allows CPUidle to do the checking only for certain C-states as needed. This patch has the device checks in place for all states with the CHECK_BM flag, namely all states >= C2. This patch was inspired by a similar patch written by Tero Kristo as part of a larger series to add INACTIVE state support. NOTE: This is a baby-step towards decoupling device idle (or system idle) from CPU idle. Eventually, CPUidle should only manage the CPU, and device/system idle should be managed elsewhere. Cc: Tero Kristo <tero.kristo@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP: PM debugfs removing OMAP3 hardcodings.Thara Gopinath2010-09-211-5/+0
| | | | | | | | | | This patch removes omap3 hardcodings from pm-debug.c so that enabling PM debugfs support does break compilation for other OMAP's. This is a preparatory patch for supporting OMAP4 pm entries through PM debugfs. Signed-off-by: Thara Gopinath <thara@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: PM: whitespace cleanup around IO wakeup enableKevin Hilman2010-09-211-3/+3
| | | | | | | | | Cleanup indentation around IO wakeup enable, the '\' terminator is not required in C when wrapping an expression past end-of-line. Whitespace change only. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: PM: ensure IO wakeups are properly disabledKevin Hilman2010-08-161-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 5a5f561 (convert OMAP3 PRCM macros to the _SHIFT/_MASK suffixes) mistakenly removed the check for PER when disabling the IO chain. During idle, if the PER powerdomain transitions into a lower state and CORE does not, the IO pad wakeups are not being disabled in the idle path after they are enabled. This can happen with the lower C-states when using CPUidle for example. This patch ensures that the check for disabling IO wakeups also checks for PER transitions, matching the check done to enable IO wakeups. Found when debugging PM/CPUidle related problems reported by Ameya Palande <ameya.palande@nokia.com>. Problems were triggered particularily on boards with UART2 consoles (n900, Overo) since UART2 is in the PER powerdomain. Tested on l-o master (omap3_defonfig + CONFIG_CPU_IDLE=y) as well as with current PM branch. Boards tested: n900, Overo, omap3evm. Cc: Paul Walmsley <paul@pwsan.com> Cc: Ameya Palande <ameya.palande@nokia.com> Tested-by: Jarkko Nikula <jhnikula@gmail.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> [tony@atomide.com: updated description to clarify the transistion] Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP3: AM3505/3517 do not have IO wakeup capabilitystanley.miao2010-08-021-3/+4
| | | | | | | | | | | | AM3505/3517 doesn't have IO wakeup capability, so we do not need to set the bit OMAP3430_EN_IO and the bit OMAP3430_EN_IO_CHAIN in the register PM_WKEN_WKUP when the system enters suspend state. Tested on AM3517EVM and OMAP3530EVM. Signed-off-by: Stanley.Miao <stanley.miao@windriver.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP3: PM: fix IO daisy chain enable to use PM_WKEN regKevin Hilman2010-06-101-2/+2
| | | | | | | | | | | | | Checking to se if the IO daisy chain is enabled should be checking the PM_WKEN register, not the PM_WKST register. Reading PM_WKST tells us if an event occurred, not whether or not it is enabled. Apparently, we've been lucky until now in that a pending event has not been there during enable. However, on 3630/Zoom3, I noticed because of the WARN that this timeout was always happening. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP3: PM: PM_MPUGRPSEL writes should use GRPSEL macros, not EN macrosPaul Walmsley2010-05-201-7/+12
| | | | | | | | | | Writes to the PM_*GRPSEL registers should use _GRPSEL_ macros, not _EN_ macros, to match the TRM and guard against inadvertent error. This patch should not cause any functional change. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Jouni Högander <jouni.hogander@nokia.com>
* OMAP2+ PRCM: convert remaining PRCM macros to the _SHIFT/_MASK suffixesPaul Walmsley2010-05-201-15/+15
| | | | | | | | | | | Fix all of the remaining PRCM register shift/bitmask macros that did not use the _SHIFT/_MASK suffixes to use them. This makes the use of these macros consistent. It is intended to reduce error, as code can be inspected visually by reviewers to ensure that bitshifts and bitmasks are used in the appropriate places. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3 PRCM: convert OMAP3 PRCM macros to the _SHIFT/_MASK suffixesPaul Walmsley2010-05-201-88/+90
| | | | | | | | | | | Fix all of the remaining OMAP3 PRCM register shift/bitmask macros that did not use the _SHIFT/_MASK suffixes to use them. This makes the use of these macros consistent. It is intended to reduce error, as code can be inspected visually by reviewers to ensure that bitshifts and bitmasks are used in the appropriate places. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
* Merge branch 'pm-next' of ↵Tony Lindgren2010-05-201-25/+33
|\ | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-linus
| * OMAP3: PM: Remove PER wakeup dependency on CORE.Mike Chan2010-05-121-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | We can remove this wakeup dependency since now, when GPIO2-6 are enabled for IO-pad wakeup, PER domain is gauranteed to be awake or be woken up to service. The previous dependency did not handle all corner cases. Since there was no sleep dependency between CORE and PER domains, if PER enters RET and CORE is ON, PER will not be active for GPIO handling. Signed-off-by: Mike Chan <mike@android.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * OMAP3: PM: Enable IO / IO-CHAIN wakeups for PERMike Chan2010-05-121-5/+11
| | | | | | | | | | | | | | | | | | | | IO events can also come from GPIO modules, which reside in the PER domain. It is possible for the PER to enter RET while CORE is still in ON. If GPIO 2-6 are enabled for IO-pad wakeups, the PER domain will not wakeup in this case, unless we enable it. Signed-off-by: Mike Chan <mike@android.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * OMAP3: PM: Add milliseconds interface to suspend wakeup timerAri Kauppi2010-05-121-7/+10
| | | | | | | | | | | | | | | | | | | | | | Millisecond resolution is possible and there are use cases for it (automatic testing). Seconds-based interface is preserved for compatibility. Signed-off-by: Ari Kauppi <Ext-Ari.Kauppi@nokia.com> Reviewed-by: Phil Carmody <ext-phil.2.carmody@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * OMAP3: PRCM interrupt: only check and clear enabled PRCM IRQsKevin Hilman2010-05-121-5/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While handling PRCM IRQs, mask out interrupts that are not enabled in PRM_IRQENABLE_MPU. If these are not masked out, non-enabled interrupts are caught, a WARN() is printed due to no 'handler' and the events are cleared. In addition to being noisy, this can also interfere with independent polling of this register by SR/VP code. This was noticed using SmartReflex transitions which cause the VPx_* interrupts to be handled since they are set in PRM_IRQSTATUS_MPU even but not enabled in PRM_IRQENABLE_MPU. Acked-by: Mike Turquette <mturquette@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* | OMAP2/3: GPIO: generalize prepare for idleKevin Hilman2010-05-121-6/+4
| | | | | | | | | | | | | | | | | | | | | | | | Currently, the GPIO 'prepare' hook is only called when going to off-mode, while the function is called 'prepare_for_retention.' This patch renames the function to 'prepare_for_idle' and calls it for any powersate != PWRDM_POWER_ON passing in the powerstate. The hook itself is then responsible for doing various preparation based on the powerstate. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* | OMAP3: GPIO fixes for off-modeTero Kristo2010-05-121-4/+6
|/ | | | | | | | | | Off mode is now using the omap2 retention fix code for scanning GPIOs during off-mode transitions. All the *non_wakeup_gpios variables are now used for off-mode transition tracking on OMAP3. This patch fixes cases where GPIO state changes are missed during off-mode. Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* include cleanup: Update gfp.h and slab.h includes to prepare for breaking ↵Tejun Heo2010-03-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
* Merge branch 'for_2.6.34_b' of git://git.pwsan.com/linux-2.6 into omap-for-linusTony Lindgren2010-02-241-1/+1
|\
| * OMAP3: clock: use std _MASK suffix for CM_FCLKEN_IVA2 definesKevin Hilman2010-02-241-1/+1
| | | | | | | | | | | | | | | | Add _MASK suffix to CM_FCLKEN_IVA2 bitfieds to conform with the rest of the usage in cm-regbits-34xx.h of using _SHIFT and _MASK suffixes. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* | OMAP3: cpuidle: Update statistics for correct stateSanjeev Premi2010-02-231-0/+4
|/ | | | | | | | | | | | | | | | | | | When 'enable_off_mode' is 0, the target power state for MPU and CORE was locally changed to PWRDM_POWER_RET but, the statistics are updated for idle state originally selected by the governor. This patch 'invalidates' the idle states that lead either of MPU or Core to PWRDM_POWER_OFF state when 'enable_off_mode' is '0'. The states are valid once 'enable_off_mode' is set to '1'. Added function next_valid_state() to check if current state is valid; else get the next valid state. It is called from omap3_enter_idle_bm(). Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP clockdomains: add usecounting for wakeup and sleep dependenciesPaul Walmsley2010-01-261-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add usecounting for wakeup and sleep dependencies. In the current situation, if several functions add dependencies on the same clockdomains, when the first dependency removal function is called, the dependency will be incorrectly removed from the hardware. Add clkdm_clear_all_wkdeps() and clkdm_clear_all_sleepdeps(), which provide a fast and usecounting-consistent way to clear all hardware clockdomain dependencies, since accesses to these registers can be quite slow. pm{2,3}4xx.c has been updated to use these new functions. The original version of this patch did not touch these files, which previously wrote directly to the wkdep registers, and thus confused the usecounting code. This problem was found by Kevin Hilman <khilman@deeprootsystems.com>. N.B.: This patch introduces one significant functional difference over the previous pm34xx.c code: sleepdeps are now cleared during clockdomain initialization, whereas previously they were left untouched. This has been tested by Kevin and confirmed to work. The original version of this patch also did not take into consideration that some clockdomains do not have sleep or wakeup dependency sources, which caused NULL pointer dereferences. This problem was debugged and fixed by Kevin Hilman <khilman@deeprootsystems.com>. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Cc: Jouni Högander <jouni.hogander@nokia.com>
* OMAP2/3 clkdm/pwrdm: move wkdep/sleepdep handling from pwrdm to clkdmPaul Walmsley2010-01-261-2/+8
| | | | | | | | | | | | | | | Move clockdomain wakeup dependency and sleep dependency data structures from the powerdomain layer to the clockdomain layer, where they belong. These dependencies were originally placed in the powerdomain layer due to unclear documentation; however, it is clear now that these dependencies are between clockdomains. For OMAP2/3, this is not such a big problem, but for OMAP4 this needs to be fixed. Thanks to Benoît Cousson <b-cousson@ti.com> for his advice on this patch. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com>
* ARM: OMAP4: PM: OMAP4 Power Domain Porting Related Clean-up.Abhijit Pagare2010-01-261-12/+12
| | | | | | | | | | Module offsets were same for OMAP2 and OMAP3 while they differ for OMAP4. Hence we need different macros for identifying platform specific offsets. Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Rajendra Nayak <rnayak@ti.com>
* OMAP3: PM: DSS PM_WKEN to refill DMASubramani Venkatesh2010-01-201-0/+4
| | | | | | | | | Currently, DSS does not wakeup when there is a DMA request. DSS wake up event must be enabled so that the DMA request to refill the FIFO will wake up the CORE domain. Signed-off-by: Subramani Venkatesh <subramani.venkatesh@windriver.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: PM: Force write last pad config register into save areaTero Kristo2010-01-201-1/+10
| | | | | | | | | | | | | | | | Due to OMAP3 erratas 1.157, 1.185 the save of the last pad register (ETK_D14 and ETK_D15) can fail sometimes when there is simultaneous OCP access to the SCM register area. Fixed by writing the last register to the save area. Also, optimized the delay loop for the HW save to include an udelay(1), which limits the number of unnecessary HW accesses to SCM register area during the save. Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Acked-by: Nishanth Menon <nm@ti.com> Reviewed-by: Anand Gadiyar <gadiyar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: PM: Enable wake-up from McBSP2, 3 and 4 modulesPeter Ujfalusi2010-01-201-2/+6
| | | | | | | | Wake-up from McBSP ports are needed, especially when the THRESHOLD dma mode is in use for audio playback. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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