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* ARM: at91: at91 based machines specify their own irq handler at run timeLudovic Desroches2012-07-021-0/+2
| | | | | | | | SOC_AT91SAM9 selects MULTI_IRQ_HANDLER in order to let machines specify their own IRQ handler at run time. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91/dt: do not specify the board any moreJean-Christophe PLAGNIOL-VILLARD2012-04-171-7/+1
| | | | | | | This will allow to add any board to a compiled kernel by just passing the DTB. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91/dt: add specific DT soc initJean-Christophe PLAGNIOL-VILLARD2012-03-151-7/+1
| | | | | | | | | | | | | | | This will allow to have static Device mapping and DT probe mapping for the System Controller. Temporary keep the call to ioremap_registers() until we have the binding for the SDRAM/DDR Controller. Temporary keep the main clock hardcoded to 12MHz until we have the binding for the PMC. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* atmel/nand: add DT supportJean-Christophe PLAGNIOL-VILLARD2012-03-151-51/+0
| | | | | | | | Use a local copy of board informatin and fill with DT data. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91: enable on flash bbt for Atmel Reference and DT boardsJean-Christophe PLAGNIOL-VILLARD2012-03-151-0/+1
| | | | | | Enable it on Calao board too as they are in DT too. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* ATMEL: fix nand ecc supportJean-Christophe PLAGNIOL-VILLARD2012-03-151-0/+1
| | | | | | | | | | | | | | So we can now choose for the board the ecc mode (ecc soft, soft bch, no ecc and hardware). Set ecc mode in the boards to soft as currently in the driver. Move platform data to a common header include/linux/platform_data/atmel_nand.h Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no> Acked-by: David Woodhouse <dwmw2@infradead.org>
* ARM: at91/pio: add new PIO3 featuresNicolas Ferre2012-03-011-0/+1
| | | | | | | | | | | | | | | This patch adds the support for new PIO controller found on some at91sam SOCs. - more peripheral multiplexing - more features to configure on a PIO (pull-down, Schmitt trigger, debouncer) - support for several IRQ triggering features (type and polarity) Support for those new features are retrieved from the device tree compatibility string. Debugfs at91_gpio file is updated to monitor configuration. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91: AIC and GPIO IRQ device tree initializationNicolas Ferre2012-03-011-1/+10
| | | | | | | | | | | | | | | | Both AIC and GPIO controllers are now using the standard of_irq_init() function to initialize IRQs in case of DT use. The DT specific initialization functions are now separated from the non-DT case and are now using "linear" irq domains. The .map() irqdomain operation is responsible for positioning the IRQ handlers. In AIC case, the Linux IRQ number is directly programmed in the hardware to avoid an additional reverse mapping operation. The AIC position its irq domain as the "default" irq domain. For DT case, the priority is not yet filled in the SMR. It will be the subject of another patch. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91/board-dt: remove AIC irq domain from board fileNicolas Ferre2012-03-011-8/+0
| | | | | | | | Adding of irqdomain in AIC code make the specification of the irq domain in board file useless. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* ARM: at91/board-dt: drop default consoleJean-Christophe PLAGNIOL-VILLARD2012-02-231-6/+0
| | | | | | | | | | This default console mechanism is not used if the console is selected by command line (console= parameter). Dropping this will simplify the compilation of multiple SoC in the same kernel image. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91/at91sam9x5: SoC basic supportDan Liang2012-02-031-0/+1
| | | | | | | | | Add at91sam9x5.c SoC file: Define clock resources and some initialization code. Signed-off-by: Dan Liang <dan.liang@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* ARM: at91/boards: use -EINVAL for invalid gpioJean-Christophe PLAGNIOL-VILLARD2011-11-291-0/+1
| | | | | | | this will allow to use gpio_is_valid Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91: make smc register base soc independentJean-Christophe PLAGNIOL-VILLARD2011-11-281-1/+1
| | | | | | | now sam9_smc_configure will take as first parameter is the SMC id Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91: add at91sam9g20 and Calao USB A9G20 DT supportJean-Christophe PLAGNIOL-VILLARD2011-10-251-0/+1
| | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com>
* ARM: at91: dt: at91sam9g45 family and board device tree filesNicolas Ferre2011-10-251-0/+122
Create a new device tree source file for Atmel at91sam9g45 SoC family. The Evaluation Kit at91sam9m10g45ek includes it. This first basic support will be populated as drivers and boards will be converted to device tree. Contains serial, dma and interrupt controllers. The generic board file still takes advantage of platform data for early serial init. As we need a storage media and the NAND flash driver is not converted to DT yet, we keep old initialization for it. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com>
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