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* ARM: 6117/1: kdump: implement crash_setup_regs()Mika Westerberg2010-07-091-3/+19
| | | | | | | | Implement machine specific function crash_setup_regs() which is responsible for storing machine state when crash occured. Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6207/1: Replace CONFIG_HAS_TLS_REG with HWCAP_TLS and check for it on V6Tony Lindgren2010-07-092-0/+47
| | | | | | | | | | | | | | | | The TLS register is only available on ARM1136 r1p0 and later. Set HWCAP_TLS flags if hardware TLS is available and test for it if CONFIG_CPU_32v6K is not set for V6. Note that we set the TLS instruction in __kuser_get_tls dynamically as suggested by Jamie Lokier <jamie@shareable.org>. Also the __switch_to code is optimized out in most cases as suggested by Nicolas Pitre <nico@fluxnic.net>. Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6203/1: Make VFPv3 usable on ARMv6Tony Lindgren2010-07-091-0/+18
| | | | | | | | | | | | | | | | | | MVFR0 and MVFR1 are only available starting with ARM1136 r1p0 release according to "B.5 VFP changes" in DDI0211F_arm1136_r1p0_trm.pdf. This is also when TLS register got added, so we can use HAS_TLS also to test for MVFR0 and MVFR1. Otherwise VFPFMRX and VFPFMXR access fails and we get: Internal error: Oops - undefined instruction: 0 [#1] PC is at no_old_VFP_process+0x8/0x3c LR is at __und_svc+0x48/0x80 ... Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6199/1: Add kprobe-based event tracerWill Deacon2010-07-091-0/+36
| | | | | | | | | | | This patch enables the HAVE_REGS_AND_STACK_ACCESS_API option for ARM which is required by the kprobe events tracer. Code based on the PowerPC port. Cc: Jean Pihet <jpihet@mvista.com> Tested-by: Jamie Iles <jamie.iles@picochip.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6197/2: preliminary support for sparse IRQeric miao2010-07-093-0/+4
| | | | | | | | | So to allow NR_IRQS to be dynamic and platforms to specify the number of IRQs really needed. Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* asm-generic: remove ARCH_HAS_SG_CHAIN in scatterlist.hFUJITA Tomonori2010-05-271-3/+0
| | | | | | | | | | | | | There are more architectures that don't support ARCH_HAS_SG_CHAIN than those that support it. This removes removes ARCH_HAS_SG_CHAIN in asm-generic/scatterlist.h and lets arhictectures to define it. It's clearer than defining ARCH_HAS_SG_CHAIN asm-generic/scatterlist.h and undefing it in arhictectures that don't support it. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2010-05-251-1/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (103 commits) ARM: 6141/1: Add audio support part in arch/arm/mach-w90x900 ARM: 5939/1: ARM: Add option CMDLINE_FORCE to force usage of the in-kernel cmdline ARM: 6140/1: silence a bogus sparse warning in unwind.c ARM: mach-at91: duplicated include ARM: arch/arm/nwfpe/fpsr.h: Checkpatch cleanup ARM: arch/arm/mach-shark/pci.c: Checkpatch cleanup ARM: arch/arm/nwfpe/ChangeLog: Checkpatch cleanup ARM: arch/arm/mach-sa1100/leds.c: Checkpatch cleanup ARM: arch/arm/mach-h720x/common.h: Checkpatch cleanup ARM: arch/arm/mach-footbridge/ebsa285-pci.c: Checkpatch cleanup ARM: arch/arm/mach-clps711x/Makefile.boot: Checkpatch cleanup ARM: arch/arm/boot/bootp/bootp.lds: Checkpatch cleanup ARM: SPEAR6xx: remove duplicated #include ARM: s3c6400_defconfig: Add NAND driver ARM: s3c6400_defconfig: enable sound as modules ARM: s3c6400_defconfig: enable power management ARM: s5pv210_defconfig: Update s5pv210_defconfig to v2.6.34 ARM: s5pc110_defconfig: Update s5pc110_defconfig to v2.6.34 ARM: s5p6442_defconfig: Update s5p6442_defconfig to v2.6.34 ARM: s5p6440_defconfig: Update s5p6440_defconfig to v2.6.34 ...
| * ARM: 6138/1: Add support for 10 hardirq bitsMagnus Damm2010-05-201-1/+3
| | | | | | | | | | | | | | | | | | | | This patch adds support for 10 hardirq bits to the ARM architecture. Needed by the SH-Mobile ARM processor sh7372 that has more than 512 IRQs. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | kdb: core for kgdb back end (2 of 2)Jason Wessel2010-05-201-0/+1
| | | | | | | | | | | | | | | | | | | | This patch contains the hooks and instrumentation into kernel which live outside the kernel/debug directory, which the kdb core will call to run commands like lsmod, dmesg, bt etc... CC: linux-arch@vger.kernel.org Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Signed-off-by: Martin Hicks <mort@sgi.com>
* | Merge branch 'for-linus' of ↵Linus Torvalds2010-05-201-1/+1
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (44 commits) vlynq: make whole Kconfig-menu dependant on architecture add descriptive comment for TIF_MEMDIE task flag declaration. EEPROM: max6875: Header file cleanup EEPROM: 93cx6: Header file cleanup EEPROM: Header file cleanup agp: use NULL instead of 0 when pointer is needed rtc-v3020: make bitfield unsigned PCI: make bitfield unsigned jbd2: use NULL instead of 0 when pointer is needed cciss: fix shadows sparse warning doc: inode uses a mutex instead of a semaphore. uml: i386: Avoid redefinition of NR_syscalls fix "seperate" typos in comments cocbalt_lcdfb: correct sections doc: Change urls for sparse Powerpc: wii: Fix typo in comment i2o: cleanup some exit paths Documentation/: it's -> its where appropriate UML: Fix compiler warning due to missing task_struct declaration UML: add kernel.h include to signal.c ...
| * add descriptive comment for TIF_MEMDIE task flag declaration.Andreas Dilger2010-05-141-1/+1
| | | | | | | | | | | | Signed-off-by: Andreas Dilger <adilger@dilger.ca> Acked-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* | Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2010-05-1917-126/+431
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (224 commits) ARM: remove 'select GENERIC_TIME' ARM: 6136/1: ARCH_REQUIRE_GPIOLIB selects GENERIC_GPIO ARM: 6074/1: oprofile: convert from sysdev to platform device ARM: 6073/1: oprofile: remove old files and update KConfig ARM: 6072/1: oprofile: use perf-events framework as backend ARM: 6071/1: perf-events: allow modules to query the number of hardware counters ARM: 6070/1: perf-events: add support for xscale PMUs ARM: 6069/1: perf-events: use numeric ID to identify PMU ARM: 6064/1: pmu: register IRQs at runtime ARM: Optionally allow ARMv6 to use 'normal, bufferable' memory for DMA ARM: 6134/1: Handle instruction cache maintenance fault properly ARM: nwfpe: allow debugging output to be configured at runtime ARM: rename mach_cpu_disable() to platform_cpu_disable() ARM: 6132/1: PL330: Add common core driver ARM: 6094/1: Extend cache-l2x0 to support the 16-way PL310 ARM: Move memory mapping into mmu.c ARM: Ensure meminfo is sorted prior to sanity_check_meminfo ARM: Remove useless linux/bootmem.h includes ARM: convert /proc/cpu/aligment to seq_file arm: use asm-generic/scatterlist.h ...
| * \ Merge branch 'devel-stable' into develRussell King2010-05-1713-91/+161
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/Kconfig arch/arm/include/asm/system.h arch/arm/mm/Kconfig
| * | | ARM: 6071/1: perf-events: allow modules to query the number of hardware countersWill Deacon2010-05-171-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For OProfile to initialise oprofilefs correctly, it needs to know the number of counters it can represent. This patch adds a function to the ARM perf-events backend to return the number of hardware counters available for the current PMU. Cc: Jamie Iles <jamie.iles@picochip.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 6069/1: perf-events: use numeric ID to identify PMUWill Deacon2010-05-171-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM perf-events framework provides support for a number of different PMUs using struct arm_pmu. The char *name field of this struct can be used to identify the PMU, but this is cumbersome if used outside of perf. This patch replaces the name string for a PMU with an enum, which holds a unique ID for the PMU being represented. This ID can be used to index an array of names within perf, so no functionality is lost. The presence of the ID field, allows other kernel subsystems [currently oprofile] to use their own mappings for the PMU name. Cc: Jean Pihet <jpihet@mvista.com> Acked-by: Jamie Iles <jamie.iles@picochip.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 6064/1: pmu: register IRQs at runtimeWill Deacon2010-05-171-15/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current PMU infrastructure for ARM requires that the IRQs for the PMU device are fixed at compile time and are selected based on the ARCH_ or MACH_ flags. This has the disadvantage of tying the Kernel down to a particular board as far as profiling is concerned. This patch replaces the compile-time IRQ registration with a runtime mechanism which allows the IRQs to be registered with the framework as a platform_device. A further advantage of this change is that there is scope for registering different types of performance counters in the future by changing the id of the platform_device and attaching different resources to it. Acked-by: Jamie Iles <jamie.iles@picochip.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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| *-------. \ \ Merge branches 'at91', 'bcmring', 'ep93xx', 'iop', 'misc', 'nomadik', ↵Russell King2010-05-1715-111/+399
| |\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'omap', 'pxa', 'spear' and 'versatile' into devel Conflicts: arch/arm/Makefile arch/arm/common/Makefile arch/arm/mm/Kconfig
| | | | | | * | | ARM: ICST: kill duplicate icst codeRussell King2010-05-023-67/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The only difference between ICST307 and ICST525 are the two arrays for calculating the S parameter; the code is now identical. Merge the two files and kill the duplicated code. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | * | | ARM: ICST: indirect s2div and idx2s arrays via icst_paramsRussell King2010-05-023-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | * | | ARM: ICST: move minimum VCO frequency to icst_paramsRussell King2010-05-021-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | * | | ARM: ICST: use Hz instead of kHzRussell King2010-05-022-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes the ICST support fit more nicely with the clk API, eliminating the need to *1000 and /1000 in places. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | * | | ARM: ICST: provide definitions for max/min VCO frequenciesRussell King2010-05-022-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | * | | ARM: ICST: icst.*_ps_to_vco() functions are unused, remove themRussell King2010-05-022-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These functions were originally implemented for the CLCD driver before we had clk API support. Since the CLCD driver does not use these anymore, we can remove them. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | * | | ARM: ICST: merge common ICST VCO structuresRussell King2010-05-023-34/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The structures for the ICST307 and ICST525 VCO devices are identical, so merge them together. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | * | | ARM: Improve documentation in arm_timer.hRussell King2010-04-291-15/+24
| | | |_|_|/ / / | | |/| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | | ARM: 6021/1: ST SPEAr: Added ARM PrimeXsys System Controller SP810 header fileviresh kumar2010-04-141-0/+59
| | | | |/ / / | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reviewed-by: Linus Walleij <linux.walleij@stericsson.com> Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | | ARM: Optionally allow ARMv6 to use 'normal, bufferable' memory for DMARussell King2010-05-172-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide a configuration option to allow the ARMv6 to use normal bufferable memory for coherent DMA. This option is forced to 'y' for ARMv7, and offered as a configuration option on ARMv6. Enabling this option requires drivers to have the necessary barriers to ensure that data in DMA coherent memory is visible prior to the DMA operation commencing. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | | ARM: rename mach_cpu_disable() to platform_cpu_disable()Russell King2010-05-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Consistently name all SMP platform related functions. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | | ARM: 6132/1: PL330: Add common core driverJassi Brar2010-05-151-0/+217
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PL330 is a configurable DMA controller PrimeCell device. The register map of the device is well defined. The configuration of a particular implementation can be read from the six configuration registers CR0-4,Dn. This patch implements a driver for the specification:- http://infocenter.arm.com/help/topic/com.arm.doc.ddi0424a/DDI0424A_dmac_pl330_r0p0_trm.pdf The exported interface should be sufficient to implement a driver for any DMA API. Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | | ARM: 6094/1: Extend cache-l2x0 to support the 16-way PL310Jason McMullan2010-05-151-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The L310 cache controller's interface is almost identical to the L210. One major difference is that the PL310 can have up to 16 ways. This change uses the cache's part ID and the Associativity bits in the AUX_CTRL register to determine the number of ways. Also, this version prints out the CACHE_ID and AUX_CTRL registers. Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Jason S. McMullan <jason.mcmullan@netronome.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | | arm: use asm-generic/scatterlist.hFUJITA Tomonori2010-05-151-18/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | | ARM: 6058/1: Add support for PCI domainsAnton Vorontsov2010-04-222-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for PCI domains on ARM platforms. Also, protect asm/mach/pci.h from multiple inclustions, otherwise build fails because of pci_domain_nr() and pci_proc_domain() redefinitions. Signed-off-by: Anton Vorontsov <avorontsov@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | | ARM: convert arm to arch_gettimeoffset()John Stultz2010-03-241-1/+1
| | | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert arm to use GENERIC_TIME via the arch_getoffset() infrastructure, reducing the amount of arch specific code we need to maintain. The arm architecture is the last arch that need to be converted. Signed-off-by: John Stultz <johnstul@us.ibm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Andrew Morton <akpm@linux-foundation.org>
| | * | | | ARM: 6063/1: pmu: add enum describing PMU typesWill Deacon2010-04-291-0/+5
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds an enum describing the potential PMU device types in preparation for PMU device registration via platform devices. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | ARM: 6092/1: atmel_serial: support for RS485 communicationsClaudio Scordino2010-05-041-0/+3
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Final version of the patch that adds support for RS485 communications to the atmel_serial driver. The patch has been already sent and discussed on both linux-kernel and linux-arm-kernel mailing lists several times. Many people collaborated to improve and test the code: Tested-by: Sebastian Heutling <Sebastian.Heutling@who-ing.de> Tested-by: Bernhard Roth <br@pwrnet.de> Reviewed-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Claudio Scordino <claudio@evidence.eu.com> Signed-off-by: Michael Trimarchi <michael@evidence.eu.com> Signed-off-by: Rick Bronson <rick@efn.org> Signed-off-by: Sebastian Heutling <Sebastian.Heutling@who-ing.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | atomic_t: Cast to volatile when accessing atomic variablesAnton Blanchard2010-05-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for removing volatile from the atomic_t definition, this patch adds a volatile cast to all the atomic read functions. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | | ARM: 6125/1: ARM TWD: move TWD registers to common headerSrinidhi Kasagar2010-05-121-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This moves the TWD register set of MPcore to a common existing file so that watchdog driver can access it Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | ARM: 6112/1: Use the Inner Shareable I-cache and BTB ops on ARMv7 SMPCatalin Marinas2010-05-082-1/+32
| |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | The standard I-cache Invalidate All (ICIALLU) and Branch Predication Invalidate All (BPIALL) operations are not automatically broadcast to the other CPUs in an ARMv7 MP system. The patch adds the Inner Shareable variants, ICIALLUIS and BPIALLIS, if ARMv7 and SMP. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | arch/arm/include/asm/elf.h: forward-declare the task-structAndrew Morton2010-05-011-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | iop32x_defconfig: In file included from include/linux/elf.h:7, from kernel/elfcore.c:1: arch/arm/include/asm/elf.h:101: warning: "struct task_struct" declared inside parameter list arch/arm/include/asm/elf.h:101: warning: its scope is only this definition or declaration, which is probably not what you want Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | ARM: fix build error in arch/arm/kernel/process.cRussell King2010-04-213-34/+34
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | /tmp/ccJ3ssZW.s: Assembler messages: /tmp/ccJ3ssZW.s:1952: Error: can't resolve `.text' {.text section} - `.LFB1077' This is caused because: .section .data .section .text .section .text .previous does not return us to the .text section, but the .data section; this makes use of .previous dangerous if the ordering of previous sections is not known. Fix up the other users of .previous; .pushsection and .popsection are a safer pairing to use than .section and .previous. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: 6051/1: VFP: preserve the HW context when calling signal handlersImre Deak2010-04-142-13/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From: Imre Deak <imre.deak@nokia.com> Signal handlers can use floating point, so prevent them to corrupt the main thread's VFP context. So far there were two signal stack frame formats defined based on the VFP implementation, but the user struct used for ptrace covers all posibilities, so use it for the signal stack too. Introduce also a new user struct for VFP exception registers. In this too fields not relevant to the current VFP architecture are ignored. Support to save / restore the exception registers was added by Will Deacon. Signed-off-by: Imre Deak <imre.deak@nokia.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: 6007/1: fix highmem with VIPT cache and DMANicolas Pitre2010-04-142-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The VIVT cache of a highmem page is always flushed before the page is unmapped. This cache flush is explicit through flush_cache_kmaps() in flush_all_zero_pkmaps(), or through __cpuc_flush_dcache_area() in kunmap_atomic(). There is also an implicit flush of those highmem pages that were part of a process that just terminated making those pages free as the whole VIVT cache has to be flushed on every task switch. Hence unmapped highmem pages need no cache maintenance in that case. However unmapped pages may still be cached with a VIPT cache because the cache is tagged with physical addresses. There is no need for a whole cache flush during task switching for that reason, and despite the explicit cache flushes in flush_all_zero_pkmaps() and kunmap_atomic(), some highmem pages that were mapped in user space end up still cached even when they become unmapped. So, we do have to perform cache maintenance on those unmapped highmem pages in the context of DMA when using a VIPT cache. Unfortunately, it is not possible to perform that cache maintenance using physical addresses as all the L1 cache maintenance coprocessor functions accept virtual addresses only. Therefore we have no choice but to set up a temporary virtual mapping for that purpose. And of course the explicit cache flushing when unmapping a highmem page on a system with a VIPT cache now can go, which should increase performance. While at it, because the code in __flush_dcache_page() has to be modified anyway, let's also make sure the mapped highmem pages are pinned with kmap_high_get() for the duration of the cache maintenance operation. Because kunmap() does unmap highmem pages lazily, it was reported by Gary King <GKing@nvidia.com> that those pages ended up being unmapped during cache maintenance on SMP causing segmentation faults. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: 6001/1: removing compilation warning comming from clkdev.hviresh kumar2010-03-291-0/+1
| | | | | | | | | | | | | | | | clkdev.h is using struct device *. Due to this compilation warning is comming. Removing this warning. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: 6000/1: removing compilation warning comming from <asm/irq.h>viresh kumar2010-03-291-0/+1
| | | | | | | | | | | | | | | | | | irq.h is using struct pt_regs *. Due to this compilation warning is comming. Removing this warning by adding declaration of struct pt_regs. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: 5996/1: ARM: Change the mandatory barriers implementation (4/4)Catalin Marinas2010-03-251-6/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mandatory barriers (mb, rmb, wmb) are used even on uniprocessor systems for things like ordering Normal Non-cacheable memory accesses with DMA transfer (via Device memory writes). The current implementation uses dmb() for mb() and friends but this is not sufficient. The DMB only ensures the relative ordering of the observability of accesses by other processors or devices acting as masters. In case of DMA transfers started by writes to device memory, the relative ordering is not ensured because accesses to slave ports of a device are not considered observable by the DMB definition. A DSB is required for the data to reach the main memory (even if mapped as Normal Non-cacheable) before the device receives the notification to begin the transfer. Furthermore, some L2 cache controllers (like L2x0 or PL310) buffer stores to Normal Non-cacheable memory and this would need to be drained with the outer_sync() function call. The patch also allows platforms to define their own mandatory barriers implementation by selecting CONFIG_ARCH_HAS_BARRIERS and providing a mach/barriers.h file. Note that the SMP barriers are unchanged (being DMBs as before) since they are only guaranteed to work with Normal Cacheable memory. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: 5994/1: ARM: Add outer_cache_fns.sync function pointer (2/4)Catalin Marinas2010-03-251-0/+14
| | | | | | | | | | | | | | | | | | This patch introduces the outer_cache_fns.sync function pointer together with the OUTER_CACHE_SYNC config option that can be used to drain the write buffer of the outer cache. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: 5993/1: ARM: Move the outer_cache definitions into a separate file (1/4)Catalin Marinas2010-03-252-37/+62
|/ | | | | | | | | To avoid #include collisions with subsequent patches in the series, this patch moves the outer_cache definitions to a separate asm/outercache.h file. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 5988/1: pgprot_dmacoherent() for non-mmu buildsGreg Ungerer2010-03-131-0/+1
| | | | | | | | | | | | | | | | | | Commit 26a26d329688ab018e068b412b03d43d7c299f0a ("dma-mapping: switch ARMv7 DMA mappings to retain 'memory' attribute") added a new macro, pgprot_dmacoherent(), to correctly map DMA memory. The non-mmu pgtable support code also needs to implement this macro, otherwise when compiling you get: CC arch/arm/mm/dma-mapping.o arch/arm/mm/dma-mapping.c: In function 'dma_alloc_coherent': arch/arm/mm/dma-mapping.c:320: error: implicit declaration of function 'pgprot_dmacoherent' arch/arm/mm/dma-mapping.c:320: error: 'pgprot_kernel' undeclared (first use in this function) arch/arm/mm/dma-mapping.c:320: error: (Each undeclared identifier is reported only once arch/arm/mm/dma-mapping.c:320: error: for each function it appears in.) Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 5987/1: fix warning in kernel/elfcore.c from ARM's elf.hMikael Pettersson2010-03-131-0/+1
| | | | | | | | | | | | | | | | 2.6.34-rc1 added kernel/elfcore.c which includes <asm/elf.h>. On ARM, this results in: In file included from include/linux/elf.h:7, from kernel/elfcore.c:1: /tmp/linux-2.6.34-rc1/arch/arm/include/asm/elf.h:101: warning: 'struct task_struct' declared inside parameter list /tmp/linux-2.6.34-rc1/arch/arm/include/asm/elf.h:101: warning: its scope is only this definition or declaration, which is probably not what you want Including <linux/sched.h> seems a bit heavyweight, so this patch just adds a tentative declaration of struct task_struct in <asm/elf.h>. Signed-off-by: Mikael Pettersson <mikpe@it.uu.se> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2010-03-124-0/+77
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (370 commits) ARM: S3C2443: Add set_rate and round_rate calls for armdiv clock ARM: S3C2443: Remove #if 0 for clk_mpll ARM: S3C2443: Update notes on MPLLREF clock ARM: S3C2443: Further clksrc-clk conversions ARM: S3C2443: Change to using plat-samsung clksrc-clk implementation USB: Fix s3c-hsotg build following Samsung platform header moves ARM: S3C64XX: Reintroduce unconditional build of audio device ARM: 5961/1: ux500: fix CLKRST addresses ARM: 5977/1: arm: Enable backtrace printing on oops when PC is corrupted ASoC: Fix S3C64xx IIS driver for Samsung header reorg ARM: S3C2440: Fix plat-s3c24xx move of s3c2440/s3c2442 support [ARM] pxa: fix typo in mxm8x10.h [ARM] pxa/raumfeld: set GPIO drive bits for LED pins [ARM] pxa/zeus: Add support for mcp2515 CAN bus [ARM] pxa/zeus: Add support for onboard max6369 watchdog [ARM] pxa/zeus: Add Eurotech as the manufacturer [ARM] pxa/zeus: Correct the USB host initialisation flags [ARM] pxa/zeus: Allow usage of 8250-compatible UART in uncompress [ARM] pxa: refactor uncompress.h for non-PXA uarts [ARM] mmp2: fix incorrect calling of chip->mask_ack() for 2nd level cascaded IRQs ...
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