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* Merge tag 'keystone_dts_for_4.9' of ↵Arnd Bergmann2016-09-131-2/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt Merge "ARM: dts: Keystone DTS for 4.9" from Santosh Shilimkar Add K2G nodes for GPIO, IRQ and Message Manager * tag 'keystone_dts_for_4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: ARM: dts: keystone-k2g: Add Message Manager node ARM: dts: keystone-k2g: Add DSP GPIO controller node ARM: dts: keystone-k2g: Add keystone IRQ controller node ARM: dts: keystone-k2g: Add device state controller node ARM: dts: keystone: specify usb mode explicitly
| * ARM: dts: keystone: specify usb mode explicitlyGrygorii Strashko2016-08-311-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The USB OTG mode is not supported by Kestone 2 devices, as result, the USB devices enumeration and detection will not work properly when kernel is built with CONFIG_USB_DWC3_DUAL_ROLE=y (default for multi platform build): - it's required to load gadget drivers manually to make host mode work and this confuses current Keystone 2 users - device mode is not working, because port can't detect and switch to peripheral/host mode dynamically. Hence, specify usb mode explicitly in DT: usb0 = "host" for all KS2 devices and usb1 = "peripheral" for K2E. Cc: Sekhar Nori <nsekhar@ti.com> Cc: Roger Quadros <rogerq@ti.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
* | revert "ARM: keystone: dts: add psci command definition"Andrew Morton2016-08-101-8/+0
|/ | | | | | | | | | Revert commit 51d5d12b8f3d ("ARM: keystone: dts: add psci command definition"), which was inadvertently added twice. Cc: Russell King - ARM Linux <linux@armlinux.org.uk> Cc: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* ARM: keystone: dts: add psci command definitionVitaly Andrianov2016-08-021-0/+8
| | | | | | | | | | | | | | | | | | | | | | This commit adds definition for cpu_on, cpu_off and cpu_suspend commands. These definitions must match the corresponding PSCI definitions in boot monitor. Having those command and corresponding PSCI support in boot monitor allows run time CPU hot plugin. Link: http://lkml.kernel.org/r/E1b8koV-0004Hf-2j@rmk-PC.armlinux.org.uk Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Pratyush Anand <panand@redhat.com> Cc: Eric Biederman <ebiederm@xmission.com> Cc: Dave Young <dyoung@redhat.com> Cc: Baoquan He <bhe@redhat.com> Cc: Vivek Goyal <vgoyal@redhat.com> Cc: Simon Horman <horms@verge.net.au> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* ARM: dts: keystone: add interrupt property to PCI controller bindingsMurali Karicheri2016-06-081-0/+2
| | | | | | | | | Now that Keystone PCIe controller supports error interrupt handling add interrupt property to PCI controller DT bindings to enable error interrupt handling. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
* ARM: dts: keystone: remove bogus IO resource entry from PCI bindingMurali Karicheri2016-06-081-2/+3
| | | | | | | | | | | | | | | | | The PCI DT bindings contain a bogus entry for IO space which is not supported on Keystone. The current bogus entry has an invalid size and throws following error during boot. [0.420713] keystone-pcie 21021000.pcie: error -22: failed to map resource [io 0x0000-0x400000003fff] So remove it from the dts. While at it also add a bus-range value that eliminates following log at boot up. [0.420659] No bus range found for /soc/pcie@21020000, using [bus 00-ff] Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
* ARM: keystone: dts: add psci command definitionVitaly Andrianov2016-04-131-0/+8
| | | | | | | | | | | | | This commit adds definition for cpu_on, cpu_off and cpu_suspend commands. These definitions must match the corresponding PSCI definitions in boot monitor. Having those command and corresponding PSCI support in boot monitor allows run time CPU hot plugin. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
* ARM: dts: keystone: Add aliases for SPI nodesVignesh R2016-04-131-0/+3
| | | | | | | | Add aliases for SPI nodes, this is required to probe the SPI devices in U-Boot. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
* ARM: dts: keystone: Update SoC specific compatible flagsNishanth Menon2015-10-061-0/+1
| | | | | | | Update the compatible flags to allow specific SoC identification. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
* ARM: dts: keystone: Add ti,keystone-spi for SPIFranklin S Cooper Jr2015-09-171-3/+3
| | | | | | | | Add ti,keystone-spi to the compatible field for the SPI node. This new entry insures that the proper prescaler limit is used for keystone devices Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
* Merge tag 'keystone-dts-late-fixes-v2' of ↵Olof Johansson2015-08-161-11/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into fixes ARM: Couple of Keysyone MDIO DTS fixes for 4.2-rc6+ These are necessary to get the NIC card working on all Keystone EVMs. Couple of boards are broken without these two fixes. * tag 'keystone-dts-late-fixes-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: ARM: dts: keystone: Fix the mdio bindings by moving it to soc specific file ARM: dts: keystone: fix the clock node for mdio Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: dts: keystone: Fix the mdio bindings by moving it to soc specific fileMurali Karicheri2015-08-131-11/+0
| | | | | | | | | | | | | | | | | | Currently mdio bindings are defined in keystone.dtsi and this results in incorrect unit address for the node on K2E and K2L SoCs. Fix this by moving them to SoC specific DTS file. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
| * ARM: dts: keystone: fix the clock node for mdioMurali Karicheri2015-08-131-1/+1
| | | | | | | | | | | | | | | | Currently the MDIO clock is pointing to clkpa instead of clkcpgmac. MDIO is part of the ethss and the clock should be clkcpgmac. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
* | ARM: keystone: dts: rename pcie nodes to help override statusMurali Karicheri2015-07-161-1/+1
| | | | | | | | | | | | | | | | | | Now that PCIe DT binding is disabled in SoC specific DTS, we need a way to override it in a board specific DTS. So rename the PCIe nodes accordingly. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
* | ARM: keystone: dts: fix dt bindings for PCIeMurali Karicheri2015-07-161-0/+1
|/ | | | | | | | | | | | | | | | | | | | | | Currently PCIe DT bindings are broken. PCIe driver can't function without having a SerDes driver that provide the phy configuration. On K2E EVM, this causes problem since the EVM has Marvell SATA controller present and with default values in the SerDes register, it seems to pass the PCIe link check, but causes issues since the configuration is not correct. The manifestation is that when EVM is booted with NFS rootfs, the boot hangs. We shouldn't enable PCIe on this EVM since to work, SerDes driver has to be present as well. So by default, the PCIe DT binding should be disabled in SoC specific DTS. It can be enabled in the board specific DTS when the SerDes device driver is also present. So fix the status of PCIe DT bindings in the SoC specific DTS to "disabled". To enable PCIe, the status should be set to "ok" in the EVM DTS file when SerDes driver support becomes available in the upstream tree. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
* ARM: dts: keystone: add DT bindings for PCI controller for port 0Murali Karicheri2014-11-041-0/+45
| | | | | | | | Add common DT bindings to support PCI controller driver for port 0 on all of the K2 SoCs that has Synopsis Designware based pcie h/w. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
* ARM: dts: keystone: fix io range for usb_phy0Grygorii Strashko2014-10-011-1/+1
| | | | | | | | | The IO range size is set incorrectly for USB PHY0 deivice it should be 24 instead of 32. Otherwise, It causes USB PHY1 probing failure. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* ARM: dts: keystone: add keystone irq controller nodeGrygorii Strashko2014-09-221-0/+8
| | | | | | | | Add Keystone IRQ controller IP node which allows ARM CorePac core to receive signals from DSP cores. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* ARM: dts: keystone: add mdio devices entriesGrygorii Strashko2014-07-171-0/+11
| | | | | | | | | | | | The Keystone 2 has MDIO HW block which are compatible to Davinci SoCs: See "Gigabit Ethernet (GbE) Switch Subsystem" See http://www.ti.com/lit/ug/sprugv9d/sprugv9d.pdf Hence, add corresponding DT entry for Keystone 2. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* Merge tag 'soc2-for-3.16' of ↵Linus Torvalds2014-06-111-1/+13
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull part two of ARM SoC updates from Arnd Bergmann: "This is a small follow-up to the larger ARM SoC updates merged last week, almost entirely for the keystone platform. The main change here is to use the new dma-ranges parsing code that came in through Russell's ARM tree. This allows the keystone platform to do cache-coherent DMA and to finally support all the available physical memory when LPAE is enabled. Aside from this, the keystone reset driver has been rewritten, and there is a small bug fix to allow building the orion5x platform again" * tag 'soc2-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: keystone: Drop use of meminfo since its not available anymore ARM: orion5x: fix mvebu_mbus_dt_init call ARM: configs: keystone: enable reset driver support ARM: dts: keystone: update reset node to work with reset driver ARM: keystone: remove redundant reset stuff ARM: keystone: Update the dma offset for non-dt platform devices ARM: keystone: Switch over to coherent memory address space ARM: configs: keystone: add MTD_SPI_NOR (new dependency for M25P80) ARM: configs: keystone: drop CONFIG_COMMON_CLK_DEBUG
| * ARM: dts: keystone: update reset node to work with reset driverIvan Khoronzhuk2014-05-271-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pll controller register set and device state control registers include sets of registers with different purposes, so it's logically to add syscon entry to be able to access them from appropriate places. So added pll controller and device state control syscon entries. The keystone driver requires the next additional properties: "ti,syscon-pll" - phandle/offset pair. The phandle to syscon used to access pll controller registers and the offset to use reset control registers. "ti,syscon-dev" - phandle/offset pair. The phandle to syscon used to access device state control registers and the offset in order to use mux block registers for all watchdogs. "ti,wdt-list" - option to declare what watchdogs are used to reboot the SoC, so set "0" WDT as default. Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* | ARM: dts: keystone: Update USB node for dma propertiesSantosh Shilimkar2014-05-081-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Keystone supports dma-coherent on USB master and also needs dma-ranges to specify the hardware alias memory range in which DMA can be operational. Cc: Russell King <linux@arm.linux.org.uk> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* | ARM: dts: keystone: Use dma-ranges propertyGrygorii Strashko2014-05-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The dma-ranges property has to be specified per bus and has format: < DMA addr > - Base DMA address for Bus (Bus format 32-bits) < CPU addr > - Corresponding base CPU address (CPU format 64-bits) < DMA range size > - Size of supported DMA range Cc: Russell King <linux@arm.linux.org.uk> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* | ARM: dts: keystone: add cell's information to spi nodesGrygorii Strashko2014-05-081-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | SPI nodes should always have #address-cells and #size-cells defined, otherwise warnings will be produced in case of adding any child nodes to the SPI bus in DT: Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/spi@21000400/n25q128a11@0 Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc/spi@21000400/n25q128a11@0 Hence, ensure that all SPIx nodes have #address-cells and #size-cells properties defined. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* | ARM: dts: keystone: move i2c0 device node from SoC to board filesGrygorii Strashko2014-05-081-5/+0
| | | | | | | | | | | | | | | | | | | | | | I2C devices are not the part of Keystone SoC and have to be defined in board DTS files. Hence, move i2c0 EEPROM device node from Keystone SoC to k2hk, k2e, k2l EVM files as they all have similar EEPROM SoCs installed. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* | ARM: dts: keystone: add cell's information to i2c nodesGrygorii Strashko2014-05-081-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | I2C nodes should always have #address-cells and #size-cells defined, otherwise warnings will be produced in case of adding child nodes to the I2C bus in DT: Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/i2c@2530800/pca@20 Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc/i2c@2530800/pca@20 Hence, ensure that all i2cX nodes have #address-cells and #size-cells properties defined. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* | ARM: dts: keystone: drop address and size cells from GIC nodeLucas Stach2014-05-081-2/+0
|/ | | | | | | | | | | | | This is likely a copy-and-paste error from the ARM GIC documentation, that has already been fixed. address-cells should have been set to 0, as with the size cells. As having those properties set to 0 is the same thing as not specifying them, drop them completely. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* ARM: dts: keystone: add AEMIF/NAND device entryIvan Khoronzhuk2014-02-281-0/+13
| | | | | | | Add AEMIF/NAND device entry. Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* ARM: dts: keystone: preparatory patch to support K2L and K2E SOCsMurali Karicheri2014-02-261-31/+0
| | | | | | | | | | | | | | | | | | | | | | | Current keystone.dtsi includes SoC specific definitions for K2HK SoCs. In order to support two addition keystone devices, k2 Edison and K2 Lamarr and corresponding EVMs, This patch restructure the dts files for the following:- - All clock nodes that are only available in k2hk SoC are moved from keystone-clocks.dtsi to a new k2hk-clocks.dtsi include file - The CPU nodes are now part of the soc specific k2hk.dtsi. - Change the compatibility string to ti,k2hk-evm and change the model name accordingly - Finally include k2hk-clocks.dtsi in k2hk.dtsi and that in k2hk-evm.dts Cc: Olof Johansson <olof@lixom.net> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* ARM: dts: keystone: add gpio device entryGrygorii Strashko2014-02-171-0/+45
| | | | | | | | | | | | This patch adds Keystone GPIO IP device definitions in DT which supports up to 32 GPIO lines and each GPIO line can be configured as separate interrupt source (so called "unbanked" IRQ). For more information see: http://www.ti.com/lit/ug/sprugv1/sprugv1.pdf Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* ARM: dts: keystone: add keystone timer entryIvan Khoronzhuk2014-02-171-0/+7
| | | | | | | | Add keystone timer entry to keystone device tree. This 64-bit timer is used as backup clock event device. Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* ARM: dts: keystone: add watchdog entryIvan Khoronzhuk2014-02-171-0/+6
| | | | | | | | Add watchdog entry to keystone device tree. Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* ARM: dts: keystone: Add usb devicetree bindingsWingMan Kwok2013-12-121-0/+19
| | | | | | | | Added device tree support for TI's Keystone USB driver and updated the Documentation with device tree binding information. Signed-off-by: WingMan Kwok <w-kwok2@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* ARM: dts: keystone: Add usb phy devicetree bindingsWingMan Kwok2013-12-121-0/+8
| | | | | | | | Added device tree support for TI's Keystone USB PHY driver and updated the Documentation with device tree binding information. Signed-off-by: WingMan Kwok <w-kwok2@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* ARM: dts: keystone: Add guestos maintenance interruptSantosh Shilimkar2013-12-121-0/+2
| | | | | | | | | Update the Keystone gic device tree entry to add the maintenance interrupt information. Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* ARM: dts: keystone: Add the GICV and GICH address spaceSantosh Shilimkar2013-12-121-1/+3
| | | | | | | | | Update the Keystone gic node to add the GICV and GIGH address space needed by the KVM. Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* ARM: keystone: dts: add a k2hk-evm specific dts fileMurali Karicheri2013-12-121-0/+181
This patch adds K2 Kepler/Hawking evm (k2hk-evm) specific dts file. To enable re-use of bindings across multiple evms of this family, rename current keystone.dts to keystone.dtsi and include it in the evm specific dts file. K2 SoC has separate ref clock inputs for various clocks. So add separate ref clock nodes for ARM, DDR3A, DDR3B and PA PLL input clocks in k2hk-evm.dts. While at it, rename refclkmain to refclksys based on device User Guide naming convention Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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