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* ARM: dts: aspeed: Add a fastread propertyCédric Le Goater2017-04-071-0/+2
| | | | | | | All chips on OpenPOWER platforms support the fastread SPI command. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: add SPI controller bindingsCédric Le Goater2017-03-061-0/+16
| | | | | | | | | Let's define the SPI controllers in the Aspeed SoCs AST2500 and AST2400 and also enable these, as well as the chips, on the associated platforms. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: Add ftgmac100 to g4 and g5 platformsJoel Stanley2017-01-101-0/+9
| | | | Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: Correct palmetto device treeCyril Bur2017-01-101-2/+2
| | | | | | | | | | Palmettos have 512MB of memory as opposed to the previously thought 256MB. Update the device trees accordingly. We run the uart at 115200. Signed-off-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: Reserve framebuffer memoryCyril Bur2017-01-101-0/+11
| | | | | | | | When used as a BMC, the host expects to be able to use 16MB of framebuffer memory at the top of RAM. Signed-off-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* arm/dts: Add Aspeed ast2400 device treeJoel Stanley2016-05-091-0/+25
A common device tree for all forth gen/ast2400 systems and a board specific dts for the Palmetto OpenPower developemnt machine which was used for testing. Signed-off-by: Joel Stanley <joel@jms.id.au>
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