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* | ARM: dts: palmetto: Fix flash_memory regionLei YU2019-03-201-2/+2
| | | | | | | | | | | | | | | | | | | | The flash_memory region was incorrect and exceeds AST2400's RAM range. Fix it by putting it before coldfire region, and aligned with 32MiB. Signed-off-by: Lei YU <mine260309@gmail.com> Acked-by: Andrew Jeffery <andrew@aj.id.au> OpenBMC-Staging-Count: 2 Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed: tiogapass: Add sensorsVijay Khemka2019-03-201-2/+21
| | | | | | | | | | | | | | | | | | Added ADC and other sensor devices present in the Facebook Tiogapass machine. OpenBMC-Staging-Count: 2 Signed-off-by: Vijay Khemka <vijaykhemka@fb.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed: tiogapass: Enable KCSVijay Khemka2019-03-201-0/+12
| | | | | | | | | | | | | | | | Tiogapass uses two KCS channels. OpenBMC-Staging-Count: 2 Signed-off-by: Vijay Khemka <vijaykhemka@fb.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed: Add KCS support for LPC BMCVijay Khemka2019-03-201-1/+32
| | | | | | | | | | | | | | | | | | | | This adds the description of the four Keyboard Controller Style (KCS) IPMI communication channels present in the ASPEED BMC. They are disabled by default. OpenBMC-Staging-Count: 2 Signed-off-by: Vijay Khemka <vijaykhemka@fb.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed: Add #interrupt-cells property to gpio controllersMark Walton2019-03-202-0/+2
| | | | | | | | | | | | | | | | | | | | | | Allows the GPIO controller to be used as an interrupt parent. of_irq_find_parent() skips interrupt controller nodes that do not have the #interrupt-cells property. OpenBMC-Staging-Count: 2 Signed-off-by: Mark Walton <mark.walton@serialtek.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed: peci: Add PECI nodeJae Hyun Yoo2019-03-202-0/+52
| | | | | | | | | | | | | | | | | | | | | | | | This commit adds PECI bus/adapter node of AST24xx/AST25xx into aspeed-g4 and aspeed-g5. OpenBMC-Staging-Count: 2 Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> Reviewed-by: Haiyue Wang <haiyue.wang@linux.intel.com> Reviewed-by: James Feist <james.feist@linux.intel.com> Reviewed-by: Vernon Mauery <vernon.mauery@linux.intel.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed: Add RTC nodeJoel Stanley2019-03-202-0/+12
| | | | | | | | | | | | | | The ASPEED ast2400 and ast2500 both contain a RTC device. OpenBMC-Staging-Count: 3 Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed: Add "spi-max-frequency" propertyCédric Le Goater2019-03-207-0/+20
| | | | | | | | | | | | | | | | | | | | Keep the FMC controller chips at a safe 50 MHz rate and use 100 MHz for the PNOR on the machines using a AST2500 SoC. OpenBMC-Staging-Count: 5 Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed: Enable the GFX IPJoel Stanley2019-03-203-1/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The GFX controller is the internal graphics device used by the SoC (opposed to the one connected via the PCIe device and used by the host). This configures it with a framebuffer region and adds it to the command line so kernel boot messages appear on the display. Enabled for Romulus, Witherspoon, and the ASPEED AST2500 EVB. OpenBMC-Staging-Count: 5 Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed-g5: Add resets and clocks to GFX nodeJoel Stanley2019-03-201-0/+4
| | | | | | | | | | | | | | | | | | | | The ast2500 has a reset for the CRT device that must be deasserted before it can be used. Similarly it has a clock gate for a clock called D1CLK that must be set to running. OpenBMC-Staging-Count: 5 Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed-g4: Expose SuperIO scratch registersJoel Stanley2019-03-201-0/+87
| | | | | | | | | | | | OpenBMC-Staging-Count: 4 Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed-g5: Expose VGA and SuperIO scratch registersAndrew Jeffery2019-03-201-0/+139
| | | | | | | | | | | | OpenBMC-Staging-Count: 5 Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed: Enable mboxJoel Stanley2019-03-205-0/+19
| | | | | | | | | | OpenBMC-Staging-Count: 6 Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed: Add LPC mailbox nodeJoel Stanley2019-03-202-0/+14
| | | | | | | | | | OpenBMC-Staging-Count: 6 Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed: witherspoon: Update max31785 nodeAndrew Jeffery2019-03-201-0/+52
| | | | | | | | | | | | | | | | | | | | Witherspoon contains four dual-tach fans. We configure them go to 100% when the fault pin is asserted, and disable the fan ramp watchdog. This preserves the behaviour of the previous driver. OpenBMC-Staging-Count: 6 Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed-ast2500: Update flash layoutJoel Stanley2019-03-201-0/+1
| | | | | | | | | | | | | | Move to the openbmc-flash-layout.dtsi file. No functional change. OpenBMC-Staging-Count: 5 Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed-palmetto: Add i2c OCC hwmon nodeJoel Stanley2019-03-201-0/+5
| | | | | | | | | | OpenBMC-Staging-Count: 5 Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: npcm7xx: Update device treeTomer Maimon2019-03-204-143/+249
| | | | | | | | | | | | | | | | | | Modify NPCM7xx device tree FIU, ADC, RST, VCD and SPI nodes Add regulator and HGPIO pins nodes. OpenBMC-Staging-Count: 2 Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: npcm: add defconfig for Nuvoton NPCM7xx BMCTomer Maimon2019-03-201-0/+122
| | | | | | | | | | | | | | | | | | Add configuration definition for Nuvoton NPCM7xx (Poleg) BMC. OpenBMC-Staging-Count: 2 Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | iio: adc: add NPCM ADC driverTomer Maimon2019-03-203-0/+346
| | | | | | | | | | | | | | | | | | | | | | Add Nuvoton NPCM BMC Analog-to-Digital Converter(ADC) driver. The NPCM ADC is a 10-bit converter for eight channel inputs. OpenBMC-Staging-Count: 2 Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> [include iio: adc: npcm: Fixes and code cleanups] Signed-off-by: Joel Stanley <joel@jms.id.au>
* | dt-binding: iio: add NPCM ADC documentationTomer Maimon2019-03-201-0/+35
| | | | | | | | | | | | | | | | | | | | Added device tree binding documentation for Nuvoton BMC NPCM Analog-to-Digital Converter(ADC). OpenBMC-Staging-Count: 2 Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> [include dt-binding: iio: npcm-adc: Fix whitespace] Signed-off-by: Joel Stanley <joel@jms.id.au>
* | net: npcm: add NPCM7xx Ethernet MAC controllerTomer Maimon2019-03-203-1/+2109
| | | | | | | | | | | | | | | | | | Add Nuvoton BMC NPCM7xx Ethernet MAC controller (EMC) driver. OpenBMC-Staging-Count: 2 Signed-off-by: Avi Fishman <avifishman70@gmail.com> Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | dt-binding: net: document NPCM7xx EMC DT bindingsTomer Maimon2019-03-201-0/+36
| | | | | | | | | | | | | | | | | | | | Added device tree binding documentation for Nuvoton NPCM7xx Ethernet MAC Controller (EMC). OpenBMC-Staging-Count: 2 Signed-off-by: Avi Fishman <avifishman70@gmail.com> Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | misc: mbox: add npcm7xx pci mailbox driverTomer Maimon2019-03-203-0/+296
| | | | | | | | | | | | | | | | | | Add Nuvoton BMC NPCM7XX PCI Mailbox driver. OpenBMC-Staging-Count: 2 Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> [v5.0: Fix access_ok for API change] Signed-off-by: Joel Stanley <joel@jms.id.au>
* | dt-binding: bmc: add npcm7xx pci mailbox documentTomer Maimon2019-03-201-0/+19
| | | | | | | | | | | | | | | | | | Added device tree binding documentation for Nuvoton BMC NPCM7XX PCI mailbox. OpenBMC-Staging-Count: 2 Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | misc: npcm7xx-lpc-bpc: add NPCM7xx BIOS post code driverTomer Maimon2019-03-203-0/+403
| | | | | | | | | | | | | | | | | | | | Add NPCM7xx BIOS post code (BPC) driver, the BPC monitoring two I/O address written by the host on the LPC. OpenBMC-Staging-Count: 2 Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | dt-binding: bmc: Add NPCM7xx LPC BPC documentationTomer Maimon2019-03-201-0/+26
| | | | | | | | | | | | | | | | | | | | | | Added device tree binding documentation for Nuvoton BMC NPCM7xx BIOS Post Code (BPC). The NPCM7xx BPC monitoring two configurable I/O addresses written by the host on Low Pin Count (LPC) bus. OpenBMC-Staging-Count: 2 Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | i2c: npcm: driver for Poleg i2c controllerTomer Maimon2019-03-203-0/+2030
| | | | | | | | | | | | | | | | OpenBMC-Staging-Count: 2 Signed-off-by: Tali Perry <tali.perry1@gmail.com> Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> [joel: select CRC8 to fix build error] Signed-off-by: Joel Stanley <joel@jms.id.au>
* | dt-bindings: i2c: npcm7xx: add binding for i2c controllerTomer Maimon2019-03-201-0/+29
| | | | | | | | | | | | | | OpenBMC-Staging-Count: 2 Signed-off-by: Tali Perry <tali.perry1@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | mtd: spi-nor: add NPCM FIU controller driverTomer Maimon2019-03-203-0/+938
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Nuvoton NPCM BMC Flash Interface Unit(FIU) SPI-NOR controller driver The FIU supports single, dual or quad communication interface. the FIU controller can operate in following modes: - User Mode Access(UMA): provides flash access by using an indirect address/data mechanism. - direct rd/wr mode: maps the flash memory into the core address space. - SPI-X mode: used for an expansion bus to an ASIC or CPLD. OpenBMC-Staging-Count: 2 Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> [v5.0: Remove asm/size.h include to fix build] Signed-off-by: Joel Stanley <joel@jms.id.au>
* | dt-binding: mtd: add NPCM FIU controllerTomer Maimon2019-03-201-0/+64
| | | | | | | | | | | | | | | | | | Added device tree binding documentation for Nuvoton BMC NPCM Flash Interface Unit(FIU) SPI-NOR controller. OpenBMC-Staging-Count: 2 Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | clk: nuvoton: add npcm750 clock function prototype initializationTomer Maimon2019-03-201-0/+9
| | | | | | | | | | | | OpenBMC-Staging-Count: 2 Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | Add maintainers for the PECI subsystemJae Hyun Yoo2019-03-201-0/+22
| | | | | | | | | | | | | | | | This commit adds maintainer information for the PECI subsystem. OpenBMC-Staging-Count: 2 Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | hwmon: Add PECI dimmtemp driverJae Hyun Yoo2019-03-203-0/+299
| | | | | | | | | | | | | | | | | | | | | | | | This commit adds PECI dimmtemp hwmon driver. OpenBMC-Staging-Count: 2 Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> Reviewed-by: Haiyue Wang <haiyue.wang@linux.intel.com> Reviewed-by: James Feist <james.feist@linux.intel.com> Reviewed-by: Vernon Mauery <vernon.mauery@linux.intel.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | hwmon: Add PECI cputemp driverJae Hyun Yoo2019-03-204-0/+458
| | | | | | | | | | | | | | | | | | | | | | | | This commit adds PECI cputemp hwmon driver. OpenBMC-Staging-Count: 2 Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> Reviewed-by: Haiyue Wang <haiyue.wang@linux.intel.com> Reviewed-by: James Feist <james.feist@linux.intel.com> Reviewed-by: Vernon Mauery <vernon.mauery@linux.intel.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | Documentation: hwmon: Add documents for PECI hwmon client driversJae Hyun Yoo2019-03-202-0/+128
| | | | | | | | | | | | | | | | | | | | | | | | This commit adds hwmon documents for PECI cputemp and dimmtemp drivers. OpenBMC-Staging-Count: 2 Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> Reviewed-by: Haiyue Wang <haiyue.wang@linux.intel.com> Reviewed-by: James Feist <james.feist@linux.intel.com> Reviewed-by: Vernon Mauery <vernon.mauery@linux.intel.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | mfd: intel-peci-client: Add PECI client MFD driverJae Hyun Yoo2019-03-204-0/+275
| | | | | | | | | | | | | | | | This commit adds PECI client MFD driver. OpenBMC-Staging-Count: 2 Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | dt-bindings: mfd: Add a document for PECI client MFDJae Hyun Yoo2019-03-201-0/+34
| | | | | | | | | | | | | | | | | | This commit adds a dt-bindings document for PECI client MFD. OpenBMC-Staging-Count: 2 Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | peci: Add a PECI adapter driver for Aspeed AST24xx/AST25xxJae Hyun Yoo2019-03-203-0/+535
| | | | | | | | | | | | | | | | | | | | | | | | This commit adds PECI adapter driver implementation for Aspeed AST24xx/AST25xx SoCs. OpenBMC-Staging-Count: 2 Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> Reviewed-by: Haiyue Wang <haiyue.wang@linux.intel.com> Reviewed-by: James Feist <james.feist@linux.intel.com> Reviewed-by: Vernon Mauery <vernon.mauery@linux.intel.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | dt-bindings: Add a document of PECI adapter driver for ASPEED AST24xx/25xx SoCsJae Hyun Yoo2019-03-201-0/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds a dt-bindings document of PECI adapter driver for ASPEED AST24xx/25xx SoCs. OpenBMC-Staging-Count: 2 Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> Reviewed-by: Haiyue Wang <haiyue.wang@linux.intel.com> Reviewed-by: James Feist <james.feist@linux.intel.com> Reviewed-by: Vernon Mauery <vernon.mauery@linux.intel.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | peci: Add support for PECI bus driver coreJae Hyun Yoo2019-03-207-0/+2093
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds driver implementation for PECI bus core into linux driver framework. PECI (Platform Environment Control Interface) is a one-wire bus interface that provides a communication channel from Intel processors and chipset components to external monitoring or control devices. PECI is designed to support the following sideband functions: * Processor and DRAM thermal management - Processor fan speed control is managed by comparing Digital Thermal Sensor (DTS) thermal readings acquired via PECI against the processor-specific fan speed control reference point, or TCONTROL. Both TCONTROL and DTS thermal readings are accessible via the processor PECI client. These variables are referenced to a common temperature, the TCC activation point, and are both defined as negative offsets from that reference. - PECI based access to the processor package configuration space provides a means for Baseboard Management Controllers (BMC) or other platform management devices to actively manage the processor and memory power and thermal features. * Platform Manageability - Platform manageability functions including thermal, power, and error monitoring. Note that platform 'power' management includes monitoring and control for both the processor and DRAM subsystem to assist with data center power limiting. - PECI allows read access to certain error registers in the processor MSR space and status monitoring registers in the PCI configuration space within the processor and downstream devices. - PECI permits writes to certain registers in the processor PCI configuration space. * Processor Interface Tuning and Diagnostics - Processor interface tuning and diagnostics capabilities (Intel Interconnect BIST). The processors Intel Interconnect Built In Self Test (Intel IBIST) allows for infield diagnostic capabilities in the Intel UPI and memory controller interfaces. PECI provides a port to execute these diagnostics via its PCI Configuration read and write capabilities. * Failure Analysis - Output the state of the processor after a failure for analysis via Crashdump. PECI uses a single wire for self-clocking and data transfer. The bus requires no additional control lines. The physical layer is a self-clocked one-wire bus that begins each bit with a driven, rising edge from an idle level near zero volts. The duration of the signal driven high depends on whether the bit value is a logic '0' or logic '1'. PECI also includes variable data transfer rate established with every message. In this way, it is highly flexible even though underlying logic is simple. The interface design was optimized for interfacing between an Intel processor and chipset components in both single processor and multiple processor environments. The single wire interface provides low board routing overhead for the multiple load connections in the congested routing area near the processor and chipset components. Bus speed, error checking, and low protocol overhead provides adequate link bandwidth and reliability to transfer critical device operating conditions and configuration information. This implementation provides the basic framework to add PECI extensions to the Linux bus and device models. A hardware specific 'Adapter' driver can be attached to the PECI bus to provide sideband functions described above. It is also possible to access all devices on an adapter from userspace through the /dev interface. A device specific 'Client' driver also can be attached to the PECI bus so each processor client's features can be supported by the 'Client' driver through an adapter connection in the bus. OpenBMC-Staging-Count: 2 Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Reviewed-by: Haiyue Wang <haiyue.wang@linux.intel.com> Reviewed-by: James Feist <james.feist@linux.intel.com> Reviewed-by: Vernon Mauery <vernon.mauery@linux.intel.com> [joel: Fix access_ok usage for 5.0] Signed-off-by: Joel Stanley <joel@jms.id.au>
* | Documentation: ioctl: Add ioctl numbers for PECI subsystemJae Hyun Yoo2019-03-201-0/+2
| | | | | | | | | | | | | | | | | | This commit updates ioctl-number.txt to reflect ioctl numbers used by the PECI subsystem. OpenBMC-Staging-Count: 2 Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | dt-bindings: Add a document of PECI subsystemJae Hyun Yoo2019-03-201-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds a document of generic PECI bus, adapter and client driver. OpenBMC-Staging-Count: 2 Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> Reviewed-by: Haiyue Wang <haiyue.wang@linux.intel.com> Reviewed-by: James Feist <james.feist@linux.intel.com> Reviewed-by: Vernon Mauery <vernon.mauery@linux.intel.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | dts: npcm7xx: Modify NPCM7xx device treeTomer Maimon2019-03-204-33/+3701
| | | | | | | | | | | | | | | | | | Modify NPCM7xx device tree to support all NPCM7xx modules drivers. OpenBMC-Staging-Count: 2 Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | /dev/mem: add a devmem kernel parameter to activate the deviceCédric Le Goater2019-03-203-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | For security reasons, some configuration needs to run without /dev/mem but on some occasions, to debug HW for instance, it's still useful to be able to reboot the system with access to physical memory. Add a kernel parameter which activates the /dev/mem device only when 'mem.devmem' is enabled. OpenBMC-Staging-Count: 3 Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | dt-bindings: rtc: Add ASPEED descriptionJoel Stanley2019-03-201-0/+18
| | | | | | | | | | | | | | Describe the RTC as used in the ASPEED ast2400 and ast2500 SoCs. OpenBMC-Staging-Count: 3 Signed-off-by: Joel Stanley <joel@jms.id.au>
* | rtc: Add ASPEED RTC driverJoel Stanley2019-03-203-0/+153
| | | | | | | | | | | | | | | | Read and writes the time to the non-battery backed RTC in the ASPEED AST2400 and AST2500 system on chip. OpenBMC-Staging-Count: 3 Signed-off-by: Joel Stanley <joel@jms.id.au>
* | mtd: spi-nor: fix options for mx66l51235fAlexander Amelkin2019-03-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently in driver spi-nor there is a line for mx66l51235l. According to Macronix site there is no such part number. The chip detected as such is actually mx66l51235f. According to the datasheet for mx66l51235f, "The device default is in 24-bit address mode" (section 9-10). Hence we removed SPI_NOR_4B_OPCODES option with this commit. OpenBMC-Staging-Count: 4 Fixes: d342b6a973af ("mtd: spi-nor: enable 4B opcodes for mx66l51235l") Signed-off-by: Alexander Soldatov <a.soldatov@yadro.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Lei YU <mine260309@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | dt-bindings: gpu: Add ASPEED GFX bindings documentJoel Stanley2019-03-201-0/+41
| | | | | | | | | | | | | | This describes the ASPEED BMC SoC's display controller. OpenBMC-Staging-Count: 4 Signed-off-by: Joel Stanley <joel@jms.id.au>
* | drm: aspeed: Debugfs interface for GFX registersJoel Stanley2019-03-204-0/+83
| | | | | | | | | | | | | | | | This exposes the GFX registers in debugfs for debugging. The idea is borrowed from the Broadcom driver. OpenBMC-Staging-Count: 4 Signed-off-by: Joel Stanley <joel@jms.id.au>
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