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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree changes from Arnd Bergmann:
"These changes from 30 individual branches for the most part update
device tree files, but there are also a few source code changes that
have crept in this time, usually in order to atomically move over a
driver from using hardcoded data to DT probing.
A number of platforms change their DT files to use the C preprocessor,
which is causing a bit of churn, but that is hopefully only this once"
* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (372 commits)
ARM: at91: dt: rm9200ek: add spi support
ARM: at91: dt: rm9200: add spi support
ARM: at91/DT: at91sam9n12: add SPI DMA client infos
ARM: at91/DT: sama5d3: add SPI DMA client infos
ARM: at91/DT: fix SPI compatibility string
ARM: Kirkwood: Fix the internal register ranges translation
ARM: dts: bcm281xx: change comment to C89 style
ARM: mmc: bcm281xx SDHCI driver (dt mods)
ARM: nomadik: add the new clocks to the device tree
clk: nomadik: implement the Nomadik clocks properly
ARM: dts: omap5-uevm: Provide USB Host PHY clock frequency
ARM: dts: omap4-panda: Fix DVI EDID reads
ARM: dts: omap4-panda: Add USB Host support
arm: mvebu: enable mini-PCIe connectors on Armada 370 RD
ARM: shmobile: irqpin: add a DT property to enable masking on parent
ARM: dts: AM43x EPOS EVM support
ARM: dts: OMAP5: Add bandgap DT entry
ARM: dts: AM33XX: Add pinmux configuration for CPSW to am335x EVM
ARM: dts: AM33XX: Add pinmux configuration for CPSW to EVMsk
ARM: dts: AM33XX: Add pinmux configuration for CPSW to beaglebone
...
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From Nicolas Ferre:
- more SPI DT activation for rm9200
- SPI DMA for at91sam9n12/sama5d3
And one little fix for SPI compatibility string
* tag 'at91-dt' of git://github.com/at91linux/linux-at91:
ARM: at91: dt: rm9200ek: add spi support
ARM: at91: dt: rm9200: add spi support
ARM: at91/DT: at91sam9n12: add SPI DMA client infos
ARM: at91/DT: sama5d3: add SPI DMA client infos
ARM: at91/DT: fix SPI compatibility string
Conflicts:
arch/arm/boot/dts/sama5d3.dtsi
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Tested-by: Wenyou Yang <wenyou.yang@atmel.com>
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In previous version of SPI driver we where using different compatibility stings
for finding SPI features. We are now using the IP revision information.
So we stay with the unique compatibility string for this driver:
"atmel,at91rm9200-spi".
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Tested-by: Wenyou Yang <wenyou.yang@atmel.com>
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next/dt
From Jason Cooper:
mvebu dt changes for v3.11 (round 6)
- mvebu
- mini-PCIe connectors on Armada 370 RD
- kirkwood
- correct internal register ranges translation
* tag 'dt-3.11-6' of git://git.infradead.org/users/jcooper/linux:
ARM: Kirkwood: Fix the internal register ranges translation
arm: mvebu: enable mini-PCIe connectors on Armada 370 RD
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Although the internal register window size is 1 MiB, the previous
ranges translation for the internal register space had a size of
0x4000000. This was done to allow the crypto and nand node to access
the corresponding 'sram' and 'nand' decoding windows.
In order to describe the hardware more accurately, we declare the
real 1 MiB internal register space in the ranges, and add a translation
entry for the nand node to access the 'nand' window.
This commit will make future improvements on the MBus DT binding easier.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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The Armada 370 RD board has two internal mini-PCIe connectors. This
commit adds the necessary Device Tree informations to enable the usage
of those mini-PCIe connectors.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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next/dt
From Christian Daudt:
* 'armsoc/for-3.11/dt' of git://github.com/broadcom/bcm11351:
ARM: dts: bcm281xx: change comment to C89 style
ARM: mmc: bcm281xx SDHCI driver (dt mods)
ARM: dts: bcm281xx: use existing defines for irqs
ARM: dts: bcm281xx: use #include for device tree files
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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CodingStyle does not allow C99 style comments. Since the
dts files live in the kernel for now, make this compliant.
Signed-off-by: Matt Porter <matt.porter@linaro.org>
Acked-by: Christian Daudt <csd@broadcom.com>
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Add SDHCI bindings for the Broadcom 281xx SoCs.
Changes from V2:
- Documentation cleanups
Changes from V1:
- split original patch into 2, one for driver and this one for dt
Signed-off-by: Christian Daudt <csd@broadcom.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
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Use the standard interrupt-controller and ARM GIC constants to
improve the readability of bcm281xx DT irq properties.
Signed-off-by: Matt Porter <matt.porter@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Christian Daudt <csd@broadcom.com>
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Replace /include/ by #include for bcm281xx device tree
files, enabling use of the C preprocessor.
Signed-off-by: Matt Porter <matt.porter@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Christian Daudt <csd@broadcom.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
From Simon Horman:
Second Round of Renesas ARM-based SoC DT updates for v3.11
* Increased DT coverage for renesas-intc-irqpin
by Guennadi Liakhovetski
* Clean up of address format used in sh73a0 dtsi file
by Guennadi Liakhovetski
* tag 'renesas-dt2-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: irqpin: add a DT property to enable masking on parent
ARM: shmobile: sh73a0: remove "0x" prefix from DT node names
irqchip: renesas-intc-irqpin: DT binding for sense bitfield width
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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To disable spurious interrupts, that get triggered on certain hardware, the
irqpin driver masks them on the parent interrupt controller. To specify
such broken devices a .control_parent parameter can be provided in the
platform data. In the DT case we need a property, to do the same.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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The convention for Device Tree node names is <device>@<hex-address>, where
the part after '@' shouldn't contain the "0x" prefix. Fix the sh73a0.dtsi
DT names.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Most Renesas irqpin controllers have 4-bit sense fields, however, some
have different widths. This patch adds a DT binding to optionally
specify such non-standard values.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt into next/dt
From Benoit Cousson:
omap devicetree changes for v3.11 merge window
- Add mandatory DT support for missing IPs, like USB host,
bandgap, LED, NAND, LAN, CPSW, PWM for OMAP and AMXX devices.
- Introduce new AM43x silicon.
* 'for_3.11/dts' of git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt: (52 commits)
ARM: dts: omap5-uevm: Provide USB Host PHY clock frequency
ARM: dts: omap4-panda: Fix DVI EDID reads
ARM: dts: omap4-panda: Add USB Host support
ARM: dts: AM43x EPOS EVM support
ARM: dts: OMAP5: Add bandgap DT entry
ARM: dts: AM33XX: Add pinmux configuration for CPSW to am335x EVM
ARM: dts: AM33XX: Add pinmux configuration for CPSW to EVMsk
ARM: dts: AM33XX: Add pinmux configuration for CPSW to beaglebone
ARM: dts: omap3-overo: Add default trigger for TWL4030 LED
ARM: dts: omap3-tobi: Correct polarity for GPIO LED
ARM: dts: omap3-tobi: Add SMSC911X node
ARM: dts: OMAP3: Include IRQ header
ARM: dts: Protect pinctrl headers against multiple inclusions
ARM: AM33XX: clock data: Enable clkout2 as part of init
ARM: AM33XX: clock: Add debugSS clock nodes
ARM: dts: OMAP5: Add Palmas MFD node and regulator nodes
ARM: dts: AM33XX: Add PWM backlight DT data to am335x-evmsk
ARM: dts: AM33XX: Add PWM backlight DT data to am335x-evm
ARM: dts: AM33XX: Add PWMSS device tree nodes
ARM: dts: OMAP4460: Add bandgap entry for OMAP4460 devices
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Tony Lindgren <tony@atomide.com>
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USB Host PHY clock on port 2 must be configured to 19.2MHz.
Provide this information.
Cc: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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On Panda the +5V supply for DVI EDID is supplied by the
same regulator that poweres the USB Hub. Currently, the
DSS/DVI subsystem doesn't know how to manage this regulator
and so DVI EDID reads will fail if USB Hub is not enabled.
As a temporary fix we keep this regulator permanently enabled
on boot. This fixes the DVI EDID read problem.
CC: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Provide the RESET and Power regulators for the USB PHY,
the USB Host port mode and the PHY device.
Also provide pin multiplexer information for the USB host
pins.
HACK: The reset control need to be replaced with the proper
gpio-controlled reset driver as soon it will be merged [1].
[1] http://thread.gmane.org/gmane.linux.drivers.devicetree/36830
Signed-off-by: Roger Quadros <rogerq@ti.com>
[benoit.cousson@linaro.org: Add disclaimer about the reset control
inside changelog and code]
Cc: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Add AM43x ePOS EVM minimal DT source - this is a minimal one to get
it booting. Also include it in omap2plus dtbs and document bindings.
The hardware is under development.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Add bandgap device DT entry for OMAP5 dtsi.
Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: J Keerthy <j-keerthy@ti.com>
[benoit.cousson@linaro.org: Fix alignement and use the macros
for IRQ attributes]
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Add pinmux configurations for RGMII based CPSW ethernet to am335x-evm.
Default mode is nothing but the values required for the module during
active state. With this configurations module is functional as
expected.
Sleep mode is nothing but the values required for the module during
inactive state. The pins are configured to its reset state to optimize
energy usage for the pins for the suspend/resume cycle
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Add pinmux configurations for RGMII based CPSW ethernet to AM335x EVMsk.
Default mode is nothing but the values required for the module during
active state. With this configurations module is functional as
expected.
Sleep mode is nothing but the values required for the module during
inactive state. The pins are configured to its reset state to optimize
energy usage for the pins for the suspend/resume cycle
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Add pinmux configurations for MII based CPSW ethernet to am335x-bone.
Default mode is nothing but the values required for the module during
active state. With this configurations module is functional as
expected.
Sleep mode is nothing but the values required for the module during
inactive state. The pins are configured to its reset state to optimize
energy usage for the pins for the suspend/resume cycle
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Commit c971ff1 'leds: leds-pwm: Defer led_pwm_set() if PWM can sleep'
fixed a crash when using a trigger with a pwm-led provided by an
external chip. Now it is safe to add the default trigger according
to board-overo.c.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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The LED is active low, not active high.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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The Tobi expansion boards embeds a SMSC LAN8700 PHY. Add the
corresponding node into the DT. The regulators are not designed
to be turned off.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Some nodes in OMAP3 DTS now use edge or level sensitive interrupts.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Pinctrl headers were not protected with #ifndef.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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clkout2 comes out on the pad and is being used by various
external on-board peripherals like, Audio codecs and stuff.
So enable the clkout2 by default during init sequence itself.
Also, add the missing entry of "clkout2_ck" to the clock table.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Represent debugSS clock interface as provided in
CM_WKUP_DEBUGSS_CLKCTRL register, includes
- Clock gate for optional DEBUG_CLKA and DBGSYSCLK
- Clock Mux for TRC_PMD and STM_PMD
- Clock divider for STM and TPIU
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Add Palmas MFD node and the regulator nodes for OMAP5.
The node definitions are based on: https://lkml.org/lkml/2013/6/6/25
Boot tested on omap5-uevm board.
Signed-off-by: Graeme Gregory <gg@slimlogic.co.uk>
Signed-off-by: J Keerthy <j-keerthy@ti.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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PWM output from ecap2 uses as backlight source. Also adds low threshold
value to have a uniform divisions in brightness-levels scales with
inverse polarity.
Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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PWM output from ecap0 uses as backlight source. Also adds low threshold
value to have a uniform divisions in brightness-levels scales.
Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Add PWMSS device tree nodes in relation with ECAP & EHRPWM DT nodes to
AM33XX SoC family. Also populates device tree nodes for ECAP & EHRPWM by
adding necessary properties like pwm-cells, base reg & set disabled as
status.
Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Add bandgap devices for OMAP4460 devices.
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Add the bandgap entry for OMAP4430 devices.
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
[benoit.cousson@linaro.org: Add blank line and fix reg presentation]
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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On most OMAP3 platforms, the twl4030 IRQ line is connected to the
SYS_NIRQ line on OMAP. Add another DTS include file
(twl4030_omap3.dtsi) for boards that hook up the twl4030 this way
to include.
This allows RTC wake from off-mode to work again on OMAP3-based
platforms with twl4030. Tested on 3530/Beagle, 3730/Beagle-xM,
3530/Overo, 3730/Overo-STORM.
Special thanks to Florian Vaussard for suggesting use of preprocessor
feature.
Cc: Florian Vaussard <florian.vaussard@epfl.ch>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Using the gpio-keys bindings, configure the user button on Beagle
boards. Since the user button is enabled as a wakeup source, also
ensure the GPIO pin is mux'd correctly and has IO ring wakeups enabled,
so it can also wakeup from off mode.
Special thanks to Florian Vaussard for suggesting the preprocessor
feature.
Cc: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Ensure the console uart (UART3) on these boards is mux'd correctly, and
IO ring wakeup is enabled.
This is needed for serial console wakeups when using DT boot.
Thanks to Florian Vaussard for suggestion to use preprocessor
features.
Cc: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Booting omap5 uevm results in the following error
"did not get pins for uart error: -19"
This happens because omap5 uevm dts file is not adapted
to use uart through pinctrl framework.
Populate uart pinctrl data to get rid of the error.
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
[r.sricharan@ti.com: Replaced constants with preprocessor macros]
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Add support for blue LED 1 off of GPIO 153.
Make the LED a heartbeat LED
Configure the MUX for GPIO output.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
[r.sricharan@ti.com: Replaced constants with preprocessor macros]
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Provide the RESET regulators for the USB PHYs, the USB Host
port modes and the PHY devices.
Also provide pin multiplexer information for the USB host
pins.
Signed-off-by: Roger Quadros <rogerq@ti.com>
[r.sricharan@ti.com: Replaced constants with preprocessor macros]
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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The uevm is the only official board supported for the OMAP5 soc
in mainline. The existent sevm platform will no more be supported.
Hence cleaning up the board dts file to have only the data
required for uevm.
Renaming the board dts file and adding the following cleanups.
* There are no devices connected on I2C 2,3,4 buses. So remove
the pinmux data for the same.
* OMAP5432 and DDR3 memory is used in the uevm. Temperature polling
is not supported with DDR3 memories. Because of DDR3 phy limitation
the voltage change across DVFS and all shadow registers for DVFS on
DDR3 is not supported. Hence the emif kernel driver is not required,
so removing the DDR3 device file and emif nodes for uevm.
* Keypad is not supported on uevm. So remove the device node.
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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When making the dtbs target on OMAP/AM35xx, some trees are not
built.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Using constants for pinctrl allows a better readability, and removes
redundancy with comments.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Tested-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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