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| * | | ARM: shmobile: sh73a0: Add restart callbackGeert Uytterhoeven2014-11-121-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Port the sh73a0 restart handling from the kzm9g-legacy board code to the generic sh73a0 code. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | | | Merge tag 'renesas-soc2-for-v3.19' of ↵Arnd Bergmann2014-11-196-25/+68
|\ \ \ \ | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Pull "Second Round of Renesas ARM Based SoC Soc Updates for v3.19" from Simon Horman: * Enable PCI domains for R-Car Gen2 devices * Make APMU resource code SoC-specific * tag 'renesas-soc2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: Enable PCI domains for R-Car Gen2 devices ARM: shmobile: r8a7791: Correct number of CPU cores ARM: shmobile: Separate APMU resource data into CPU dependant part Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | ARM: shmobile: Enable PCI domains for R-Car Gen2 devicesPhil Edworthy2014-11-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCI core will soon automatically handle the PCI domain number, allowing the internal PCI and external PCIe bridges work at the same time. In order for that to work, we need to enable PCI_DOMAINS. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | ARM: shmobile: r8a7791: Correct number of CPU coresHisashi Nakamura2014-11-041-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The r8a7791 only has 2 CPU CA15 cores, not 4 CA15 and 4 CA7 cores. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | ARM: shmobile: Separate APMU resource data into CPU dependant partHisashi Nakamura2014-11-045-25/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | APMU resources are not common to all R-Car SoCs so don't share this data. A subsequent patch will correct the CPU cores for the r8a7791. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | | | Merge tag 'renesas-soc-for-v3.19' of ↵Arnd Bergmann2014-11-194-31/+66
|\ \ \ \ | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Pull "Renesas ARM Based SoC Soc Updates for v3.19" from Simon Horman: * Select CONFIG_ZONE_DMA when CONFIG_ARM_LPAE is enabled * Add CA7 arch_timer initialization for r8a7794 * Handle CA7 arch timer delay * Add shmobile_init_late() to sh7372 - This is consistent with other shmobile SoCs * tag 'renesas-soc-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: Select CONFIG_ZONE_DMA when CONFIG_ARM_LPAE is enabled ARM: shmobile: rcar-gen2: Add CA7 arch_timer initialization for r8a7794 ARM: shmobile: sh7372: Add shmobile_init_late() ARM: shmobile: Handle CA7 arch timer delay Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | ARM: shmobile: Select CONFIG_ZONE_DMA when CONFIG_ARM_LPAE is enabledLaurent Pinchart2014-10-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most IP cores on ARM Renesas platforms can only address 32 bits of physical memory for DMA. Without CONFIG_ZONE_DMA enabled and with the recent CMA highmem allocation support, the default CMA zone is reserved above the 4GiB limit when LPAE is enabled, resulting in various driver failures. Fix the problem by selecting CONFIG_ZONE_DMA. Other options to investigate in the future would be to either enable IOMMU support or use custom CMA reservations for peripherals not supporting LPAE. While not a strict dependency, the "[PATCH 0/4] Low/high memory CMA reservation fixes" series is also required to fix a different but related CMA allocation problem. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | ARM: shmobile: rcar-gen2: Add CA7 arch_timer initialization for r8a7794Ulrich Hecht2014-10-271-23/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On E2, the arch timer is hooked up to a different clock, and the CA7's arch timer CNTVOFF register must be initialized. Based on work by Hisashi Nakamura. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | ARM: shmobile: sh7372: Add shmobile_init_late()Geert Uytterhoeven2014-10-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Extend sh7372 SoC machine vector to include shmobile_init_late() so Suspend-to-RAM and CPUIdle are setup as expected. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | ARM: shmobile: Handle CA7 arch timer delayMagnus Damm2014-10-241-8/+15
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | Update the delay code to include arch timer checks for CA7. From a arch timer availability perspective CA7 should be treated same as CA15. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | | Merge tag 'renesas-runtime-pm-for-v3.19' of ↵Arnd Bergmann2014-11-193-5/+62
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Merge "Renesas ARM Based SoC Runtime PM Updates for v3.19" * 8a7740/armadillo800eva legacy PM domain support * tag 'renesas-runtime-pm-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7740: Add A3SM pm domain support ARM: shmobile: r8a7740: Add A4SU pm domain support ARM: shmobile: r8a7740/armadillo legacy: Add A4R pm domain support ARM: shmobile: r8a7740: Add D4 pm domain support ARM: shmobile: r8a7740/armadillo legacy: Add A4MP pm domain support ARM: shmobile: r8a7740: Add A3SG pm domain support ARM: shmobile: r8a7740: Add A3RV pm domain support ARM: shmobile: armadillo800eva legacy: Add missing A4S pm domain devices ARM: shmobile: armadillo800eva legacy: Add missing A3SP pm domain devices ARM: shmobile: r8a7740: Add missing A4S pm domain devices ARM: shmobile: r8a7740: Add missing A3SP pm domain devices Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | ARM: shmobile: r8a7740: Add A3SM pm domain supportGeert Uytterhoeven2014-10-281-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the A3SM power domain, and hook it up as a subdomain of A4S. This domain contains the System CPU (Cortex-A9) hardware block. Hence move the special CPU handling from A4S to A3SM. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | ARM: shmobile: r8a7740: Add A4SU pm domain supportGeert Uytterhoeven2014-10-281-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the A4SU power domain. This domain contains the USBPHY hardware block, which is currently not used by any driver. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | ARM: shmobile: r8a7740/armadillo legacy: Add A4R pm domain supportGeert Uytterhoeven2014-10-283-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the A4R power domain, and hook up the A3RV subdomain, and the CEU0, TMU0, and IIC0 hardware blocks. This domain also contains the Realtime CPU (SH-4A), Realtime CPU debug modules, H-UDI, RT-SHwy, INTCS, RT-HPB, VIO6C, JPU, RTDMAC1/2, SSP, MSIOF0, CMT0, ICB, DREQPAK (RT), 2DDMAC, IPMMUI, and 2DG hardware blocks, but these are currently not used by any driver. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | ARM: shmobile: r8a7740: Add D4 pm domain supportGeert Uytterhoeven2014-10-281-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the D4 power domain. This domain contains the Coresight-ETM hardware block. As long as the ARM debug/perf code doesn't use resource management with runtime PM support, the D4 power domain must be kept powered to avoid a crash during resume from s2ram (dbg_cpu_pm_notify() calls reset_ctrl_regs() unconditionally, causing an undefined instruction oops). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | ARM: shmobile: r8a7740/armadillo legacy: Add A4MP pm domain supportGeert Uytterhoeven2014-10-282-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the A4MP power domain, and hook up the HDMI-Link and FSI hardware blocks. This domain also contains the SPU2, FMSI, and BBIF2 hardware blocks, but these are currently not used by any driver. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | ARM: shmobile: r8a7740: Add A3SG pm domain supportGeert Uytterhoeven2014-10-281-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the A3SG power domain, and hook it up as a subdomain of A4S. This domain contains the SGX540 hardware block, which is currently not used by any driver. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | ARM: shmobile: r8a7740: Add A3RV pm domain supportGeert Uytterhoeven2014-10-281-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the A3RV power domain. This domain contains the VPU5F and VCP1 hardware blocks, which are currently not used by any driver. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | ARM: shmobile: armadillo800eva legacy: Add missing A4S pm domain devicesGeert Uytterhoeven2014-10-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 8459293c27bcd13a ("ARM: shmobile: r8a7740: add A4S pm domain support") added the A4S power domain, but forgot to hook up the GbEther hardware block. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | ARM: shmobile: armadillo800eva legacy: Add missing A3SP pm domain devicesGeert Uytterhoeven2014-10-281-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 802a5639aa7041b2 ("ARM: shmobile: r8a7740: add A3SP pm domain support") added the A3SP power domain, but forgot to hook up the TPU, SDHI0/1, and MMCIF hardware blocks. Note: As the default PM QoS latency constraint for SDHI is only 100 µs (cfr. commit c419e611c3c59c0e ("tmio_mmc / PM: Use PM QoS latency constraint"), while DEFAULT_DEV_LATENCY_NS is 250000, suspend fails with -EBUSY, unless the constraint is increased first to more than 500 µs using e.g. echo 501 > /sys/devices/platform/sh_mobile_sdhi.0/power/pm_qos_resume_latency_us Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | ARM: shmobile: r8a7740: Add missing A4S pm domain devicesGeert Uytterhoeven2014-10-281-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 8459293c27bcd13a ("ARM: shmobile: r8a7740: add A4S pm domain support") added the A4S power domain, but forgot to hook up the INTCA hardware block. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | ARM: shmobile: r8a7740: Add missing A3SP pm domain devicesGeert Uytterhoeven2014-10-281-0/+5
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | Commit 802a5639aa7041b2 ("ARM: shmobile: r8a7740: add A3SP pm domain support") added the A3SP power domain, but forgot to hook up the IPPMU, DMAC0/1/2, and USBDMAC hardware blocks. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | | ARM: fix multiplatform allmodcompileLinus Walleij2014-11-111-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 68f3b875f7848f5304472184a4634148c5330cbd "ARM: integrator: make the Integrator multiplatform" broke allmodconfig like this: >> arch/arm/include/asm/cmpxchg.h:114:2: error: #error "SMP is not supported on this platform" (etc) This is due to the fact that as we turned on multiplatform for the Integrator, this enabled a lot of non-applicable CPU's to be selected for its multiplatform images, due to a lot of "depends on ARCH_INTEGRATOR" restrictions in arch/arm/mm/Kconfig for the different ARM CPU types. Fix this by restricting the CPU selections to respective multiplatform config, which now becomes a subset of the possible Integrator configurations, or alternatively the non-multiplatform config plus ARCH_INTEGRATOR, i.e.: if (!ARCH_MULTIPLATFORM || ARCH_MULTI_Vx) && (ARCH_INTEGRATOR || ARCH_FOO ...) Since the Integrator has been converted to multiplatform, this will often take the short form: if (ARCH_MULTI_Vx && ARCH_INTEGRATOR) If no other non-multiplatform platforms are elegible. Reported-by: Build bot for Mark Brown <broonie@kernel.org> Reported-by: Kbuild test robot <fengguang.wu@intel.com> Suggested-by: Russell King <linux@arm.linux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | | Merge tag 'ux500-core-for-arm-soc' of ↵Olof Johansson2014-11-089-36/+203
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/soc Merge "Ux500 core changes for v3.19" from Linus Walleij: "please pull in these Ux500 core changes for this kernel development cycle: mainly a generic power domain implementation from Ulf Hansson that needs to get queued up in -next and tested." Generic power domains for the Ux500 * tag 'ux500-core-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: ARM: ux500: Add i2c devices to the VAPE PM domain ARM: ux500: Add spi and ssp devices to the VAPE PM domain ARM: ux500: Add sdi devices to the VAPE PM domain ARM: ux500: Add DT node for ux500 PM domains ARM: ux500: Enable Kconfig for the generic PM domain ARM: ux500: Initial support for PM domains dt: bindings: ux500: Add header for PM domains specifiers dt: bindings: ux500: Add documentation for PM domains ARM: u300: Convert pr_warning to pr_warn
| * | | ARM: ux500: Add i2c devices to the VAPE PM domainUlf Hansson2014-10-281-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i2c-nomadik driver handle these devices properly from a runtime PM perspective. Therefore, let's add them into VAPE PM domain for ux500. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | ARM: ux500: Add spi and ssp devices to the VAPE PM domainUlf Hansson2014-10-281-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The spi-pl022 driver handle these devices properly from a runtime PM perspective. Therefore, let's add them into VAPE PM domain for ux500. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | ARM: ux500: Add sdi devices to the VAPE PM domainUlf Hansson2014-10-281-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mmci driver handle these devices properly from a runtime PM perspective, including register context save/restore. Therefore let's add them into VAPE PM domain for ux500. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | ARM: ux500: Add DT node for ux500 PM domainsUlf Hansson2014-10-281-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a DT node for the ux500 PM domains. Follow the DT semantics of the generic PM domain. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | ARM: ux500: Enable Kconfig for the generic PM domainUlf Hansson2014-10-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since ux500 uses the generic PM domain, let's enable the corresponding Kconfig as long as CONFIG_PM also is enabled. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | ARM: ux500: Initial support for PM domainsUlf Hansson2014-10-284-0/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ux500 SoC uses the generic PM domain and requires the domains to be specified through DT. Currently the genpd callbacks for handling power gating|ungating are implemented as dummy functions. To be able to enable those to perform PM domain gating/ungating, each device that resides in the VAPE domain must be properly handled from a runtime PM perspective. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | dt: bindings: ux500: Add header for PM domains specifiersUlf Hansson2014-10-281-0/+15
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | dt: bindings: ux500: Add documentation for PM domainsUlf Hansson2014-10-281-0/+35
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | ARM: u300: Convert pr_warning to pr_warnJoe Perches2014-10-281-36/+29
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the more common pr_warn. Other miscellanea: o Coalesce formats o Realign arguments o typo fixes of Siple to Simple Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | Merge tag 'berlin-soc-3.19-1' of ↵Olof Johansson2014-11-081-1/+3
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.infradead.org/users/hesselba/linux-berlin into next/soc Merge "ARM: berlin: SoC changes for v3.19 (round 1)" from Sebastian Hesselbarth: Berlin SoC changes for v3.19 (round 1) - Select the reset driver for all SoCs * tag 'berlin-soc-3.19-1' of git://git.infradead.org/users/hesselba/linux-berlin: ARM: Berlin: select the reset controller Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | ARM: Berlin: select the reset controllerAntoine Ténart2014-10-211-1/+3
| | |/ | |/| | | | | | | | | | | | | | | | | | | The Marvell Berlin SoCs now has a reset controller. Add the needed configuration. While at it reorder Kconfigs alphabetically. Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* | | Merge branch 'v3.19-next/pm-samsung-2' of ↵Olof Johansson2014-11-0816-301/+559
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc Merge "1st Round of Samsung PM updates for v3.19" from Kukjin Kim: Samsung PM (v2) updates for v3.19 - added fix build with ARM_CPU_SUSPEND=n based on previous tags/samsung-pm - Refactor the pm code to use DT based lookup instead of using "soc_is_exynosxxxx" - Firmware supporting suspend and resume to excute of low level operations to enter and leave power mode for exynos : introduce suspend() and resume() firmware operations - Fix AFTR mode on boards with secure firmware enabled and allows exynos cpuidle driver usage on exynos4x12 SoCs - Fix build with PM_SLEEP=n and ARM_EXYNOS_CPUIDLE=y - SWRESET is needed to boot secondary CPU on exynos3250 * 'v3.19-next/pm-samsung-2' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Fix build with ARM_CPU_SUSPEND=n ARM: EXYNOS: SWRESET is needed to boot secondary CPU on exynos3250 ARM: EXYNOS: Fix build with PM_SLEEP=n and ARM_EXYNOS_CPUIDLE=y ARM: EXYNOS: allow driver usage on Exynos4x12 SoCs ARM: EXYNOS: fix register setup for AFTR mode code ARM: EXYNOS: add secure firmware support to AFTR mode code ARM: firmware: add AFTR mode support to firmware do_idle method ARM: EXYNOS: replace EXYNOS_BOOT_VECTOR_* macros by static inlines ARM: EXYNOS: Add support for firmware-assisted suspend/resume ARM: firmware: Introduce suspend and resume operations ARM: EXYNOS: Refactor the pm code to use DT based lookup ARM: EXYNOS: Move Disabling of JPEG USE_RETENTION for exynos5250 to pmu.c Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | ARM: EXYNOS: Fix build with ARM_CPU_SUSPEND=nArnd Bergmann2014-10-282-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "ARM: EXYNOS: Add support for firmware-assisted suspend/resume" patch added to arch/arm/mach-exynos/firmware.c new references to functions from arch/arm/mach-exynos/sleep.S causing the new CONFIG_PM_SLEEP=n build breakages. Then "ARM: EXYNOS: Fix build with PM_SLEEP=n and ARM_EXYNOS_CPUIDLE=y" patch tried to fix the CONFIG_PM_SLEEP=n issues by always building sleep.S which caused the CONFIG_ARM_CPU_SUSPEND=n build breakage. Fix it by building arch/arm/mach-exynos/sleep.o only for CONFIG_EXYNOS_CPU_SUSPEND=y and adding appropriate IS_ENABLED() checks to arch/arm/mach-exynos/firmware.c. Signed-off-by: Arnd Bergmann <arnd@arndb.de> [b.zolnierkie: fixed ->resume check and added patch description] Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | ARM: EXYNOS: SWRESET is needed to boot secondary CPU on exynos3250Krzysztof Kozlowski2014-10-212-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without software reset the secondary CPU does not power up and exynos_boot_secondary() ends with pen_release equal to 1. This can be observed in dmesg: CPU1: failed to come online Brought up 1 CPUs SMP: Total of 1 processors activated. CPU: All CPU(s) started in SVC mode. When booting the secondary CPU on Exynos3250 execute also software reset for core 1. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | ARM: EXYNOS: Fix build with PM_SLEEP=n and ARM_EXYNOS_CPUIDLE=yBartlomiej Zolnierkiewicz2014-10-216-335/+374
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix building of exynos_defconfig with CONFIG_PM_SLEEP disabled and CONFIG_ARM_EXYNOS_CPUIDLE enabled by: * adding EXYNOS_CPU_SUSPEND config option * always building sleep.o * building pm.o if EXYNOS_CPU_SUSPEND is enabled * moving suspend specific code from pm.c to suspend.c * enabling pm-common.o build also for EXYNOS_CPU_SUSPEND option [ Please note that there are no changes in the code moved from pm.c to suspend.c except making few functions non-static and cleaning up includes. ] Also while at it update Copyright dates. The build error messages: drivers/built-in.o: In function `exynos_enter_core0_aftr': /home/bzolnier/linux/drivers/cpuidle/cpuidle-exynos.c:36: undefined reference to `cpu_suspend' arch/arm/mach-exynos/built-in.o:(.data+0x74): undefined reference to `exynos_enter_aftr' make: *** [vmlinux] Error 1 This patch has been tested on Exynos4210 based Origen board. Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | ARM: EXYNOS: allow driver usage on Exynos4x12 SoCsBartlomiej Zolnierkiewicz2014-10-211-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Register cpuidle platform device on Exynos4x12 SoCs allowing EXYNOS cpuidle driver usage on these SoCs. AFTR mode reduces power consumption on Trats2 board (Exynos4412 SoC with secure firmware enabled) by ~12% when EXYNOS cpuidle driver is enabled (in both cases the default exynos_defconfig config is used and CPU1-3 are offlined). Currently Exynos4412 SoC support is limited to Trats2 board. Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | ARM: EXYNOS: fix register setup for AFTR mode codeBartlomiej Zolnierkiewicz2014-10-211-7/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add S5P_CENTRAL_SEQ_OPTION register setup to cpuidle AFTR mode code by moving the relevant code from exynos_pm_suspend() (used only by suspend) to exynos_pm_central_suspend() (used by both suspend and AFTR). Without this setup AFTR mode doesn't show any benefit over WFI one (at least on Exynos4412 SoC). When this setup is applied AFTR mode reduces power consumption by ~12% (as measured on Trats2 board). This change is a preparation for adding secure firmware support to EXYNOS cpuidle driver. Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | ARM: EXYNOS: add secure firmware support to AFTR mode codeBartlomiej Zolnierkiewicz2014-10-212-12/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Move cp15 registers saving to exynos_save_cp15() helper and add additional helper usage to do_idle firmware method. * Use resume firmware method instead of exynos_cpu_restore_register() and skip exynos_cpu_save_register() on boards with secure firmware enabled. * Use sysram_ns_base_addr + 0x24/0x20 addresses instead of the default ones used by exynos_cpu_set_boot_vector() on boards with secure firmware enabled. * Use do_idle firmware method instead of cpu_do_idle() on boards with secure firmware enabled. Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | ARM: firmware: add AFTR mode support to firmware do_idle methodBartlomiej Zolnierkiewicz2014-10-214-4/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On some platforms (i.e. EXYNOS ones) more than one idle mode is available and we need to distinguish them in firmware do_idle method. Add mode parameter to do_idle firmware method and AFTR mode support to EXYNOS do_idle implementation. This change is a preparation for adding secure firmware support to EXYNOS cpuidle driver. This patch shouldn't cause any functionality changes. Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | ARM: EXYNOS: replace EXYNOS_BOOT_VECTOR_* macros by static inlinesBartlomiej Zolnierkiewicz2014-10-211-12/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace EXYNOS_BOOT_VECTOR_ADDR and EXYNOS_BOOT_VECTOR_FLAG macros by exynos_boot_vector_addr() and exynos_boot_vector_flag() static inlines. This patch shouldn't cause any functionality changes. Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | ARM: EXYNOS: Add support for firmware-assisted suspend/resumeTomasz Figa2014-10-216-5/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On a numer of Exynos-based boards Linux kernel is running in non-secure mode under a secure firmware. This means that certain operations need to be handled in special way, with firmware assistance. System-wide suspend/resume is an example of such operations. This patch adds support for firmware-assisted suspend/resume by leveraging recently introduced suspend and resume firmware operations and modifying existing suspend/resume paths to account for presence of secure firmware. Signed-off-by: Tomasz Figa <t.figa@samsung.com> [kgene.kim@samsung.com: rebased] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | ARM: firmware: Introduce suspend and resume operationsTomasz Figa2014-10-212-23/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch extends the firmware_ops structure with two new callbacks: .suspend() and .resume(). The former is intended to ask the firmware to save all its volatile state and suspend the system, without returning back to the kernel in between. The latter is to be called early by very low level platform suspend code after waking up to restore low level hardware state, which can't be restored in non-secure mode. While at it, outdated version of the structure is removed from the documentation and replaced with a reference to the header file. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | ARM: EXYNOS: Refactor the pm code to use DT based lookupVikas Sajjan2014-10-212-42/+126
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refactoring the pm.c to avoid using "soc_is_exynos" checks, instead use the DT based lookup. While at it, consolidate the common code across SoCs and create static helper functions. Signed-off-by: Vikas Sajjan <vikas.sajjan@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | ARM: EXYNOS: Move Disabling of JPEG USE_RETENTION for exynos5250 to pmu.cVikas Sajjan2014-10-212-6/+2
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the Disabling of JPEG USE_RETENTION for exynos5250 to pmu.c to make way for refactoring of pm.c and to create common functions across exynos4 and exynos5250. Signed-off-by: Vikas Sajjan <vikas.sajjan@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | | Merge tag 'integrator-multiplatform-for-arm-soc' of ↵Olof Johansson2014-11-034-66/+21
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/soc Merge "Integrator multiplatform migration for v3.19" from Linus Walleij: Multiplatform migration of the Integrator. * tag 'integrator-multiplatform-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator: ARM: integrator: set V4T and V5 as default multitargets ARM: integrator: make the Integrator multiplatform Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | ARM: integrator: set V4T and V5 as default multitargetsLinus Walleij2014-10-221-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When switching the Integrator machines to multiplatform, the V7 target becomes default, but most Integrators are V4T or V5, so set these two as default in the defconfig and deselect V7. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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