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* [ARM] fix constant values of MAX_DMA_ADDRESSRussell King2008-11-293-10/+2
| | | | | | | | | Since 8d5796d2ec6b5a4e7a52861144e63af438d6f8f7, we have allowed PAGE_OFFSET to be configurable, so a constant virtual address for MAX_DMA_ADDRESS is buggy. It should be defined in terms of PAGE_OFFSET rather than a constant virtual address. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] move MAX_DMA_ADDRESS to mach/memory.hRussell King2008-11-2914-44/+20
| | | | | | | Move the definition of MAX_DMA_ADDRESS from mach/dma.h to mach/memory.h, thereby placing it along side its relative, ISA_DMA_THRESHOLD. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Remove unnecessary mach/hardware.h includes in arch/arm/mmRussell King2008-11-283-3/+0
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] asm/system.h does not require asm/memory.hRussell King2008-11-281-2/+0
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] ns9xxx: mach/hardware.h doesn't need asm/memory.hRussell King2008-11-281-2/+0
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] ixp4xx: clean up includesRussell King2008-11-282-5/+1
| | | | | | | mach/io.h doesn't need linux/mm.h. mach/dma.h doesn't need linux/device.h, asm/page.h or mach/hardware.h Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] ixp23xx: mach/io.h doesn't need BUG() anymoreRussell King2008-11-281-2/+0
| | | | | | | ixp23xx's mach/io.h claims to need linux/kernel.h for BUG(). However, this header doesn't make use of BUG(). Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] iop13xx: avoid polluting the kernel's namespaceRussell King2008-11-281-2/+0
| | | | | | | Avoid unnecessarily pollution of the kernel's namespace by avoiding mach/hardware.h in mach/timex.h. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] iop3xx: avoid polluting the kernel's namespaceRussell King2008-11-287-13/+4
| | | | | | | | Avoid unnecessarily pollution of the kernel's namespace by avoiding mach/hardware.h in mach/io.h, mach/memory.h and mach/timex.h. Include this header file where necessary. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] shark: avoid polluting the kernel's namespaceRussell King2008-11-283-25/+6
| | | | | | | Avoid unnecessarily pollution of the kernel's namespace by avoiding mach/hardware.h in mach/io.h. Include this header file where necessary. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] shark: remove old unused "translated" IO macrosRussell King2008-11-281-17/+0
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] clps711x: avoid polluting the kernel's namespaceRussell King2008-11-281-2/+0
| | | | | | | Avoid unnecessarily pollution of the kernel's namespace by avoiding mach/hardware.h in mach/io.h. Include this header file where necessary. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] footbridge: mach/hardware.h doesn't require mach/memory.hRussell King2008-11-281-2/+0
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] footbridge: avoid polluting the kernel's namespaceRussell King2008-11-282-4/+2
| | | | | | | Avoid unnecessarily pollution of the kernel's namespace by avoiding mach/hardware.h in mach/io.h. Include this header file where necessary. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] aaec2000: avoid polluting the kernel's namespaceRussell King2008-11-281-2/+0
| | | | | | | Avoid unnecessarily pollution of the kernel's namespace by avoiding mach/hardware.h in mach/io.h. Include this header file where necessary. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] lh7a40x: avoid polluting the kernel's namespaceRussell King2008-11-282-3/+2
| | | | | | | Avoid unnecessarily pollution of the kernel's namespace by avoiding mach/hardware.h in mach/io.h. Include this header file where necessary. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] l7200: avoid polluting the kernel's namespaceRussell King2008-11-281-2/+0
| | | | | | | Avoid unnecessarily pollution of the kernel's namespace by avoiding mach/hardware.h in mach/io.h. Include this header file where necessary. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] h720x: avoid polluting the kernel's namespaceRussell King2008-11-281-2/+0
| | | | | | | Avoid unnecessarily pollution of the kernel's namespace by avoiding mach/hardware.h in mach/io.h. Include this header file where necessary. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] imx: avoid polluting the kernel's namespaceRussell King2008-11-281-2/+0
| | | | | | | Avoid unnecessarily pollution of the kernel's namespace by avoiding mach/hardware.h in mach/io.h. Include this header file where necessary. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: avoid polluting the kernel's namespaceRussell King2008-11-287-3/+8
| | | | | | | Avoid unnecessarily pollution of the kernel's namespace by avoiding mach/hardware.h. Include this header file where necessary. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] rpc: remove obsolete IO accessorsRussell King2008-11-281-46/+1
| | | | | | | Remove __arch_base_xxx() and __ioaddrc() macros; they're obsolete and unused. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] versatile: remove IRQ mask definitionsRussell King2008-11-282-144/+0
| | | | | | These definitions are unused and serve no purpose with genirq. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'highmem' into develRussell King2008-11-2868-1254/+771
|\ | | | | | | | | | | Conflicts: arch/arm/mach-clps7500/include/mach/memory.h
| * [ARM] remove a common set of __virt_to_bus definitionsNicolas Pitre2008-11-2839-299/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's provide an overridable default instead of having every machine class define __virt_to_bus and __bus_to_virt to the same thing. What most platforms are using is bus_addr == phys_addr so such is the default. One exception is ebsa110 which has no DMA what so ever, so the actual definition is not important except only for proper compilation. Also added a comment about the special footbridge bus translation. Let's also remove comments alluding to set_dma_addr which is not (and should not) be commonly used. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] unconditionally define __virt_to_phys and __phys_to_virtNicolas Pitre2008-11-281-2/+0
| | | | | | | | | | | | | | | | | | There is no machine class overriding this. If non linear translations are implemented again for some machines then this could be restored at that time. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] remove bogus #ifdef CONFIG_HIGHMEM in show_pte()Nicolas Pitre2008-11-281-2/+4
| | | | | | | | | | | | | | | | | | | | The restriction on !CONFIG_HIGHMEM is unneeded since page tables are currently never allocated with highmem pages, and actually disable PTE dump whenever highmem is configured. Let's have a dynamic test to better describe the current limitation instead. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] prevent the vmalloc cmdline argument from eating all memoryNicolas Pitre2008-11-281-0/+7
| | | | | | | | | | | | | | | | | | Commit 8d5796d2ec6b5a4e7a52861144e63af438d6f8f7 allows for the vmalloc area to be resized from the kernel cmdline. Make sure it cannot overlap with RAM entirely. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] mem_init() cleanupsNicolas Pitre2008-11-281-21/+24
| | | | | | | | | | | | | | | | | | | | | | Make free_area() arguments pfn based, and return number of freed pages. This will simplify highmem initialization later. Also, codepages, datapages and initpages are actually codesize, datasize and initsize. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] split highmem into its own memory bankNicolas Pitre2008-11-281-33/+51
| | | | | | | | | | | | | | | | | | Doing so will greatly simplify the bootmem initialization code as each bank is therefore entirely lowmem or highmem with no crossing between those zones. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] rationalize memory configuration code some moreNicolas Pitre2008-11-286-59/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently there are two instances of struct meminfo: one in kernel/setup.c marked __initdata, and another in mm/init.c with permanent storage. Let's keep only the later to directly populate the permanent version from arm_add_memory(). Also move common validation tests between the MMU and non-MMU cases into arm_add_memory() to remove some duplication. Protection against overflowing the membank array is also moved in there in order to cover the kernel cmdline parsing path as well. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] fix a couple clear_user_highpage assembly constraintsNicolas Pitre2008-11-287-34/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | In all cases the kaddr is assigned an input register even though it is modified in the assembly code. Let's assign a new variable to the modified value and mark those inline asm with volatile otherwise they get optimized away because the output variable is otherwise not used. Also fix a few conversion errors in copypage-feroceon.c and copypage-v4mc.c. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] clearpage: provide our own clear_user_highpage()Russell King2008-11-2710-100/+100
| | | | | | | | | | | | | | For similar reasons as copy_user_page(), we want to avoid the additional kmap_atomic if it's unnecessary. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] copypage: provide our own copy_user_highpage()Russell King2008-11-2710-83/+161
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We used to override the copy_user_page() function. However, this is not only inefficient, it also causes additional complexity for highmem support, since we convert from a struct page to a kernel direct mapped address and back to a struct page again. Moreover, with highmem support, we end up pointlessly setting up kmap entries for pages which we're going to remap. So, push the kmapping down into the copypage implementation files where it's required. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] copypage: convert assembly files to CRussell King2008-11-2710-411/+431
| | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * Allow architectures to override copy_user_highpage()Russell King2008-11-271-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With aliasing VIPT cache support, the ARM implementation of clear_user_page() and copy_user_page() sets up a temporary kernel space mapping such that we have the same cache colour as the userspace page. This avoids having to consider any userspace aliases from this operation. However, when highmem is enabled, kmap_atomic() have to setup mappings. The copy_user_highpage() and clear_user_highpage() call these functions before delegating the copies to copy_user_page() and clear_user_page(). The effect of this is that each of the *_user_highpage() functions setup their own kmap mapping, followed by the *_user_page() functions setting up another mapping. This is rather wasteful. Thankfully, copy_user_highpage() can be overriden by architectures by defining __HAVE_ARCH_COPY_USER_HIGHPAGE. However, replacement of clear_user_highpage() is more difficult because its inline definition is not conditional. It seems that you're expected to define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE and provide a replacement __alloc_zeroed_user_highpage() implementation instead. The allocation itself is fine, so we don't want to override that. What we really want to do is to override clear_user_highpage() with our own version which doesn't kmap_atomic() unnecessarily. Other VIPT architectures (PARISC and SH) would also like to override this function as well. Acked-by: Hugh Dickins <hugh@veritas.com> Acked-by: James Bottomley <James.Bottomley@HansenPartnership.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * Merge branch 'omap-fixes' of ↵Russell King2008-11-274-331/+4
| |\ | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
| | * ARM: OMAP: Fixes for suspend / resume GPIO wake-up handlingTero Kristo2008-11-261-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use the correct wake-up enable register, and make it work with 34xx also. Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP: Typo fix for clock_allow_idleAmit Kucheria2008-11-251-1/+1
| | | | | | | | | | | | | | | | | | | | | The second clk_deny_idle instance should be clk_allow_idle instead. Signed-off-by: Amit Kucheria <amit.kucheria@verdurent.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP: Remove broken LCD driver for SX1Tony Lindgren2008-11-242-328/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Recently the omap McBSP code was cleaned up to get rid of direct McBSP register tinkering by the drivers. Looks like lcd_sx1.c never got converted, and now it breaks builds. It seems the lcd_sx1.c driver is attempting SPI mode, but doing it in a different way compared to omap_mcbsp_set_spi_mode(). Remove the broken driver, patches welcome to add it back when done properly by patching both mcbsp.c and lcd_sx1.c. Cc: Vovan888@gmail.com Cc: linux-fbdev-devel@lists.sourceforge.net Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | [ARM] 5335/1: pxa25x_udc: Fix is_vbus_present to return 1 or 0Jaya Kumar2008-11-231-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the use of is_blah() suggests a 1 or 0 return. This assumption is made in pxa25x_udc code such as: dev->vbus = is_vbus_present(); where dev->vbus is a bitfield. This fix allows pxa25x_udc_probe to correctly detect vbus. Other changes were to make its use consistent in the rest of the code. Signed-off-by: Jaya Kumar <jayakumar.lkml@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] pxa/MioA701: bluetooth resume fixRobert Jarzmik2008-11-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The G3IPL expects the value at RAM address 0xa020b020 to be exactly 1 to setup the bluetooth GPIOs properly. The actual code got a value from gpio_get_value() which was not 1, but a "not equal to 0" integer. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | [ARM] pxa/MioA701: fix memory corruption.Robert Jarzmik2008-11-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the resume bootstrap, the early disable address is wrong. Fix it to RAM address 0xa020b000 instead of 0xa0200000, and make it consistent with RESUME_ENABLE_ADDR in mioa701.c. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Eric Miao <eric.miao@marvell.com>
* | | Merge branch 'for-rmk' of git://linux-arm.org/linux-2.6 into develRussell King2008-11-2710-27/+87
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| * | | Fix the teehbr_read function prototypeCatalin Marinas2008-11-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A "void" was missing inside brackets. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | | Modern processors may need to drain the WB before WFICatalin Marinas2008-11-102-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since WFI may cause the processor to enter a low-power mode, data may still be in the write buffer. This patch adds a DSB (or DWB) to the cpu_(v6|v7)_do_idle functions before the WFI. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | | ARMv7: Add SMP initialisation to proc-v7.SJon Callan2008-11-061-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the SMP/nAMP mode setting to __v7_setup and also sets TTBR to shared page table walks if SMP is enabled. The PTWs are also marked inner cacheable for both SMP and UP modes (setting this is fine even if the CPU doesn't support the feature). Signed-off-by: Jon Callan <Jon.Callan@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | | ARMv7: Do not set TTBR0 in __v7_setupCatalin Marinas2008-11-061-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This register is set in __enable_mmu in the head.S file. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | | Do not flush the cache in flush_cache_v(un)map for VIPT cachesCatalin Marinas2008-11-061-10/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case of non-aliasing VIPT caches, there is no need to flush the whole cache when new mapping is created. The patch introduces this condition check. In the non-aliasing VIPT case flush_cache_vmap() needs a DSB since the set_pte_at() function called from vmap_pte_range() does not have such barrier (done usually via TLB flushing functions). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | | ARMv7: Branch over conditional undefined instructions in vfphw.SCatalin Marinas2008-11-061-9/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On ARMv7, conditional undefined instructions may generate exceptions even if the condition is not met. The vfphw.S contains the FPINST and FPINST2 access instructions which may not be present on processors with synchronous VFP exceptions. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | | ARMv7: Add extra barriers for flush_cache_all compressed/head.SCatalin Marinas2008-11-062-4/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The flush_cache_all function on ARMv7 is implemented as a series of cache operations by set/way. These are not guaranteed to be ordered with previous memory accesses, requiring a DMB. This patch also adds barriers for the TLB operations in compressed/head.S Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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