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* ARM: SAMSUNG: Update to use PL330-DMA driverBoojin Kim2011-09-147-10/+19
| | | | | | | | | | This patch adds to support PL330-DMA driver on DMADEVICE for S5P SoCs. Signed-off-by: Boojin Kim <boojin.kim@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* DMA: PL330: Add DMA_CYCLIC capabilityBoojin Kim2011-09-141-1/+83
| | | | | | | | | | | | | This patch adds DMA_CYCLIC capability that is used for audio driver. DMA driver activated with it reuses the dma requests that were submitted through tx_submit(). Signed-off-by: Boojin Kim <boojin.kim@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* DMA: PL330: Remove the start operation for handling DMA_TERMINATE_ALL commandBoojin Kim2011-09-141-4/+7
| | | | | | | | | | | | | | | Original code carries out the start operation after flush operation. But start operation is not required for DMA_TERMINATE_ALL command. So, this patch removes the unnecessary start operation and only carries out the flush operation for handling DMA_TERMINATE_ALL command. Signed-off-by: Boojin Kim <boojin.kim@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> [Fixed typos in changelog] Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* DMA: PL330: Support DMA_SLAVE_CONFIG commandBoojin Kim2011-09-141-12/+37
| | | | | | | | | Signed-off-by: Boojin Kim <boojin.kim@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* DMA: PL330: Update PL330 DMA API driverBoojin Kim2011-09-143-11/+12
| | | | | | | | | | | | | | | This patch updates following 3 items. 1. Removes unneccessary code. 2. Add AMBA, PL330 configuration 3. Change the meaning of 'peri_id' variable from PL330 event number to specific dma id by user. Signed-off-by: Boojin Kim <boojin.kim@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* DMA: PL330: Add support runtime PM for PL330 DMACBoojin Kim2011-09-141-2/+73
| | | | | | | | | | Signed-off-by: Boojin Kim <boojin.kim@samsung.com> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: amba-pl08x: make filter check that the channel is owned by pl08xRussell King - ARM Linux2011-09-051-1/+9
| | | | | | | | | | | | Before converting the dma channel to our private data structure, first check that the channel is indeed one which our driver registered. We do this by ensuring that the underlying device is bound to our driver. This avoids potential oopses if we try to reference 'plchan->name' against a foreign drivers dma channel. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine/ste_dma40: fix memory leak due to prepared descriptorsPer Forlin2011-09-051-0/+16
| | | | | | | | | | Prepared descriptors that are not submitted will not be freed. Add prepared descriptor to a list to be able to release them upon dmaengine_terminate_all(). Signed-off-by: Per Forlin <per.forlin@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine/ste_dma40: fix Oops due to double free of client descriptorPer Forlin2011-09-051-10/+12
| | | | | | | | | | | | | | | | | | | The client list may exist in two lists at the same time. This makes free fail since the same desc is freed multiple times. Remove desc from client list when adding it to the pending queue. Move free of client owned descriptors from free_dma() to terminate_all(). Unable to handle kernel paging request at virtual address 00100104 pgd = dea8c000 [00100104] *pgd=1ea62831, *pte=00000000, *ppte=00000000 Internal error: Oops: 817 [#1] PREEMPT SMP Modules linked in: CPU: 0 Not tainted (3.1.0-rc3+ #58) PC is at d40_free_chan_resources+0x64/0x330 Signed-off-by: Per Forlin <per.forlin@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine/ste_dma40: remove duplicate call to d40_pool_lli_free().Per Forlin2011-09-051-3/+0
| | | | | | | | d40_desc_free() already calls d40_pool_lli_free(). Signed-off-by: Per Forlin <per.forlin@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine/ste_dma40: add missing kernel doc for pending_queuePer Forlin2011-09-051-0/+1
| | | | | | Signed-off-by: Per Forlin <per.forlin@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* Merge branch 'next' into v3.1-rc4Vinod Koul2011-09-029-327/+447
|\ | | | | | | | | | | Fixed trivial conflicts in drivers/dma/amba-pl08x.c Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine i.MX SDMA: use request_firmware_nowaitSascha Hauer2011-08-291-7/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The firmware blob may not be available when the driver probes. Instead of blocking the whole kernel use request_firmware_nowait() and continue without firmware. The ROM scripts can already be used then if available. For the devicetree case the ROM scripts are not available, still the probe function should not block. The driver will be unusable in this case, but we have no way of detecting this properly. The configuration of the dma channels will fail, so nothing bad should happen. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine i.MX SDMA: set firmware scripts addresses to negative value initiallySascha Hauer2011-08-291-0/+6
| | | | | | | | | | | | | | | | | | If we do not have a firmare script for a given transfer, the setup of this channel must fail. For this the script addresses have to be < 0 initially, not 0. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine i.MX SDMA: lock channel 0Sascha Hauer2011-08-291-2/+16
| | | | | | | | | | | | | | | | channel0 of the sdma engine is the configuration channel. It is a shared resource and thus must be protected by a mutex. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmatest: make dmatest threads freezableGuennadi Liakhovetski2011-08-291-2/+15
| | | | | | | | | | | | | | | | Making dmatest threads freezable allows its use for system PM testing. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: Call pl08x_free_txd() instead of calling kfree() directlyViresh Kumar2011-08-251-1/+3
| | | | | | | | | | | | | | | | | | pl08x_prep_channel_resources() is calling kfree() directly for txd(). To maintain consistency in code call pl08x_free_txd() instead. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: Pass flow controller information with slave channel dataViresh Kumar2011-08-252-8/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | At least, on SPEAr platforms there is one peripheral, JPEG, which can be flow controller for DMA transfer. Currently DMA controller driver didn't support peripheral flow controller configurations. This patch adds device_fc field in struct pl08x_channel_data, which will be used only for slave transfers and is not used in case of mem2mem transfers. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: Choose peripheral bus as master busViresh Kumar2011-08-251-16/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | When we have DMA transfers between peripheral and memory, then we shouldn't reduce width of peripheral at all, as that may be a strict requirement. But we can always reduce width of memory access, with some compromise in performance. Thus, we must select peripheral as master and not memory. Also this rearranges code to make it shorter. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: Align lli_len to max(src.width, dst.width)Viresh Kumar2011-08-251-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently lli_len is aligned to min of two widths, which looks to be incorrect. Instead it should be aligned to max of both widths. Lets say, total_size = 441 bytes MIN: lets check if min() suits or not: CASE 1: srcwidth = 1, dstwidth = 4 min(src, dst) = 1 i.e. We program transfer size in control reg to 441. Now, till 440 bytes everything is fine, but on the last byte DMAC can't transfer 1 byte to dst, as its width is 4. CASE 2: srcwidth = 4, dstwidth = 1 min(src, dst) = 1 i.e. we program transfer size in control reg to 110 (data transferred = 110 * srcwidth). So, here too 1 byte is left, but on the source side. MAX: Lets check if max() suits or not: CASE 3: srcwidth = 1, dstwidth = 4 max(src, dst) = 4 Aligned size is 440 i.e. We program transfer size in control reg to 440. Now, all 440 bytes will be transferred without any issues. CASE 4: srcwidth = 4, dstwidth = 1 max(src, dst) = 4 Aligned size is 440 i.e. We program transfer size in control reg to 110 (data transferred = 110 * srcwidth). Now, also all 440 bytes will be transferred without any issues. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: Add prep_single_byte_llis() routineViresh Kumar2011-08-251-28/+33
| | | | | | | | | | | | | | | | | | | | | | | | Code for creating single byte llis is present at several places. Create a routine to avoid code redundancy. Also, we don't need one lli per single byte transfer, we can have single lli to do all single byte transfer. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: max_bytes_per_lli is TRANSFER_SIZE * src_width (not ↵Viresh Kumar2011-08-251-8/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MIN(width)) max_bytes_per_lli = bd.srcbus.buswidth * PL080_CONTROL_TRANSFER_SIZE_MASK; This is confirmed by ARM support guys. Below is summary of mail exchange with them: [Viresh] What is the total data to be transferred in case source and destination bus widths are different. Suppose, source bus width is 2 bytes and destination is 4 bytes. Now in order to transfer 80 bytes, what should be value of TransferSize field in control reg: 40? or 20?. [David from ARM] The value that is programmed into the TransferSize field should be the number of <SourceWidth> transfers needed to achieve the required data transfer. So, to transfer 80 bytes, with a Source Width of 2, the TransferSize field = should be programmed with: Total transfer size ------------------- = 40 <source width> [Viresh] Will this change if source is 4 bytes and dest is 2? [David] Yes - the calculation then becomes: Total transfer size ------------------- =20 <source width> Also, max_bytes_per_lli must be calculated after fixing src and dest widths not before that. So move this code to the correct place. This patch also removes max_bytes_per_lli from earlier print message, as till that point max_bytes_per_lli is unknown. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: Get rid of pl08x_pre_boundary()Viresh Kumar2011-08-252-126/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pl080 Manual says: "Bursts do not cross the 1KB address boundary" We can program the controller to cross 1 KB boundary on a burst and controller can take care of this boundary condition by itself. Following is the discussion with ARM Technical Support Guys (David): [Viresh] Manual says: "Bursts do not cross the 1KB address boundary" What does that actually mean? As, Maximum size transferable with a single LLI is 4095 * 4 =16380 ~ 16KB. So, if we don't have src/dest address aligned to burst size, we can't use this big of an LLI. [David] There is a difference between bursts describing the total data transferred by the DMA controller and AHB bursts. Bursts described by the programmable parameters in the PL080 have no direct connection with the bursts that are seen on the AHB bus. The statement that "Bursts do not cross the 1KB address boundary" in the TRM is referring to AHB bursts, where this limitation is a requirement of the AHB spec. You can still issue bursts within the PL080 that are in excess of 1KB. The PL080 will make sure that its bursts are broken down into legal AHB bursts which will be formatted to ensure that no AHB burst crosses a 1KB boundary. Based on above discussion, this patch removes all code related to 1 KB boundary as we are not required to handle this in driver. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: Schedule tasklet in case of error interruptViresh Kumar2011-08-251-21/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently, if error interrupt occurs, nothing is done in interrupt handler (just clearing the interrupts). We must somehow indicate this to the user that DMA is over, due to ERR interrupt or TC interrupt. So, this patch just schedules existing tasklet, with a print showing error interrupt has occurred on which channels. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: No need to check "ch->signal < 0"Viresh Kumar2011-08-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | We have just executed following in pl08x_get_phy_channel(): ch->signal = -1; We don't have to compare "ch->signal < 0", as this will always be true. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: Simplify pl08x_ensure_on()Viresh Kumar2011-08-251-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | Simply writing 1 on bit 0 is sufficient instead of reading and clearing bits. Also as per manual, for bit 3-31 of DMACConfiguration register: "read undefined, write as 0" So, we must not rely on values read from this registers bit 3-31. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: support runtime PMViresh Kumar2011-08-251-0/+12
| | | | | | | | | | | | | | | | | | Insert notifiers for the runtime PM API. With this the runtime PM layer kicks in to action where used. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: Changing few prints to dev_dbg from dev_infoViresh Kumar2011-08-251-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | For 8 memory and 16 slave channels 35 boot print lines are printed. And that is too much. Most of this would be more useful for debugging. So moving few of them to dev_dbg instead of dev_info. Now only 3 prints will be printed. This also rearrange one of the debug message to fit into two lines. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: Remove redundant comment and rewrite originalViresh Kumar2011-08-251-8/+7
| | | | | | | | | | | | | | | | | | Similar comment is present over routine also pl08x_choose_master_bus(). Keeping one of them. Also rewrite that comment to convey message clearly. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: Complete doc comment for struct pl08x_txdViresh Kumar2011-08-251-0/+8
| | | | | | | | | | | | | | | | Doc comment for struct pl08x_txd was incomplete. Complete that. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: pass (*ptr) to sizeof() instead of (struct xyz)Viresh Kumar2011-08-251-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As mentioned in Documentation/CodingStyle, The preferred form for passing a size of a struct is the following: p = kmalloc(sizeof(*p), ...); The alternative form where struct name is spelled out hurts readability and introduces an opportunity for a bug when the pointer variable type is changed but the corresponding sizeof that is passed to a memory allocator is not. This patch replaces (struct xyz) with *ptr at several occurrences in driver. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: Rearrange inclusion of header files in ascending orderViresh Kumar2011-08-251-9/+8
| | | | | | | | | | | | | | | | | | Header files included in driver are not present in alphabetical order. Rearrange them in alphabetical order. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: Resolve formatting issuesViresh Kumar2011-08-251-25/+16
| | | | | | | | | | | | | | | | | | | | | | | | There were few formatting related issues in code. This patch fixes them. Fixes include: - Remove extra blank lines - align code to 80 cols - combine several lines to one line Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * ARM: asm/pl080.h: Protect against multiple inclusion of header fileViresh Kumar2011-08-251-0/+4
| | | | | | | | | | | | | | | | | | | | | | <asm/hardware/pl080.h> doesn't have protection to deal with multiple inclusion. And so we get compilation errors in cases where this file is included more than once. This patch adds #ifdefs at the top of file to protect it against multiple inclusions. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine: at_hdmac: fix way to specify cyclic capabilityNicolas Ferre2011-08-191-6/+4
| | | | | | | | | | | | | | | | | | In this driver, we can trigger cyclic transfer on peripherals-DMA interfaces. It is dependent on driver implementation but cannot depend on a platform property: we remove the dma_has_cap(DMA_CYCLIC, ) test which has no meaning. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine: at_hdmac: add wrappers for testing channel stateNicolas Ferre2011-08-192-10/+26
| | | | | | | | | | | | | | | | Cyclic property and paused state are encoded as bits in the channel status bitfield. Tests of those bits are wrapped in convenient helper functions. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine: at_hdmac: improve power management routinesNicolas Ferre2011-08-192-1/+94
| | | | | | | | | | | | | | | | | | | | | | Save/restore dma controller state across a suspend-resume sequence. The prepare() function will wait for the non-cyclic channels to become idle. It also deals with cyclic operations with the start at next period while resuming. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine: at_hdmac: replace spin_lock* with irqsave variantsNicolas Ferre2011-08-191-22/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dmaengine routines can be called from interrupt context and with interrupts disabled. Whereas spin_unlock_bh can't be called from such contexts. So this patch converts all spin_lock* routines to irqsave variants. Also, spin_lock() used in tasklet is converted to irqsave variants, as tasklet can be interrupted, and dma requests from such interruptions may also call spin_lock. Idea from dw_dmac patch by Viresh Kumar. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * mxs-dma: enable CLKGATE before accessing registersLothar Waßmann2011-08-161-21/+24
| | | | | | | | | | | | | | | | | | After calling mxs_dma_disable_chan() for a channel, that channel becomes unusable because some controller registers can only be written when the clock is enabled via CLKGATE. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine: remove struct scatterlist for headerVinod Koul2011-08-161-2/+0
| | | | | | | | | | | | | | | | Commit 90b44f8 introduces dmaengine_prep_slave_single API which adds scatterlist.h in dmaengine.h, so defining struct scatterlist is not required Signed-off-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Dan Williams <dan.j.williams@intel.com>
| * dmaengine/dmatest: Terminate transfers on all channels in case of error or exitViresh Kumar2011-08-081-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | In case, some error occurs while doing memcpy transfers, we must terminate all transfers physically too. This is achieved by calling device_control() routine with TERMINATE_ALL as parameter. This is also required to be done in case module is removed while we are in middle of some transfers. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine: add helper function for slave_singleVinod Koul2011-08-081-0/+11
| | | | | | | | | | | | | | | | | | | | For clients which require a single slave transfer and dont want to be bothered about the scatterlist api, this helper gives simple API for this transfer and creates single scatterlist for DMA API Idea from Russell King Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* | Linux 3.1-rc4v3.1-rc4Linus Torvalds2011-08-281-1/+1
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* | Merge branch 'pm-fixes' of ↵Linus Torvalds2011-08-287-21/+30
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm * 'pm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: ARM: mach-shmobile: sh7372 LCDC1 suspend fix V2 (incremental) OMAP: omap_device: only override _noirq methods, not normal suspend/resume PM / Runtime: Correct documentation of pm_runtime_irq_safe() ARM: mach-shmobile: sh7372 LCDC1 suspend fix sh-sci / PM: Use power.irq_safe PM: Use spinlock instead of mutex in clock management functions
| * | ARM: mach-shmobile: sh7372 LCDC1 suspend fix V2 (incremental)Magnus Damm2011-08-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the recently submitted "Associate the HDMI clock together with LCDC1 on sh7372" to V2 with the following change: - Use lcdc1_device on AP4EVB to build properly. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
| * | OMAP: omap_device: only override _noirq methods, not normal suspend/resumeKevin Hilman2011-08-251-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit c03f007a8bf0e092caeb6856a5c8a850df10b974 (OMAP: PM: omap_device: add system PM methods for PM domain handling) mistakenly used SET_SYSTEM_SLEEP_PM_OPS() when trying to configure custom methods for the PM domains noirq methods. Fix that by setting only the suspend_noirq and resume_noirq methods with custom versions. Note that all other PM domain methods (including the "normal" suspend/resume methods) are populated using USE_PLATFORM_PM_SLEEP_OPS, which configures them all to the default subsystem (platform_bus) methods. Reported-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
| * | PM / Runtime: Correct documentation of pm_runtime_irq_safe()Rafael J. Wysocki2011-08-251-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The description of pm_runtime_irq_safe() has to be updated to follow the code after commit 02b2677 (PM / Runtime: Allow _put_sync() from interrupts-disabled context). Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Kevin Hilman <khilman@ti.com>
| * | ARM: mach-shmobile: sh7372 LCDC1 suspend fixMagnus Damm2011-08-243-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Associate the HDMI clock together with LCDC1 on sh7372. Without this patch Suspend-to-RAM hangs on the boards AP4EVB and Mackerel. The code hangs in the LCDC driver where the software is waiting forever for the hardware to power down. By explicitly associating the HDMI clock with LCDC1 we can make sure the HDMI clock is enabled using Runtime PM whenever the driver is accessing the hardware. This HDMI and LCDC1 dependency is documented in the sh7372 data sheet. Older kernels did work as expected but the recently merged (3.1-rc) 794d78f drivers: sh: late disabling of clocks V2 introduced code to turn off clocks lacking software reference which happens to include the HDMI clock that is needed by LCDC1 to operate as expected. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
| * | sh-sci / PM: Use power.irq_safeRafael J. Wysocki2011-08-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since sci_port_enable() and sci_port_disable() may be run with interrupts off and they execute pm_runtime_get_sync() and pm_runtime_put_sync(), respectively, the SCI device's power.irq_safe flag has to be set to indicate that it is safe to execute runtime PM callbacks for this device with interrupts off. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Magnus Damm <damm@opensource.se>
| * | PM: Use spinlock instead of mutex in clock management functionsRafael J. Wysocki2011-08-241-18/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The lock member of struct pm_clk_data is of type struct mutex, which is a problem, because the suspend and resume routines defined in drivers/base/power/clock_ops.c cannot be executed with interrupts disabled for this reason. Modify struct pm_clk_data so that its lock member is a spinlock. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Magnus Damm <damm@opensource.se>
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