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* Merge branch 'for_3.2/3_omap_devicetree' of ↵Tony Lindgren2011-10-0430-310/+929
|\ | | | | | | git://gitorious.org/omap-pm/linux into dt
| * arm/dts: OMAP3+: Add mpu, dsp and iva nodesBenoit Cousson2011-10-046-1/+104
| | | | | | | | | | | | | | | | | | | | | | | | Add nodes for devices used by PM code (mpu, dsp, iva). Add a cpus node as well as recommended in the DT spec. Remove mpu, dsp, iva devices init if is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Kevin Hilman <khilman@ti.com>
| * arm/dts: OMAP4: Add a main ocp entry bound to l3-noc driverBenoit Cousson2011-10-042-1/+7
| | | | | | | | | | | | | | | | | | | | Used the main OCP node to add bindings with the l3_noc driver. Remove l3_noc static device creation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
| * ARM: OMAP2+: l3-noc: Add support for device-treeBenoit Cousson2011-10-042-6/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | Add device-tree support for the l3-noc driver. Use platform_driver_register to defer the probing at device init time. Add documentation for the l3-noc bindings. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
| * ARM: OMAP2+: board-generic: Add i2c static initBenoit Cousson2011-10-041-2/+39
| | | | | | | | | | | | | | | | | | Still needed to boot until the i2c & twl driver is adapted to device-tree. Otherwise the voltage control code will try to access the twl and crash. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP2+: board-generic: Add DT support to generic boardBenoit Cousson2011-10-042-45/+90
| | | | | | | | | | | | | | | | | | | | | | | | Re-cycle the original board-generic.c file to support Device Tree for every OMAP2+ variants. The current approach is an intermediate step before having only one machine descriptor that will use some generic DT aware functions. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Tony Lindgren <tony@atomide.com>
| * arm/dts: Add support for OMAP3 Beagle boardBenoit Cousson2011-10-041-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | Add OMAP3 beagleboard DTS file to use the omap3.dtsi SoC file. Add a default bootargs line to allow a boot from RAMDISK. Add memory node information. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
| * arm/dts: Add initial device tree support for OMAP3 SoCBenoit Cousson2011-10-041-0/+44
| | | | | | | | | | | | | | | | | | | | | | Add initial OMAP3 soc file with empty ocp bus. Based on initial patch from Manju: http://www.spinics.net/lists/linux-omap/msg55830.html Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
| * arm/dts: Add support for OMAP4 SDP boardBenoit Cousson2011-10-041-0/+29
| | | | | | | | | | | | | | | | | | | | Add the SDP/Blaze (Software Development Board) support with device tree. That file is based on the omap4-panda.dts. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
| * arm/dts: Add support for OMAP4 PandaBoardBenoit Cousson2011-10-041-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | Based on the original omap4-panda.dts file from Manju. http://www.spinics.net/lists/linux-omap/msg55836.html Add memory information and a default bootargs to allow a boot from RAMDISK. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
| * arm/dts: Add initial device tree support for OMAP4 SoCBenoit Cousson2011-10-041-0/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
| * ARM: OMAP: omap_device: Add a method to build an omap_device from a DT nodeBenoit Cousson2011-10-042-0/+144
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a notifier called during device_add phase. If an of_node is present, retrieve the hwmod entry in order to populate properly the omap_device structure. For the moment the resource from the device-tree are overloaded. DT does not support named resource yet, and thus, most driver will not work without that information. Add a documentation to capture the specifics OMAP bindings needed for device-tree support. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * ARM: OMAP: omap_device: Add omap_device_[alloc|delete] for DT integrationBenoit Cousson2011-10-041-58/+119
| | | | | | | | | | | | | | | | | | | | | | | | | | Split the omap_device_build_ss into two smaller functions that will allow to populate a platform_device already allocated by device-tree. The functionality of the omap_device_build_ss is still the same, but the omap_device_alloc will be usable with devices already built by device-tree. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * of: Add helpers to get one string in multiple strings propertyBenoit Cousson2011-10-042-0/+102
| | | | | | | | | | | | | | | | | | | | Add of_property_read_string_index and of_property_count_strings to retrieve one string inside a property that will contains severals strings. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * ARM: OMAP2+: devices: Remove all omap_device_pm_latency structuresBenoit Cousson2011-10-0411-164/+14
| | | | | | | | | | | | | | | | Remove all these duplicated structures since a default one is now available. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * ARM: OMAP: omap_device: Create a default omap_device_pm_latencyBenoit Cousson2011-10-041-1/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | Most devices are using the same default omap_device_pm_latency structure during device built. In order to avoid the duplication of the same structure everywhere, add a default structure that will be used if the device does not have an explicit one. Next patches will clean the duplicated structures. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * ARM: OMAP2+: pm: Remove static devices variable for mpu, dsp, iva and l3 PMBenoit Cousson2011-10-041-40/+7
| | | | | | | | | | | | | | | | | | Since the device pointer is now retrieved using the hwmod name, remove the static variables used to store the device pointers for DSP, MPU, IVA and L3 devices for PM/DVFS usage. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * ARM: OMAP2+: pm: Use hwmod name instead of dev pointerBenoit Cousson2011-10-041-7/+15
| | | | | | | | | | | | | | | | | | | | | | | | Replace the struct device parameter of omap2_set_init_voltage by the hwmod name. It will avoid having to store explicitely the device pointer into a static variable. Moreover, it will be a little bit more scalable if we introduce new DVFS devices. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * ARM: OMAP3: beagle-board: Use the omap_hwmod_name_get_dev APIBenoit Cousson2011-10-041-2/+2
| | | | | | | | | | | | | | | | | | | | Replace the multiple omap2_get_XXX_device APIs with the new omap_hwmod_name_get_dev that uses the hwmod name to get the proper device. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * ARM: OMAP: omap_device: Add omap_device_get_by_hwmod_nameNishanth Menon2011-10-042-0/+37
|/ | | | | | | | | | | | | | | | | | | | | | | An API which translates a standard hwmod name to corresponding platform_device is useful for drivers when they need to look up the device associated with a hwmod name to map back into the device structure pointers. These ideally should be used by drivers in mach directory. Using a generic hwmod name like "gpu" instead of the actual device name which could change in the future, allows us to: a) Could in effect help replace apis such as omap2_get_mpuss_device, omap2_get_iva_device, omap2_get_l3_device, omap4_get_dsp_device, etc.. b) Scale to more devices rather than be restricted to named functions c) Simplify driver's platform_data from passing additional fields all doing the same thing with different function pointer names just for accessing a different device name. Signed-off-by: Nishanth Menon <nm@ti.com> [b-cousson@ti.com: Adapt it to the new pdev pointer inside od, remove the unneeded helpers, and fold the next patch here] Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
*-----. Merge branches 'cleanup-part3', 'voltage', 'dmtimer' and 'l3' into dt-baseTony Lindgren2011-10-04116-4762/+5136
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| | | | * Merge branch 'for_3_2/omap_misc' of ↵Tony Lindgren2011-09-285-291/+322
| | | | |\ | | | | | | | | | | | | | | | | | | git://gitorious.org/omap-sw-develoment/linux-omap-dev into l3
| | | | | * OMAP4: Fix the emif and dmm virtual mappingSantosh Shilimkar2011-09-241-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the address overlap with Emulation domain (EMU). The previous mapping was entering into EMU mapping and was not as per comments. Fix the mapping accordingly. Signed-off-by: Girish S G <girishsg@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
| | | | | * OMAP: Print Initiator name for l3 custom error.sricharan2011-09-242-10/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The initiator id gets logged in the l3 target registers for custom error. So print it to aid debugging. Based on a internal patch by Devaraj Rangasamy <dev@ti.com> Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
| | | | | * OMAP: Fix sparse warnings in l3 error handler.sricharan2011-09-243-14/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix below sparse warnings from the l3-noc and l3-smx error handlers files. arch/arm/mach-omap2/omap_l3_smx.h:209:22: warning: symbol 'omap3_l3_app_bases' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_smx.h:308:22: warning: symbol 'omap3_l3_debug_bases' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_smx.h:325:2: warning: incorrect type in initializer (different address spaces) arch/arm/mach-omap2/omap_l3_smx.h:325:2: expected unsigned int [usertype] * arch/arm/mach-omap2/omap_l3_smx.h:325:2: got unsigned int [noderef] [toplevel] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_smx.h:326:2: warning: incorrect type in initializer (different address spaces) arch/arm/mach-omap2/omap_l3_smx.h:326:2: expected unsigned int [usertype] * arch/arm/mach-omap2/omap_l3_smx.h:326:2: got unsigned int [noderef] [toplevel] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_smx.h:324:5: warning: symbol 'omap3_l3_bases' was not declared. Should it be static? CC arch/arm/mach-omap2/omap_l3_smx.o CHECK arch/arm/mach-omap2/omap_l3_noc.c arch/arm/mach-omap2/omap_l3_noc.c:73:13: warning: symbol '__v' shadows an earlier one arch/arm/mach-omap2/omap_l3_noc.c:73:13: originally declared here arch/arm/mach-omap2/omap_l3_noc.c:83:20: warning: symbol '__v' shadows an earlier one arch/arm/mach-omap2/omap_l3_noc.c:83:20: originally declared here arch/arm/mach-omap2/omap_l3_noc.c:90:5: warning: symbol '__v' shadows an earlier one arch/arm/mach-omap2/omap_l3_noc.c:90:5: originally declared here arch/arm/mach-omap2/omap_l3_noc.h:39:5: warning: symbol 'l3_flagmux' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:46:5: warning: symbol 'l3_targ_inst_clk1' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:54:5: warning: symbol 'l3_targ_inst_clk2' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:75:5: warning: symbol 'l3_targ_inst_clk3' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:79:6: warning: symbol 'l3_targ_inst_name' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:112:5: warning: symbol 'l3_targ' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.c:72:11: warning: cast removes address space of expression arch/arm/mach-omap2/omap_l3_noc.c:73:13: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap2/omap_l3_noc.c:73:13: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_noc.c:73:13: got unsigned int arch/arm/mach-omap2/omap_l3_noc.c:83:20: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap2/omap_l3_noc.c:83:20: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_noc.c:83:20: got unsigned int arch/arm/mach-omap2/omap_l3_noc.c:90:5: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap2/omap_l3_noc.c:90:5: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_noc.c:90:5: got unsigned int arch/arm/mach-omap2/omap_l3_noc.c:96:5: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap2/omap_l3_noc.c:96:5: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_noc.c:96:5: got unsigned int arch/arm/mach-omap2/omap_l3_noc.c:108:5: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap2/omap_l3_noc.c:108:5: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_noc.c:108:5: got unsigned int Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reported-by: Paul Walmsley <paul@pwsan.com> Reviewed-by: Paul Walmsley <paul@pwsan.com>
| | | | | * OMAP: Fix indentation issues in l3 error handler.sricharan2011-09-244-204/+202
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The indentation problems in the l3 noc and smx error handler files are fixed. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reported-by: Paul Walmsley <paul@pwsan.com>
| | | | | * OMAP: Fix a BUG in l3 error handler.Todd Poynor2011-09-241-7/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the current sequence of registering the irq and assigning it to the app_irq, debug_irq driver variables, there can be corner cases where the pending irq gets triggered immediately after registering, handler gets called resulting in a crash. So changed this sequence. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Todd Poynor <toddpoynor@google.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
| | | | | * OMAP: Improve register access in L3 Error handler.Todd Poynor2011-09-244-71/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Changed the way of accessing L3 target registers from standard base rather than relative to STDERRLOG_MAIN. * Use ffs() to find error source from the L3_FLAGMUX_REGERRn register. * Remove extra l3_base[] entry. * Modified L3 custom error message. Signed-off-by: Todd Poynor <toddpoynor@google.com> Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
| | | * | | ARM: OMAP: dmtimer: add error handling to export APIsTarun Kanti DebBarma2011-09-212-37/+89
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add error handling code to export APIs. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | | ARM: OMAP: dmtimer: low-power mode supportTarun Kanti DebBarma2011-09-213-5/+149
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clock is enabled only when timer is started and disabled when the the timer is stopped. Therefore before accessing registers in functions clock is enabled and then disabled back at the end of access. Context save is done dynamically whenever the registers are modified. Context restore is called when context is lost. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [tony@atomide.com: updated to use revision instead of tidr] Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | | ARM: OMAP: dmtimer: skip reserved timersTony Lindgren2011-09-213-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pass the reserved flag in pdata and use it. We can now make sys_timer_reserved static to mach-omap2/timer.c. Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | | ARM: OMAP: dmtimer: pm_runtime supportTarun Kanti DebBarma2011-09-212-24/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pm_runtime feature to dmtimer whereby *_runtime_get_sync() is called within omap_dm_timer_enable(), pm_runtime_put() is called in omap_dm_timer_disable(). In addition to calling pm_runtime_enable, we are calling pm_runtime_irq_safe so that they can be called from interrupt context. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Partha Basak <p-basak2@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Cousson, Benoit <b-cousson@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | | ARM: OMAP: dmtimer: switch-over to platform device driverTarun Kanti DebBarma2011-09-213-248/+123
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Register timer devices by going through hwmod database using hwmod API. The driver probes each of the registered devices. Functionality which are already performed by hwmod framework are removed from timer code. New set of timers present on OMAP4 are now supported. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Acked-by: Cousson, Benoit <b-cousson@ti.com> [tony@atomide.com: folded in spinlock changes, left out is_omap2] Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | | ARM: OMAP: dmtimer: platform driverTarun Kanti DebBarma2011-09-212-6/+135
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add dmtimer platform driver functions which include: (1) platform driver initialization (2) driver probe function (3) driver remove function Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Thara Gopinath <thara@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Cousson, Benoit <b-cousson@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | | ARM: OMAP2+: dmtimer: convert to platform devicesTarun Kanti DebBarma2011-09-216-1/+240
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add routines to converts dmtimers to platform devices. The device data is obtained from hwmod database of respective platform and is registered to device model after successful binding to driver. In addition, capability attribute of each of the timers is added in hwmod database. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Thara Gopinath <thara@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Cousson, Benoit <b-cousson@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | | ARM: OMAP1: dmtimer: conversion to platform devicesTarun Kanti DebBarma2011-09-214-45/+194
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert OMAP1 dmtimers into a platform devices and then registers with device model framework so that it can be bound to corresponding driver. Signed-off-by: Thara Gopinath <thara@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Cousson, Benoit <b-cousson@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | | ARM: OMAP2+: dmtimer: add device names to flck nodesTarun Kanti DebBarma2011-09-214-0/+165
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add device name to OMAP2 dmtimer fclk nodes so that the fclk nodes can be retrieved by doing a clk_get with the corresponding device pointers or device names. Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Thara Gopinath <thara@ti.com> Acked-by: Cousson, Benoit <b-cousson@ti.com> [tony@atomide.com: fixed typo in email address] Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | | ARM: OMAP: Add support for dmtimer v2 ipTony Lindgren2011-09-193-76/+123
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The registers are slightly different between v1 and v2 ip that is available in omap4 and later for some timers. Add support for v2 ip by mapping the interrupt related registers separately and adding func_base for the functional registers. Also disable dmtimer driver features on omap4 for now as those need the hwmod conversion series to deal with enabling the timers properly in omap_dm_timer_init. Signed-off-by: Afzal Mohammed <afzal@ti.com> Tested-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | | Merge branch 'for_3.2/voltage-cleanup' of ↵Tony Lindgren2011-09-232-16/+0
| | |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | git://gitorious.org/khilman/linux-omap-pm into voltage
| | | * | | | ARM: OMAP: voltage: voltage layer present, even when CONFIG_PM=nKevin Hilman2011-09-212-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even when CONFIG_PM=n, we try to scale the boot voltage to a sane, known value using OPP table to find matching voltage based on boot frequency. This should be done, even when CONFIG_PM=n to avoid mis-configured bootloaders and/or boot voltage assumptions made by boot loaders. Also fixes various compile problems due to depenencies between voltage domain and powerdomain code (also present when CONFIG_PM=n). Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Kevin Hilman <khilman@ti.com>
| | * | | | | Merge branch 'for_3.2/voltage-cleanup' of ↵Tony Lindgren2011-09-1534-1271/+1599
| | |\ \ \ \ \ | | | |/ / / / | | | | / / / | | | |/ / / | | |/| | | git://gitorious.org/khilman/linux-omap-pm into voltage
| | | * | | OMAP4: PM: TWL6030: add cmd registerNishanth Menon2011-09-151-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without the command register, ON/ONLP/RET/OFF voltages are useless. and TWL will be unable to use these Signed-off-by: Nishanth Menon <nm@ti.com>
| | | * | | OMAP4: PM: TWL6030: fix ON/RET/OFF voltagesPatrick Titiano2011-09-151-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to latest OMAP4430 Data Manual v0.4 dated March 2011: - Retention voltage shall be set to 0.83V. See tables 2.2, 2.4 and 2.6 in DM. This allows saving a little more power in retention states. - OPP100 IVA nominal voltage is 1.188V. See table 2.4 in DM. This allows saving a little power when CPU wakes up until Smart-Reflex is not yet resumed. [nm@ti.com: ported to voltdm_c] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Patrick Titiano <p-titiano@ti.com>
| | | * | | OMAP4: PM: TWL6030: address 0V conversionsNishanth Menon2011-09-151-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 0V conversions should be mapped to 0 as it is meant to denote off voltages. Signed-off-by: Nishanth Menon <nm@ti.com>
| | | * | | OMAP4: PM: TWL6030: fix uv to voltage for >0x39Nishanth Menon2011-09-151-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | using 1.35V as a check is not correct, we know that beyond 0x39, voltages are non linear - hence use the conversion iff uV greater than that for 0x39. For example, with 709mV as the smps offset, the max linear is actually 1.41V(0x39vsel)! Signed-off-by: Nishanth Menon <nm@ti.com>
| | | * | | OMAP4: PM: TWL6030: fix voltage conversion formulaPatrick Titiano2011-09-151-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | omap_twl_vsel_to_uv() and omap_twl_uv_to_vsel() functions used to convert voltages to TWL6030 SMPS commands (a.k.a "vsel") implement incorrect conversion formula. It uses legacy OMAP3 formula, but OMAP4 Power IC has different offset and voltage step: - Voltage Step is now 12.66mV (instead of 12.5mV) - Offset is either 607.7mV or 709mV depending on TWL6030 chip revision (instead of 600mV) This leads to setting voltages potentially higher than expected, and so potentially some (limited) power overconsumption. For reference, see formula and tables in section 8.5.2.3 "Output Voltage Selection (Standard Mode / Extended Mode with or without offset)" in TWL6030 functional specifications document. [nm@ti.com: ported to voltdm_c] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Patrick Titiano <p-titiano@ti.com>
| | | * | | omap: voltage: add a stub header file for external/regulator useTero Kristo2011-09-151-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Needed as some of the voltage layer functionality is accessed from the SMPS regulator driver. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * | | OMAP2+: VC: more registers are per-channel starting with OMAP5Kevin Hilman2011-09-154-20/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Starting with OMAP5, the following registers are per-channel and not common to a all VC channels: - SMPS I2C slave address - SMPS voltage register address offset - SMPS cmd/value register address offset - VC channel configuration register Move these from the channel-common struct into the per-channel struct to support OMAP5. Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * | | OMAP3+: voltage: update nominal voltage in voltdm_scale() not VC post-scaleKevin Hilman2011-09-152-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the nominal voltage is updated in the VC post-scale function which is common to both scaling methods. However, this has readabiliy problems as this update is not where it might be expected. Instead, move the updated into voltdm_scale() upon a successful return of voltdm->scale() Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * | | OMAP3+: voltage: rename omap_voltage_get_nom_volt -> voltdm_get_voltageKevin Hilman2011-09-153-8/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use preferred voltdm_ naming for getting current nominal voltage. No functional changes. Signed-off-by: Kevin Hilman <khilman@ti.com>
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