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* Blackfin: clean up mach header includesMike Frysinger2011-01-1045-2142/+1990
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The main asm/blackfin.h header will pull in mach/blackfin.h to get all the fun Blackfin defines. So having any of the sub-mach headers trying to include asm/blackfin.h makes no sense -- punt it. The mach/blackfin.h header takes care of including the part-specific def headers which in turn will include any other needed def file. Similarly, it takes care of pulling in the part-specific cdef header. So move this logic out of the blackfin.h when necessary. Further, make sure the cdef headers do not waste time including the def headers again. Since all parts need the common def/cdef headers, move this logic out of the part-specific headers and into the mach/blackfin.h file. Finally, we need to split the BF539 def header since the BF538 does not have MXVR and we don't want to expose those MMRs. So now all parts should have the same behavior: mach/blackfin.h asm/def_LPBlackfin.h part-specific def.h if ! asm asm/cdef_LPBlackfin.h part-specific cdef.h And the sub def/cdef headers only tail into what they need. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf533: merge fio_flag back into normal mach headersMike Frysinger2011-01-102-55/+41
| | | | | | | | | We don't want the BF533 to be different in terms of its MMR headers, so merge the FIO_FLAG helpers back into the normal place. To avoid circular dependencies with headers, turn the inline C funcs into CPP defines. Not like there will be any code size differences. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf561-ezkit: add SMP defconfigMike Frysinger2011-01-101-0/+113
| | | | | | | Since the SMP code paths tend to compile fail a lot, start a SMP defconfig so our nightly build tools will automatically test it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf533: convert boards to gpio frameworkMike Frysinger2011-01-103-22/+22
| | | | | | | | We don't want people banging on MMRs directly. As for the ip0x board, it shouldn't need to muck with the CS pin directly as the Blackfin SPI bus master driver takes care of driving this. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: push gpio (port) defines into common headersMike Frysinger2011-01-1024-601/+282
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf54x: drop unused legacy MMR namesMike Frysinger2011-01-102-24/+0
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: dma: constify MMR pointer arrayMike Frysinger2011-01-108-8/+8
| | | | | | The array of pointers is never written, so constify it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: standardize DMAC traffic control MMRs & MDMA MMRsMike Frysinger2011-01-1015-973/+698
| | | | | | | | | | Use the same naming convention for DMA traffic MMRs (most were legacy anyways) so we can avoid useless ifdef trees. Same goes for MDMA names -- this actually allows us to undo a bunch of ifdef redirects that existed for this purpose alone. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bfin_dma.h: start a header for DMA MMR layoutMike Frysinger2011-01-102-34/+92
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: switch to asm-generic/io.hMike Frysinger2011-01-101-201/+37
| | | | | Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* asm-generic/io.h: add reads[bwl]/writes[bwl] helpersMike Frysinger2011-01-102-30/+30
| | | | | | | | | A bunch of arches define reads[bwl]/writes[bwl] helpers for accessing memory mapped registers. Since the Blackfin ones aren't specific to Blackfin code, move them to the common asm-generic/io.h for people. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* net/irda: bfin_sir: back out transitional definesMike Frysinger2011-01-101-3/+0
| | | | | | Now that the common header is sane, we can drop the transitional cruft. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bfin_serial.h: unify heavily duplicated serial codeMike Frysinger2011-01-1029-1024/+377
| | | | | | | | Each Blackfin port has been duplicating UART structures and defines when there really is no need for it. So start a new bfin_serial.h header to unify all these pieces and give ourselves a fresh start. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* net/irda: bfin_sir: pull in serial headers for definesMike Frysinger2011-01-101-0/+5
| | | | | | | | | | We're in the process of cleaning up the global Blackfin namespace, so the bfin_sir driver needs to pull in the serial header explicitly now. This does add a little transitional cruft to keep things compiling, but a follow up patch in this series will cull that. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: musb-boards: push clkin value to platform resourcesBob Liu2011-01-106-0/+6
| | | | | | | | | In order to not touch the driver file for different xtal usage, push the clkin value to board file and calculate the register value instead of hardcoding it. Signed-off-by: Bob Liu <lliubbo@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: SMP: fix hotplug building after irq header shuffleGraf Yang2011-01-101-0/+2
| | | | | Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'for-next' of ↵Linus Torvalds2011-01-0717-400/+701
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/hch/hfsplus * 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/hch/hfsplus: hfsplus: %L-to-%ll, macro correction, and remove unneeded braces hfsplus: spaces/indentation clean-up hfsplus: C99 comments clean-up hfsplus: over 80 character lines clean-up hfsplus: fix an artifact in ioctl flag checking hfsplus: flush disk caches in sync and fsync hfsplus: optimize fsync hfsplus: split up inode flags hfsplus: write up fsync for directories hfsplus: simplify fsync hfsplus: avoid useless work in hfsplus_sync_fs hfsplus: make sure sync writes out all metadata hfsplus: use raw bio access for partition tables hfsplus: use raw bio access for the volume headers hfsplus: always use hfsplus_sync_fs to write the volume header hfsplus: silence a few debug printks hfsplus: fix option parsing during remount Fix up conflicts due to VFS changes in fs/hfsplus/{hfsplus_fs.h,unicode.c}
| * hfsplus: %L-to-%ll, macro correction, and remove unneeded bracesAnton Salikhmetov2010-12-163-14/+14
| | | | | | | | | | | | | | | | | | | | Clean-up based on checkpatch.pl report against unnecessary braces (`{' and `}'), non-standard format option %Lu (%llu recommended) as well as one trailing statement in a macro definition which should have been on the next line. Signed-off-by: Anton Salikhmetov <alexo@tuxera.com> Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: spaces/indentation clean-upAnton Salikhmetov2010-12-164-14/+14
| | | | | | | | | | | | | | Fix incorrect spaces and indentation reported by checkpatch.pl. Signed-off-by: Anton Salikhmetov <alexo@tuxera.com> Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: C99 comments clean-upAnton Salikhmetov2010-12-163-13/+16
| | | | | | | | | | | | | | | | Match coding style restriction against C99 comments where checkpatch.pl reported errors about their usage. Signed-off-by: Anton Salikhmetov <alexo@tuxera.com> Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: over 80 character lines clean-upAnton Salikhmetov2010-12-1616-123/+260
| | | | | | | | | | | | | | | | Match coding style line length limitation where checkpatch.pl reported over-80-character-line warnings. Signed-off-by: Anton Salikhmetov <alexo@tuxera.com> Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: fix an artifact in ioctl flag checkingAnton Salikhmetov2010-12-161-1/+1
| | | | | | | | | | | | | | | | Fix a flag checking artifact in hfsplus_ioctl_getflags() routine found while doing clean-up against assignments inside `if's. Signed-off-by: Anton Salikhmetov <alexo@tuxera.com> Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: flush disk caches in sync and fsyncChristoph Hellwig2010-11-234-0/+21
| | | | | | | | | | | | | | | | | | | | Flush the disk cache in fsync and sync to make sure data actually is on disk on completion of these system calls. There is a nobarrier mount option to disable this behaviour. It's slightly misnamed now that barrier actually are gone, but it matches the name used by all major filesystems. Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: optimize fsyncChristoph Hellwig2010-11-236-32/+78
| | | | | | | | | | | | | | | | | | | | Avoid doing unessecary work in fsync. Do nothing unless the inode was marked dirty, and only write the various metadata inodes out if they contain any dirty state from this inode. This is archived by adding three new dirty bits to the hfsplus-specific inode which are set in the correct places. Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: split up inode flagsChristoph Hellwig2010-11-234-19/+29
| | | | | | | | | | | | | | | | | | Split the flags field in the hfsplus inode into an extent_state flag that is locked by the extent_lock, and a new flags field that uses atomic bitops. The second will grow more flags in the next patch. Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: write up fsync for directoriesChristoph Hellwig2010-11-233-1/+3
| | | | | | | | | | | | | | | | fsync is supposed to not just work on regular files, but also on directories. Fortunately enough hfsplus_file_fsync works just fine for directories, so we can just wire it up. Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: simplify fsyncChristoph Hellwig2010-11-231-21/+20
| | | | | | | | | | | | | | | | | | | | Remove lots of code we don't need from fsync, we just need to call ->write_inode on the inode if it's dirty, for which sync_inode_metadata is a lot more efficient than write_inode_now, and we need to write out the various metadata inodes, which we now do explicitly instead of by calling ->sync_fs. Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: avoid useless work in hfsplus_sync_fsChristoph Hellwig2010-11-231-0/+3
| | | | | | | | | | | | | | | | There is no reason to write out the metadata inodes or volume headers during a non-blocking sync, as we are almost guaranteed to dirty them again during the inode writeouts. Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: make sure sync writes out all metadataChristoph Hellwig2010-11-231-1/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | hfsplus stores all metadata except for the volume headers in special inodes. While these are marked hashed and periodically written out by the flusher threads, we can't rely on that for sync. For the case of a data integrity sync the VM has life-lock avoidance code that avoids writing inodes again that are redirtied during the sync, which is something that can happen easily for hfsplus. So make sure we explicitly write out the metadata inodes at the beginning of hfsplus_sync_fs. Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: use raw bio access for partition tablesChristoph Hellwig2010-11-232-70/+71
| | | | | | | | | | | | | | | | Switch the hfsplus partition table reding for cdroms to use our bio helpers. Again we don't rely on any caching in the buffer_heads, and this gets rid of the last buffer_head use in hfsplus. Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: use raw bio access for the volume headersChristoph Hellwig2010-11-233-88/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The hfsplus backup volume header is located two blocks from the end of the device. In case of device sizes that are not 4k aligned this means we can't access it using buffer_heads when using the default 4k block size. Switch to using raw bios to read/write all buffer headers. We were not relying on any caching behaviour of the buffer heads anyway. Additionally always read in the backup volume header during mount to verify that we can actually read it. Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: always use hfsplus_sync_fs to write the volume headerChristoph Hellwig2010-11-231-6/+3
| | | | | | | | | | | | | | | | | | Remove opencoded writing of the volume header in hfsplus_fill_super and hfsplus_put_super and offload it to hfsplus_sync_fs. In the put_super case this means we only write the superblock once instead of twice. Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: silence a few debug printksChristoph Hellwig2010-11-234-5/+3
| | | | | | | | | | | | | | Turn a few noisy debug printks that show up during xfstests into complied out debug print statements. Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: fix option parsing during remountChristoph Hellwig2010-11-073-5/+30
| | | | | | | | | | | | | | | | | | | | | | | | hfsplus only actually uses the force option during remount, but it uses the full option parser with a fake superblock to do so. This means remount will fail if any nls option is set (which happens frequently with older mount tools), even if it is the same. Fix this by adding a simpler version of the parser that only parses the force option for remount. Signed-off-by: Christoph Hellwig <hch@tuxera.com>
* | Merge branch 'next-spi' of git://git.secretlab.ca/git/linux-2.6Linus Torvalds2011-01-0745-1365/+1596
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'next-spi' of git://git.secretlab.ca/git/linux-2.6: (77 commits) spi/omap: Fix DMA API usage in OMAP MCSPI driver spi/imx: correct the test on platform_get_irq() return value spi/topcliff: Typo fix threhold to threshold spi/dw_spi Typo change diable to disable. spi/fsl_espi: change the read behaviour of the SPIRF spi/mpc52xx-psc-spi: move probe/remove to proper sections spi/dw_spi: add DMA support spi/dw_spi: change to EXPORT_SYMBOL_GPL for exported APIs spi/dw_spi: Fix too short timeout in spi polling loop spi/pl022: convert running variable spi/pl022: convert busy flag to a bool spi/pl022: pass the returned sglen to the DMA engine spi/pl022: map the buffers on the DMA engine spi/topcliff_pch: Fix data transfer issue spi/imx: remove autodetection spi/pxa2xx: pass of_node to spi device and set a parent device spi/pxa2xx: Modify RX-Tresh instead of busy-loop for the remaining RX bytes. spi/pxa2xx: Add chipselect support for Sodaville spi/pxa2xx: Consider CE4100's FIFO depth spi/pxa2xx: Add CE4100 support ...
| * | spi/omap: Fix DMA API usage in OMAP MCSPI driverRussell King - ARM Linux2011-01-071-8/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Running the latest kernel on the 4430SDP board with DMA API debugging enabled results in this: WARNING: at lib/dma-debug.c:803 check_unmap+0x19c/0x6f0() NULL NULL: DMA-API: device driver tries to free DMA memory it has not allocated [device address=0x000000008129901a] [size=260 bytes] Modules linked in: Backtrace: [<c003cbe0>] (dump_backtrace+0x0/0x10c) from [<c0278da8>] (dump_stack+0x18/0x1c) r7:c1839dc0 r6:c0198578 r5:c0304b17 r4:00000323 [<c0278d90>] (dump_stack+0x0/0x1c) from [<c005b158>] (warn_slowpath_common+0x58/0x70) [<c005b100>] (warn_slowpath_common+0x0/0x70) from [<c005b214>] (warn_slowpath_fmt+0x38/0x40) r8:c1839e40 r7:00000000 r6:00000104 r5:00000000 r4:8129901a [<c005b1dc>] (warn_slowpath_fmt+0x0/0x40) from [<c0198578>] (check_unmap+0x19c/0x6f0) r3:c03110de r2:c0304e6b [<c01983dc>] (check_unmap+0x0/0x6f0) from [<c0198cd8>] (debug_dma_unmap_page+0x74/0x80) [<c0198c64>] (debug_dma_unmap_page+0x0/0x80) from [<c01d5ad8>] (omap2_mcspi_work+0x514/0xbf0) [<c01d55c4>] (omap2_mcspi_work+0x0/0xbf0) from [<c006dfb0>] (process_one_work+0x294/0x400) [<c006dd1c>] (process_one_work+0x0/0x400) from [<c006e50c>] (worker_thread+0x220/0x3f8) [<c006e2ec>] (worker_thread+0x0/0x3f8) from [<c00738d0>] (kthread+0x88/0x90) [<c0073848>] (kthread+0x0/0x90) from [<c005e924>] (do_exit+0x0/0x5fc) r7:00000013 r6:c005e924 r5:c0073848 r4:c1829ee0 ---[ end trace 1b75b31a2719ed20 ]--- I've no idea why this driver uses NULL for dma_unmap_single instead of the &spi->dev that is laying around just waiting to be used in that function - but it's an easy fix. Also replace this comment with a FIXME comment: /* Do DMA mapping "early" for better error reporting and * dcache use. Note that if dma_unmap_single() ever starts * to do real work on ARM, we'd need to clean up mappings * for previous transfers on *ALL* exits of this loop... */ as the comment is not true - we do work in dma_unmap() functions, particularly on ARMv6 and above. I've corrected the existing unmap functions but if any others are required they must be added ASAP. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | spi/imx: correct the test on platform_get_irq() return valueRichard Genoud2011-01-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The test "if (spi_imx->irq <= 0)" is not testing the IRQ value, but the return value of platform_get_irq(). As platform_get_irq() can return an error (-ENXIO) or the IRQ value it found, the test should be "if (spi_imx->irq < 0)" [grant.likely: Note: In general, Linux irq number 0 should also mean no irq, but arm still allows devices to be assigned 0, and the imx platform uses 0 for one of the spi devices, so this patch is needed for the device to work] Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | spi/topcliff: Typo fix threhold to thresholdJustin P. Mattock2010-12-311-2/+2
| | | | | | | | | | | | | | | Signed-off-by: Justin P. Mattock <justinmattock@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | spi/dw_spi Typo change diable to disable.Justin P. Mattock2010-12-301-1/+1
| | | | | | | | | | | | | | | Signed-off-by: Justin P. Mattock <justinmattock@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | spi/fsl_espi: change the read behaviour of the SPIRFMingkai Hu2010-12-291-3/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The user must read N bytes of SPIRF (1 <= N <= 4) that do not exceed the amount of data in the receive FIFO, so read the SPIRF byte by byte when the data in receive FIFO is less than 4 bytes. On Simics, when read N bytes that exceed the amout of data in receive FIFO, we can't read the data out, that is we can't clear the rx FIFO, then the CPU will loop on the espi rx interrupt. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | Merge branch 'spi' of git://git.linutronix.de/users/bigeasy/soda into spi/nextGrant Likely2010-12-2927-138/+547
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'spi' of git://git.linutronix.de/users/bigeasy/soda into spi/next spi/pxa2xx: register driver properly spi/pxa2xx: add support for shared IRQ handler spi/pxa2xx: Use define for SSSR_TFL_MASK instead of plain numbers arm/pxa2xx: reorgazine SSP and SPI header files spi/pxa2xx: Add CE4100 support spi/pxa2xx: Consider CE4100's FIFO depth spi/pxa2xx: Add chipselect support for Sodaville spi/pxa2xx: Modify RX-Tresh instead of busy-loop for the remaining RX bytes. spi/pxa2xx: pass of_node to spi device and set a parent device
| | * | spi/pxa2xx: pass of_node to spi device and set a parent deviceSebastian Andrzej Siewior2010-12-021-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | the of_node will auto-publish devices which are added to the device tree. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
| | * | spi/pxa2xx: Modify RX-Tresh instead of busy-loop for the remaining RX bytes.Sebastian Andrzej Siewior2010-12-021-17/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After all TX bytes are sent, the driver spins while the SPI core is busy and then it spins for a "short" period of time until RX bytes are available. On Sodavile the busy flag disappears pretty quick and after that it takes approx ~130ms (sometimes less but not much) until there are bytes available in the RX FIFO. This patch removes the busy loop and modifies the RX threshould so we get woken up once the remainings bytes arrived. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
| | * | spi/pxa2xx: Add chipselect support for SodavilleSebastian Andrzej Siewior2010-12-022-25/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SPI core on Sodaville supports chip selects. Its configuration moved into the SSSR register at bit 0 and 1. Thus Sodaville can be hooked up with up to 4 devices. This patch ensures that the bits which are otherwiese reserved are only touched on Sodaville and not on any other PXAs. Also it makes sure that the status register does not lose the CS information while clearing the ROR bit. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
| | * | spi/pxa2xx: Consider CE4100's FIFO depthSebastian Andrzej Siewior2010-12-012-8/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For PXA the default threshold is FIFO_DEPTH / 2. Adjust this value for CE4100. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
| | * | spi/pxa2xx: Add CE4100 supportSebastian Andrzej Siewior2010-12-015-7/+314
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sodaville's SPI controller is very much the same as in PXA25x. The difference: - The RX/TX FIFO is only 4 words deep instead of 16 - No DMA support - The SPI controller offers a CS functionality Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
| | * | arm/pxa2xx: reorgazine SSP and SPI header filesSebastian Andrzej Siewior2010-12-0123-32/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PXA-SPI driver relies on some files / defines which are arm specific and are within the ARM tree. The CE4100 SoC which is x86 has also the SPI core. This patch moves the ssp and spi files from arm/mach-pxa and plat-pxa to include/linux where the CE4100 can access them. This move got verified by building the following defconfigs: cm_x2xx_defconfig corgi_defconfig em_x270_defconfig ezx_defconfig imote2_defconfig pxa3xx_defconfig spitz_defconfig zeus_defconfig raumfeld_defconfig magician_defconfig Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
| | * | spi/pxa2xx: Use define for SSSR_TFL_MASK instead of plain numbersSebastian Andrzej Siewior2010-12-012-5/+6
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
| | * | spi/pxa2xx: add support for shared IRQ handlerSebastian Andrzej Siewior2010-12-011-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is required in case the interrupt line is shared with other devices. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
| | * | spi/pxa2xx: register driver properlySebastian Andrzej Siewior2010-11-261-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | use platform_driver_register instead of platform_driver_probe. The latter only checks available devices at the time of calling. So if a device gets inserter at a later point in time then the driver will never play with it. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
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