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* powerpc: Add support for OpenBlockS 600Benjamin Herrenschmidt2011-12-087-3/+438
| | | | | | | | | | | | | | | | So I've had one of these for a while and it looks like the vendor never bothered submitting the support upstream. This adds it using ppc40x_simple and provides a device-tree. There are some changes to the boot wrapper because the way u-boot works on this thing, it seems to expect a multipart image with the kernel, initrd and dtb in it. The USB support is missing as it needs the yet unmerged driver for the DWC OTG part and the GPIOs may need further definition in the dts. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* Merge branch 'booke-hugetlb' into nextBenjamin Herrenschmidt2011-12-0814-87/+155
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| * powerpc: Define/use HUGETLB_NEED_PRELOAD insead of complicated #ifBecky Bruce2011-12-072-2/+8
| | | | | | | | | | | | | | | | | | Define HUGETLB_NEED_PRELOAD in mmu-book3e.h for CONFIG_PPC64 instead of having a much more complicated #if block. This is easier to read and maintain. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc/book3e: Change hugetlb preload to take vma argumentBecky Bruce2011-12-073-4/+9
| | | | | | | | | | | | | | This avoids an extra find_vma() and is less error-prone. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc: Enable hugetlb by default for corenet64 platformsBecky Bruce2011-12-071-0/+1
| | | | | | | | | | Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc: Enable Hugetlb by default for 32-bit 85xx/corenetBecky Bruce2011-12-073-0/+3
| | | | | | | | | | Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc: Kconfig updates for FSL BookE HUGETLB 64-bitBecky Bruce2011-12-071-2/+2
| | | | | | | | | | | | | | | | Allow hugetlb to be enabled on 64b FSL_BOOK3E. No platforms enable it by default yet. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc: Add gpages reservation code for 64-bit FSL BOOKEBecky Bruce2011-12-073-9/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For 64-bit FSL_BOOKE implementations, gigantic pages need to be reserved at boot time by the memblock code based on the command line. This adds the call that handles the reservation, and fixes some code comments. It also removes the previous pr_err when reserve_hugetlb_gpages is called on a system without hugetlb enabled - the way the code is structured, the call is unconditional and the resulting error message spurious and confusing. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc: Add hugepage support to 64-bit tablewalk code for FSL_BOOK3EBecky Bruce2011-12-071-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before hugetlb, at each level of the table, we test for !0 to determine if we have a valid table entry. With hugetlb, this compare becomes: < 0 is a normal entry 0 is an invalid entry > 0 is huge This works because the hugepage code pulls the top bit off the entry (which for non-huge entries always has the top bit set) as an indicator that we have a hugepage. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc: Whitespace/comment changes to tlb_low_64e.SBecky Bruce2011-12-071-17/+11
| | | | | | | | | | | | | | | | | | | | | | | | I happened to comment this code while I was digging through it; we might as well commit that. I also made some whitespace changes - the existing code had a lot of unnecessary newlines that I found annoying when I was working on my tiny laptop. No functional changes. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc: hugetlb: modify include usage for FSL BookE codeBecky Bruce2011-12-073-33/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The original 32-bit hugetlb implementation used PPC64 vs PPC32 to determine which code path to take. However, the final hugetlb implementation for 64-bit FSL ended up shared with the FSL 32-bit code so the actual check needs to be FSL_BOOK3E vs everything else. This patch changes the include protections to reflect this. There are also a couple of related comment fixes. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc: Update hugetlb huge_pte_alloc and tablewalk code for FSL BOOKEBecky Bruce2011-12-071-6/+42
| | | | | | | | | | | | | | | | | | This updates the hugetlb page table code to handle 64-bit FSL_BOOKE. The previous 32-bit work counted on the inner levels of the page table collapsing. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc: Fix booke hugetlb preload code for PPC_MM_SLICES and 64-bitBecky Bruce2011-12-071-9/+6
| | | | | | | | | | | | | | | | | | | | | | | | This patch does 2 things: It corrects the code that determines the size to write into MAS1 for the PPC_MM_SLICES case (this originally came from David Gibson and I had incorrectly altered it), and it changes the methodolody used to calculate the size for !PPC_MM_SLICES to work for 64-bit as well as 32-bit. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc: hugetlb: fix huge_ptep_set_access_flags return valueBecky Bruce2011-12-071-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | There was an unconditional return of "1" in the original code from David Gibson, and I dropped it because it wasn't needed for FSL BOOKE 32-bit. However, not all systems (including 64-bit FSL BOOKE) do loading of the hpte from the fault handler asm and depend on this function returning 1, which causes a call to update_mmu_cache() that writes an entry into the tlb. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc: Only define HAVE_ARCH_HUGETLB_UNMAPPED_AREA if PPC_MM_SLICESBecky Bruce2011-12-072-4/+4
| | | | | | | | | | | | | | | | If we don't have slices, we should be able to use the generic hugetlb_get_unmapped_area() code Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | Merge branch 'mpic' into nextBenjamin Herrenschmidt2011-12-0733-621/+225
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| * | powerpc/mpic: Add in-core support for cascaded MPICsKyle Moffett2011-12-073-56/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Cell and PowerMac platforms use virtually identical cascaded-IRQ setup code, so just merge it into the core. Ideally this code would trigger automatically when an MPIC device-node specifies an "interrupts" property, perhaps even enabling MPIC_SECONDARY along the way. Unfortunately, Benjamin Herrenschmidt has had bad experiences in the past with the quality of Apple PowerMac device-trees, so to be safe we will only try to parse out an IRQ if the MPIC_SECONDARY flag is set by the caller. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | powerpc/mpic: Cache the device-tree node in "struct mpic"Kyle Moffett2011-12-072-17/+19
| | | | | | | | | | | | | | | | | | | | | | | | Store the node pointer in the MPIC during initialization so that all of the later operational code can just reuse the cached pointer. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | powerpc/mpic: Put "pic-no-reset" test back into the MPIC codeKyle Moffett2011-12-071-6/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | There's not really any reason to have this one-liner in a separate static inline function, given that all the other similar tests are already in the alloc_mpic() code. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | powerpc/mpic: Don't open-code dcr_resource_startKyle Moffett2011-12-071-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | Don't open-code the OpenFirmware "dcr-reg" property lookup trying to map DCR resources. This makes the code a bit easier to read. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | powerpc/mpic: Invert the meaning of MPIC_PRIMARYKyle Moffett2011-12-0731-47/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It turns out that there are only 2 in-tree platforms which use MPICs which are not "primary": IBM Cell and PowerMac. To reduce the complexity of the typical board setup code, invert the MPIC_PRIMARY bit into MPIC_SECONDARY. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | powerpc/mpic: Search for open-pic device-tree node if NULLKyle Moffett2011-12-0723-244/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | Almost all PowerPC platforms use a standard "open-pic" device node so the mpic_alloc() function now accepts NULL for the device-node. This will cause it to perform a default search with of_find_matching_node(). Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | powerpc/mpic: Save computed phys_addr for board-specific codeKyle Moffett2011-12-077-54/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MPIC code can already perform an automatic OF address translation step as part of mpic_alloc(), but several boards need to use that base address when they perform mpic_assign_isu(). The easiest solution is to save the computed physical address into the "struct mpic" for later use by the board code. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | powerpc/mpic: Assume a device-node was passed in mpic_alloc()Kyle Moffett2011-12-071-29/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | All of the existing callers of mpic_alloc() pass in a non-NULL device-node pointer, so the checks for a NULL device-node may be removed. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | powerpc: Consolidate mpic_alloc() OF address translationKyle Moffett2011-12-0720-175/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of using the open-coded "reg" property lookup and address translation in mpic_alloc(), directly call of_address_to_resource(). This includes various workarounds for special cases which the naive of_address_translate() does not. Afterwards it is possible to remove the copiously copy-pasted calls to of_address_translate() from the 85xx/86xx/powermac platforms. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | powerpc/85xx: Move mpc85xx_smp_init() decl to a new "smp.h"Kyle Moffett2011-12-079-40/+23
| |/ | | | | | | | | | | | | | | | | | | This removes a bunch of "extern" declarations and CONFIG_SMP ifdefs. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/pci: Make pci_read_irq_line() staticBenjamin Herrenschmidt2011-12-072-4/+1
| | | | | | | | | | | | | | It's only used inside the same file where it's defined. There's also no point exporting it anymore. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/powernv: Workaround OFW issues in prom_init.cBenjamin Herrenschmidt2011-12-071-4/+10
| | | | | | | | | | | | | | | | Open Firmware on OPAL machines seems to have issues if we close stdin and/or we try to print things after calling "quiesce" so we avoid doing both. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/powernv: Display diag data on p7ioc EEH errorsBenjamin Herrenschmidt2011-12-074-19/+140
| | | | | | | | Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/powernv: Update OPAL interfacesBenjamin Herrenschmidt2011-12-073-6/+137
|/ | | | | | This adds some more interfaces for OPAL v2 Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc+sparc64/mm: Remove hack in mmap randomize layoutDan McGee2011-11-282-14/+6
| | | | | | | | | | | | | | | Since commit 8a0a9bd4db63bc45e301, this comment in mmap_rnd() does not hold true as the value returned by get_random_int() will in fact be different every single call. Remove the comment and simplify the code back to its original desired form. This reverts commit a5adc91a4b44b5d1 which is no longer necessary and also fixes the sparc code that copied this same adjustment. Signed-off-by: Dan McGee <dpmcgee@gmail.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc/xics: Harden xics hypervisor backendAnton Blanchard2011-11-281-11/+27
| | | | | | | | | | | | | | | During kdump stress testing I sometimes see the kdump kernel panic with: Interrupt 0x306 (real) is invalid, disabling it. Kernel panic - not syncing: bad return code EOI - rc = -4, value=ff000306 Instead of panicing print the error message, dump the stack the first time it happens and continue on. Add some more information to the debug messages as well. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Decode correct MSR bits in oops outputAnton Blanchard2011-11-281-3/+19
| | | | | | | | | | | | | | On a 64bit book3s machine I have an oops from a system reset that claims the book3e CE bit was set: MSR: 8000000000021032 <ME,CE,IR,DR> CR: 24004082 XER: 00000010 On a book3s machine system reset sets IBM bit 46 and 47 depending on the power saving mode. Separate the definitions by type and for completeness add the rest of the bits in. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* arch/powerpc: Remove duplicate/redundant Altivec entriesMatthew McClintock2011-11-281-2/+1
| | | | | | | In lieu of having multiple similiar lines, we can just have one generic cpu-as line for CONFIG_ALTIVEC Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc/maple: Enable access to HT Host-Bridge on MapleDmitry Eremin-Solenikov2011-11-281-0/+55
| | | | | | | | CPC925/CPC945 use special window to access host bridge functionality of u3-ht. Provide a way to access this device. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Implement CONFIG_STRICT_DEVMEMsukadev@linux.vnet.ibm.com2011-11-283-0/+31
| | | | | | | | | | | | | | | | | | | As described in the help text in the patch, this token restricts general access to /dev/mem as a way of increasing the security. Specifically, access to exclusive IOMEM and kernel RAM is denied unless CONFIG_STRICT_DEVMEM is set to 'n'. Implement the 'devmem_is_allowed()' interface for Powerpc. It will be called from range_is_allowed() when userpsace attempts to access /dev/mem. This patch is based on an earlier patch from Steve Best and with input from Paul Mackerras and Scott Wood. [BenH] Fixed a typo or two and removed the generic change which should be submitted as a separate patch Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* Merge remote-tracking branch 'kumar/next' into nextBenjamin Herrenschmidt2011-11-25179-13967/+12808
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| * drivers/serial/ucc_uart.c: Add missing call to init UCC UART port timeoutChuck Meade2011-11-241-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The UCC UART driver is missing a call to uart_update_timeout(). Without this call, attempting to close the port after outputting large amounts of data (i.e. using tty and uart buffering) results in long timeouts before the port will actually be shut down. For example, cat a large file to a UCC UART port. With the current driver, the port will stay open for 30 seconds after the last byte of data is output. But with this patch, the port is closed as expected, just after the data has been output (tx fifos empty). Signed-off-by: Chuck Meade <chuck@ThePTRGroup.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/fsl_msi: add support for the fsl, msi property in PCI nodesTimur Tabi2011-11-242-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Freescale parts with multiple MSI controllers, the controllers are combined into one "pool" of interrupts. Whenever a device requests an MSI interrupt, the next available interrupt from the pool is selected, regardless of which MSI controller the interrupt is from. This works because each PCI bus has an ATMU to all of CCSR, so any PCI device can access any MSI interrupt register. The fsl,msi property is used to specify that a given PCI bus should only use a specific MSI device. This is necessary, for example, with the Freescale hypervisor, because the MSI devices are assigned to specific partitions. Ideally, we'd like to be able to assign MSI devices to PCI busses within the MSI or PCI layers. However, there does not appear to be a mechanism to do that. Whenever the MSI layer wants to allocate an MSI interrupt to a PCI device, it just calls arch_setup_msi_irqs(). It would be nice if we could register an MSI device with a specific PCI bus. So instead we remember the phandles of each MSI device, and we use that to limit our search for an available interrupt. Whenever we are asked to allocate a new interrupt for a PCI device, we check the fsl,msi property of the PCI bus for that device. If it exists, then as we are looping over all MSI devices, we skip the ones that don't have a matching phandle. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Renamed mpc85xx_common.c to common.cKumar Gala2011-11-242-1/+1
| | | | | | | | | | | | The file name is already scoped by the directory its in. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Additional consolidate of_platform_bus_probe callsKumar Gala2011-11-244-29/+7
| | | | | | | | | | | | | | P1010RDB & P1023RDS can use the new mpc85xx_common_publish_devices(). Also move 'fsl,srio' into the list of standard buses. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: consolidate of_platform_bus_probe callsDmitry Eremin-Solenikov2011-11-2416-218/+40
| | | | | | | | | | | | | | | | | | 85xx board files have a lot of duplication in *_publish_devices()/ *_declare_of_platform_devices() functions. Merge that into a single function common to most of the boards. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: separate cpm2 pic initDmitry Eremin-Solenikov2011-11-2416-157/+89
| | | | | | | | | | | | | | | | Separate handling of CPM2 PIC initialization to mpc85xx_cpm2_pic_init() function. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/83xx: make mpc830x_rdb use mpc83xx_setup_pciDmitry Eremin-Solenikov2011-11-241-8/+1
| | | | | | | | | | | | | | | | | | | | | | Traditionally mpc830x_rdb board file searched for mpc8308-pcie devices. However both in-kernel dts from the beginning declared those pcie units as compatible with mpc8314-pci, which is handled by mpc83xx_setup_pci(). Drop special handling for mpc8308 and use common function instead. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/83xx: merge PCI bridge additionsDmitry Eremin-Solenikov2011-11-2413-80/+34
| | | | | | | | | | | | | | | | | | Nearly all mpc83xx-based boards have a common piece of code - one that loops over all pci/pcie bridges and registers them. Merge that code into a special function common to all boards. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/83xx: consolidate of_platform_bus_probe callsDmitry Eremin-Solenikov2011-11-2415-180/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | 83xx board files have a lot of duplication in *_declare_of_platform_devices() functions. Merge that into a single function common to most of the boards. The only leftover is mpc834x_itx.c board file which explicitly asks for fsl,pq2pro-localbus, as corresponding bindings don't provide "simple-bus" compatibility in localbus node. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/83xx: consolidate init_IRQ functionsDmitry Eremin-Solenikov2011-11-2415-287/+68
| | | | | | | | | | | | | | | | | | On mpc83xx platform nearly all _init_IRQ functions look alike. They either just setup ipic, or setup ipic and QE PIC. Separate this to special functions to be either referenced from ppc_md, or called from board file. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: add pixis indirect mode device tree nodeTimur Tabi2011-11-241-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Freescale P1022 has a unique pin muxing "feature" where the DIU video controller's video signals are muxed with 24 of the local bus address signals. When the DIU is enabled, the bulk of the local bus is disabled, preventing access to memory-mapped devices like NOR flash and the pixis FPGA. In this situation, the pixis supports "indirect mode", which allows access to the pixis itself by reading/writing addresses on specific local bus chip selects. CS0 is used to select which pixis register to access, and CS1 is used to read/write the value. To support this, we introduce another board-control child node of the localbus node that contains a 'reg' property for CS0 and CS1. This will produce the correct physical addresses for CS0 and CS1. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Add lbc suspend support for PMJia Hongtao2011-11-242-2/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Power supply for LBC registers is off when system go to deep-sleep state. We save the values of registers before suspend and restore to registers after resume. We removed the last two reservation arrays from struct fsl_lbc_regs for allocating less memory and minimizing the memcpy size. Signed-off-by: Jiang Yutang <b14898@freescale.com> Signed-off-by: Jia Hongtao <B38951@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/fsl-pci: Don't hide resource for pci/e when configured as Agent/EPJason Jin2011-11-241-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current pci/pcie init code will hide the pci/pcie host resource. But did not judge it is host/RC or agent/EP. If configured as agent/EP, we should avoid hiding its resource in the host side. In PCI system, the Programing Interface can be used to judge the host/agent status: Programing Interface = 0: host Programing Interface = 1: Agent In PCIE system, both the Programing Interface and Header type can be used to judge the RC/EP status. Header Type = 0: EP Header Type = 1: RC Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Jia Hongtao <B38951@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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