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* KVM: ARM: Handle guest faults in KVMChristoffer Dall2013-01-234-1/+192
| | | | | | | | | | | | | | | | | | | Handles the guest faults in KVM by mapping in corresponding user pages in the 2nd stage page tables. We invalidate the instruction cache by MVA whenever we map a page to the guest (no, we cannot only do it when we have an iabt because the guest may happily read/write a page before hitting the icache) if the hardware uses VIPT or PIPT. In the latter case, we can invalidate only that physical page. In the first case, all bets are off and we simply must invalidate the whole affair. Not that VIVT icaches are tagged with vmids, and we are out of the woods on that one. Alexander Graf was nice enough to remind us of this massive pain. Reviewed-by: Will Deacon <will.deacon@arm.com> Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
* KVM: ARM: VFP userspace interfaceRusty Russell2013-01-233-0/+196
| | | | | | | | | We use space #18 for floating point regs. Reviewed-by: Will Deacon <will.deacon@arm.com> Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
* KVM: ARM: Demux CCSIDR in the userspace APIChristoffer Dall2013-01-233-3/+172
| | | | | | | | | | | | | | | | | | | The Cache Size Selection Register (CSSELR) selects the current Cache Size ID Register (CCSIDR). You write which cache you are interested in to CSSELR, and read the information out of CCSIDR. Which cache numbers are valid is known by reading the Cache Level ID Register (CLIDR). To export this state to userspace, we add a KVM_REG_ARM_DEMUX numberspace (17), which uses 8 bits to represent which register is being demultiplexed (0 for CCSIDR), and the lower 8 bits to represent this demultiplexing (in our case, the CSSELR value, which is 4 bits). Reviewed-by: Will Deacon <will.deacon@arm.com> Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
* KVM: ARM: User space API for getting/setting co-proc registersChristoffer Dall2013-01-235-4/+350
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following three ioctls are implemented: - KVM_GET_REG_LIST - KVM_GET_ONE_REG - KVM_SET_ONE_REG Now we have a table for all the cp15 registers, we can drive a generic API. The register IDs carry the following encoding: ARM registers are mapped using the lower 32 bits. The upper 16 of that is the register group type, or coprocessor number: ARM 32-bit CP15 registers have the following id bit patterns: 0x4002 0000 000F <zero:1> <crn:4> <crm:4> <opc1:4> <opc2:3> ARM 64-bit CP15 registers have the following id bit patterns: 0x4003 0000 000F <zero:1> <zero:4> <crm:4> <opc1:4> <zero:3> For futureproofing, we need to tell QEMU about the CP15 registers the host lets the guest access. It will need this information to restore a current guest on a future CPU or perhaps a future KVM which allow some of these to be changed. We use a separate table for these, as they're only for the userspace API. Reviewed-by: Will Deacon <will.deacon@arm.com> Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
* KVM: ARM: Emulation framework and CP15 emulationChristoffer Dall2013-01-2311-4/+1160
| | | | | | | | | | | | | | | | | | | | | | | | | Adds a new important function in the main KVM/ARM code called handle_exit() which is called from kvm_arch_vcpu_ioctl_run() on returns from guest execution. This function examines the Hyp-Syndrome-Register (HSR), which contains information telling KVM what caused the exit from the guest. Some of the reasons for an exit are CP15 accesses, which are not allowed from the guest and this commit handles these exits by emulating the intended operation in software and skipping the guest instruction. Minor notes about the coproc register reset: 1) We reserve a value of 0 as an invalid cp15 offset, to catch bugs in our table, at cost of 4 bytes per vcpu. 2) Added comments on the table indicating how we handle each register, for simplicity of understanding. Reviewed-by: Will Deacon <will.deacon@arm.com> Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
* KVM: ARM: World-switch implementationChristoffer Dall2013-01-236-4/+1122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provides complete world-switch implementation to switch to other guests running in non-secure modes. Includes Hyp exception handlers that capture necessary exception information and stores the information on the VCPU and KVM structures. The following Hyp-ABI is also documented in the code: Hyp-ABI: Calling HYP-mode functions from host (in SVC mode): Switching to Hyp mode is done through a simple HVC #0 instruction. The exception vector code will check that the HVC comes from VMID==0 and if so will push the necessary state (SPSR, lr_usr) on the Hyp stack. - r0 contains a pointer to a HYP function - r1, r2, and r3 contain arguments to the above function. - The HYP function will be called with its arguments in r0, r1 and r2. On HYP function return, we return directly to SVC. A call to a function executing in Hyp mode is performed like the following: <svc code> ldr r0, =BSYM(my_hyp_fn) ldr r1, =my_param hvc #0 ; Call my_hyp_fn(my_param) from HYP mode <svc code> Otherwise, the world-switch is pretty straight-forward. All state that can be modified by the guest is first backed up on the Hyp stack and the VCPU values is loaded onto the hardware. State, which is not loaded, but theoretically modifiable by the guest is protected through the virtualiation features to generate a trap and cause software emulation. Upon guest returns, all state is restored from hardware onto the VCPU struct and the original state is restored from the Hyp-stack onto the hardware. SMP support using the VMPIDR calculated on the basis of the host MPIDR and overriding the low bits with KVM vcpu_id contributed by Marc Zyngier. Reuse of VMIDs has been implemented by Antonios Motakis and adapated from a separate patch into the appropriate patches introducing the functionality. Note that the VMIDs are stored per VM as required by the ARM architecture reference manual. To support VFP/NEON we trap those instructions using the HPCTR. When we trap, we switch the FPU. After a guest exit, the VFP state is returned to the host. When disabling access to floating point instructions, we also mask FPEXC_EN in order to avoid the guest receiving Undefined instruction exceptions before we have a chance to switch back the floating point state. We are reusing vfp_hard_struct, so we depend on VFPv3 being enabled in the host kernel, if not, we still trap cp10 and cp11 in order to inject an undefined instruction exception whenever the guest tries to use VFP/NEON. VFP/NEON developed by Antionios Motakis and Rusty Russell. Aborts that are permission faults, and not stage-1 page table walk, do not report the faulting address in the HPFAR. We have to resolve the IPA, and store it just like the HPFAR register on the VCPU struct. If the IPA cannot be resolved, it means another CPU is playing with the page tables, and we simply restart the guest. This quirk was fixed by Marc Zyngier. Reviewed-by: Will Deacon <will.deacon@arm.com> Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Antonios Motakis <a.motakis@virtualopensystems.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
* KVM: ARM: Inject IRQs and FIQs from userspaceChristoffer Dall2013-01-236-4/+134
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All interrupt injection is now based on the VM ioctl KVM_IRQ_LINE. This works semantically well for the GIC as we in fact raise/lower a line on a machine component (the gic). The IOCTL uses the follwing struct. struct kvm_irq_level { union { __u32 irq; /* GSI */ __s32 status; /* not used for KVM_IRQ_LEVEL */ }; __u32 level; /* 0 or 1 */ }; ARM can signal an interrupt either at the CPU level, or at the in-kernel irqchip (GIC), and for in-kernel irqchip can tell the GIC to use PPIs designated for specific cpus. The irq field is interpreted like this:  bits: | 31 ... 24 | 23 ... 16 | 15 ... 0 | field: | irq_type | vcpu_index | irq_number | The irq_type field has the following values: - irq_type[0]: out-of-kernel GIC: irq_number 0 is IRQ, irq_number 1 is FIQ - irq_type[1]: in-kernel GIC: SPI, irq_number between 32 and 1019 (incl.) (the vcpu_index field is ignored) - irq_type[2]: in-kernel GIC: PPI, irq_number between 16 and 31 (incl.) The irq_number thus corresponds to the irq ID in as in the GICv2 specs. This is documented in Documentation/kvm/api.txt. Reviewed-by: Will Deacon <will.deacon@arm.com> Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
* KVM: ARM: Memory virtualization setupChristoffer Dall2013-01-238-2/+488
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit introduces the framework for guest memory management through the use of 2nd stage translation. Each VM has a pointer to a level-1 table (the pgd field in struct kvm_arch) which is used for the 2nd stage translations. Entries are added when handling guest faults (later patch) and the table itself can be allocated and freed through the following functions implemented in arch/arm/kvm/arm_mmu.c: - kvm_alloc_stage2_pgd(struct kvm *kvm); - kvm_free_stage2_pgd(struct kvm *kvm); Each entry in TLBs and caches are tagged with a VMID identifier in addition to ASIDs. The VMIDs are assigned consecutively to VMs in the order that VMs are executed, and caches and tlbs are invalidated when the VMID space has been used to allow for more than 255 simultaenously running guests. The 2nd stage pgd is allocated in kvm_arch_init_vm(). The table is freed in kvm_arch_destroy_vm(). Both functions are called from the main KVM code. We pre-allocate page table memory to be able to synchronize using a spinlock and be called under rcu_read_lock from the MMU notifiers. We steal the mmu_memory_cache implementation from x86 and adapt for our specific usage. We support MMU notifiers (thanks to Marc Zyngier) through kvm_unmap_hva and kvm_set_spte_hva. Finally, define kvm_phys_addr_ioremap() to map a device at a guest IPA, which is used by VGIC support to map the virtual CPU interface registers to the guest. This support is added by Marc Zyngier. Reviewed-by: Will Deacon <will.deacon@arm.com> Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
* KVM: ARM: Hypervisor initializationChristoffer Dall2013-01-239-0/+755
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Sets up KVM code to handle all exceptions taken to Hyp mode. When the kernel is booted in Hyp mode, calling an hvc instruction with r0 pointing to the new vectors, the HVBAR is changed to the the vector pointers. This allows subsystems (like KVM here) to execute code in Hyp-mode with the MMU disabled. We initialize other Hyp-mode registers and enables the MMU for Hyp-mode from the id-mapped hyp initialization code. Afterwards, the HVBAR is changed to point to KVM Hyp vectors used to catch guest faults and to switch to Hyp mode to perform a world-switch into a KVM guest. Also provides memory mapping code to map required code pages, data structures, and I/O regions accessed in Hyp mode at the same virtual address as the host kernel virtual addresses, but which conforms to the architectural requirements for translations in Hyp mode. This interface is added in arch/arm/kvm/arm_mmu.c and comprises: - create_hyp_mappings(from, to); - create_hyp_io_mappings(from, to, phys_addr); - free_hyp_pmds(); Reviewed-by: Will Deacon <will.deacon@arm.com> Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
* KVM: ARM: Initial skeleton to compile KVM supportChristoffer Dall2013-01-2321-4/+1445
| | | | | | | | | | | | | | | | | Targets KVM support for Cortex A-15 processors. Contains all the framework components, make files, header files, some tracing functionality, and basic user space API. Only supported core is Cortex-A15 for now. Most functionality is in arch/arm/kvm/* or arch/arm/include/asm/kvm_*.h. Reviewed-by: Will Deacon <will.deacon@arm.com> Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
* ARM: Section based HYP idmapChristoffer Dall2013-01-234-12/+51
| | | | | | | | | | | | | | | | Add a method (hyp_idmap_setup) to populate a hyp pgd with an identity mapping of the code contained in the .hyp.idmap.text section. Offer a method to drop this identity mapping through hyp_idmap_teardown. Make all the above depend on CONFIG_ARM_VIRT_EXT and CONFIG_ARM_LPAE. Reviewed-by: Will Deacon <will.deacon@arm.com> Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
* ARM: Add page table and page defines needed by KVMChristoffer Dall2013-01-233-0/+47
| | | | | | | | | | | | | | | KVM uses the stage-2 page tables and the Hyp page table format, so we define the fields and page protection flags needed by KVM. The nomenclature is this: - page_hyp: PL2 code/data mappings - page_hyp_device: PL2 device mappings (vgic access) - page_s2: Stage-2 code/data page mappings - page_s2_device: Stage-2 device mappings (vgic access) Reviewed-by: Will Deacon <will.deacon@arm.com> Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Christoffer Dall <c.dall@virtualopensystems.com>
* Merge branch 'for-rmk/perf' into for-rmk/virt/kvm/coreWill Deacon2013-01-236-49/+75
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| * ARM: perf: simplify __hw_perf_event_init err handlingMark Rutland2013-01-181-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | Currently __hw_perf_event_init has an err variable that's ignored right until the end, where it's initialised, conditionally set, and then used as a boolean flag deciding whether to return another error code. This patch removes the err variable and simplifies the associated error handling logic. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
| * ARM: perf: remove unnecessary checks for idx < 0Mark Rutland2013-01-181-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We currently check for hwx->idx < 0 in armpmu_read and armpmu_del unnecessarily. The only case where hwc->idx < 0 is when armpmu_add fails, in which case the event's state is set to PERF_EVENT_STATE_INACTIVE. The perf core will not attempt to read from an event in PERF_EVENT_STATE_INACTIVE, and so the check in armpmu_read is unnecessary. Similarly, if perf core cannot add an event it will not attempt to delete it, so the WARN_ON in armpmu_del is unnecessary. This patch removes these two redundant checks. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
| * ARM: perf: handle armpmu_register failingMark Rutland2013-01-181-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently perf_pmu_register may fail for several reasons (e.g. being unable to allocate memory for the struct device it associates with each PMU), and while any error is propagated by armpmu_register, it is ignored by cpu_pmu_device_probe and not propagated to the caller. This also results in a leak of a struct arm_pmu. This patch adds cleanup if armpmu_register fails, and updates the info messages to better differentiate this type of failure from a failure to probe the PMU type from the hardware or dt. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
| * ARM: perf: don't pretend to support counting of L1I writesWill Deacon2013-01-163-12/+12
| | | | | | | | | | | | | | | | | | | | | | ARM has a harvard cache architecture and cannot write directly to the I-side. This patch removes the L1I write events from the cache map (which previously returned *read* events in many cases). Reported-by: Mike Williams <michael.williams@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
| * ARM: perf: remove redundant NULL check on cpu_pmuWill Deacon2013-01-141-1/+1
| | | | | | | | | | | | | | | | cpu_pmu has already been dereferenced before we consider invoking the ->reset function, so remove the redundant NULL check. Reported-by: Cong Ding <dinggnu@gmail.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
| * ARM: Use implementor and part defines from cputype.hChristoffer Dall2013-01-111-18/+16
| | | | | | | | | | | | | | | | | | | | Instead of decoding implementor numbers, part numbers and Xscale architecture masks inline in the pmu probing function, use defines and accessor functions from cputype.h, which can also be shared by other subsystems, such as KVM. Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
| * ARM: Define CPU part numbers and implementorsChristoffer Dall2013-01-111-0/+33
|/ | | | | | | | | Define implementor IDs, part numbers and Xscale architecture versions in cputype.h. Also create accessor functions for reading the implementor, part number, and Xscale architecture versions from the CPUID regiser. Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
* Linux 3.8-rc3v3.8-rc3Linus Torvalds2013-01-091-1/+1
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* Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds2013-01-097-22/+40
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM fixes from Russell King. * 'fixes' of git://git.linaro.org/people/rmk/linux-arm: ARM: 7616/1: cache-l2x0: aurora: Use writel_relaxed instead of writel ARM: 7615/1: cache-l2x0: aurora: Invalidate during clean operation with WT enable ARM: 7614/1: mm: fix wrong branch from Cortex-A9 to PJ4b ARM: 7612/1: imx: Do not select some errata that depends on !ARCH_MULTIPLATFORM ARM: 7611/1: VIC: fix bug in VIC irqdomain code ARM: 7610/1: versatile: bump IRQ numbers ARM: 7609/1: disable errata work-arounds which access secure registers ARM: 7608/1: l2x0: Only set .set_debug on PL310 r3p0 and earlier
| * ARM: 7616/1: cache-l2x0: aurora: Use writel_relaxed instead of writelGregory CLEMENT2013-01-071-4/+5
| | | | | | | | | | | | | | | | | | | | | | The use of writel instead of writel_relaxed lead to deadlock in some situation (SMP on Armada 370 for instance). The use of writel_relaxed as it was done in the rest of this driver fixes this bug. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7615/1: cache-l2x0: aurora: Invalidate during clean operation with WT ↵Gregory CLEMENT2013-01-071-8/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | enable This patch fixes a bug for Aurora L2 cache controller when the write-through mode is enable. For the clean operation even if we don't have to flush the lines we still need to invalidate them. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7614/1: mm: fix wrong branch from Cortex-A9 to PJ4bHaojian Zhuang2013-01-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | If CONFIG_ARCH_MULTIPLATFORM & CONFIG_ARCH_MVEBU are both enabled, __v7_pj4b_setup is added between __v7_ca9mp_setup and __v7_setup. But there's no jump instruction added. If the chip is Cortex A5/A9, it goes through __v7_pj4b_setup also. It results in system hang. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7612/1: imx: Do not select some errata that depends on !ARCH_MULTIPLATFORMFabio Estevam2013-01-061-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 62e4d357a (ARM: 7609/1: disable errata work-arounds which access secure registers) ARM_ERRATA_743622/751472 depends on !ARCH_MULTIPLATFORM. Since imx has been converted to multiplatform, the following warning happens: $ make imx_v6_v7_defconfig warning: (SOC_IMX6Q && ARCH_TEGRA_2x_SOC && ARCH_TEGRA_3x_SOC) selects ARM_ERRATA_751472 which has unmet direct dependencies (CPU_V7 && !ARCH_MULTIPLATFORM) warning: (SOC_IMX6Q && ARCH_TEGRA_3x_SOC) selects ARM_ERRATA_743622 which has unmet direct dependencies (CPU_V7 && !ARCH_MULTIPLATFORM) warning: (SOC_IMX6Q && ARCH_TEGRA_3x_SOC) selects ARM_ERRATA_743622 which has unmet direct dependencies (CPU_V7 && !ARCH_MULTIPLATFORM) warning: (SOC_IMX6Q && ARCH_TEGRA_2x_SOC && ARCH_TEGRA_3x_SOC) selects ARM_ERRATA_751472 which has unmet direct dependencies (CPU_V7 && !ARCH_MULTIPLATFORM) Recommended approach is to remove ARM_ERRATA_743622/751472 from being selected by SOC_IMX6Q and apply such workarounds into the bootloader. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7611/1: VIC: fix bug in VIC irqdomain codeLinus Walleij2013-01-021-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The VIC irqdomain code added in commit 07c9249f1fa90cc8189bed44c0bcece664596a72 "ARM: 7554/1: VIC: use irq_domain_add_simple()" Had two bugs: 1) It didn't call irq_create_mapping() once on each valid irq source in the slowpath when registering the controller. 2) It passed a -1 as IRQ offset for the DT case, whereas 0 should be passed as invalid IRQ instead. Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7610/1: versatile: bump IRQ numbersLinus Walleij2013-01-021-3/+3
| | | | | | | | | | | | | | | | | | | | The Versatile starts to register Linux IRQ numbers from offset 0 which is illegal, since this is NO_IRQ. Bump all hard-coded IRQs by 32 to get rid of the problem. Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7609/1: disable errata work-arounds which access secure registersRob Herring2013-01-023-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to support secure and non-secure platforms in multi-platform kernels, errata work-arounds that access secure only registers need to be disabled. Make all the errata options that fit in this category depend on !CONFIG_ARCH_MULTIPLATFORM. This will effectively remove the errata options as platforms are converted over to multi-platform. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7608/1: l2x0: Only set .set_debug on PL310 r3p0 and earlierRob Herring2013-01-021-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | PL310 errata work-arounds using .set_debug function are only needed on r3p0 and earlier, so check the rev and only set .set_debug on older revs. Avoiding debug register accesses fixes aborts on non-secure platforms like highbank. It is assumed that non-secure platforms needing these work-arounds have already implemented .set_debug with secure monitor calls. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge tag 'edac_fixes_for_3.8' of ↵Linus Torvalds2013-01-092-18/+9
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp Pull EDAC fixes from Borislav Petkov: "Two error path fixes causing a crash and a Kconfig fix for an issue which spilled all EDAC suboptions into the 'Device Drivers' menu." * tag 'edac_fixes_for_3.8' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: EDAC: Cleanup device deregistering path EDAC: Fix EDAC Kconfig menu EDAC: Fix kernel panic on module unloading
| * | EDAC: Cleanup device deregistering pathLans Zhang2013-01-071-12/+6
| | | | | | | | | | | | | | | | | | | | | | | | Use device_unregister to replace put_device + device_del for cleanup, and fix the potential use after free. Signed-off-by: Lans Zhang <jia.zhang@windriver.com> Signed-off-by: Borislav Petkov <bp@alien8.de>
| * | EDAC: Fix EDAC Kconfig menuBorislav Petkov2013-01-071-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After f65aad41772f("MIPS: Cavium: Add EDAC support."), when entering the "Device Drivers" toplevel menu in menuconfig, the suboptions behind EDAC appeared merged with the rest of the device drivers types. This was because the menuconfig option EDAC is querying an EDAC_SUPPORT Kconfig bool which was defined after the menu definition. When pushing EDAC_SUPPORT up, before the menu definition, the variable is defined earlier and the above menuconfig artifact doesn't happen. Drop a useless menuconfig comment while at it. Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Borislav Petkov <bp@alien8.de>
| * | EDAC: Fix kernel panic on module unloadingKonstantin Khlebnikov2013-01-071-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes use-after-free and double-free bugs in edac_mc_sysfs_exit(). mci_pdev has single reference and put_device() calls mc_attr_release() which calls kfree(). The following device_del() works with already released memory. An another kfree() in edac_mc_sysfs_exit() releses the same memory again. Great. Signed-off-by: Konstantin Khlebnikov <khlebnikov@openvz.org> Cc: stable@vger.kernel.org # 3.[67] Cc: Denis Kirjanov <kirjanov@gmail.com> Cc: Mauro Carvalho Chehab <mchehab@redhat.com> Link: http://lkml.kernel.org/r/20121214110310.11019.21098.stgit@zurg Signed-off-by: Borislav Petkov <bp@alien8.de>
* | | mm: reinstante dropped pmd_trans_splitting() checkLinus Torvalds2013-01-091-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The check for a pmd being in the process of being split was dropped by mistake by commit d10e63f29488 ("mm: numa: Create basic numa page hinting infrastructure"). Put it back. Reported-by: Dave Jones <davej@redhat.com> Debugged-by: Hillf Danton <dhillf@gmail.com> Acked-by: Andrea Arcangeli <aarcange@redhat.com> Acked-by: Mel Gorman <mgorman@suse.de> Cc: Kirill Shutemov <kirill@shutemov.name> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | cred: Remove tgcred pointer from struct credMarc Dionne2013-01-091-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 3a50597de863 ("KEYS: Make the session and process keyrings per-thread") removed the definition of the thread_group_cred structure, but left a now unused pointer in struct cred. Signed-off-by: Marc Dionne <marc.c.dionne@gmail.com> Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | Merge tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2013-01-0853-183/+351
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM SoC fixes from Olof Johansson: "People are back from the holiday breaks, and it shows. Here are a bunch of fixes for a number of platforms: - A couple of small fixes for Nomadik - A larger set of changes for kirkwood/mvebu - uart driver selection, dt clocks, gpio-poweroff fixups, a few __init annotation fixes and some error handling improvement in their xor dma driver. - i.MX had a couple of minor fixes (and a critical one for flexcan2 clock setup) - MXS has a small board fix and a framebuffer bugfix - A set of fixes for Samsung Exynos, fixing default bootargs and some Exynos5440 clock issues - A set of OMAP changes including PM fixes and a few sparse warning fixups All in all a bit more positive code delta than we'd ideally want to see here, mostly from the OMAP PM changes, but nothing overly crazy." * tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (44 commits) ARM: clps711x: Fix bad merge of clockevents setup ARM: highbank: save and restore L2 cache and GIC on suspend ARM: highbank: add a power request clear ARM: highbank: fix secondary boot and hotplug ARM: highbank: fix typos with hignbank in power request functions ARM: dts: fix highbank cpu mpidr values ARM: dts: add device_type prop to cpu nodes on Calxeda platforms ARM: mx5: Fix MX53 flexcan2 clock ARM: OMAP2+: am33xx-hwmod: Fix wrongly terminated am33xx_usbss_mpu_irqs array pinctrl: mvebu: make pdma clock on dove mandatory ARM: Dove: Add pinctrl clock to DT dma: mv_xor: fix error handling for clocks dma: mv_xor: fix error handling of mv_xor_channel_add() arm: mvebu: Add missing ; for cpu node. arm: mvebu: Armada XP MV78230 has only three Ethernet interfaces arm: mvebu: Armada XP MV78230 has two cores, not one clk: mvebu: Remove inappropriate __init tagging ARM: Kirkwood: Use fixed-regulator instead of board gpio call ARM: Kirkwood: Fix missing sdio clock ARM: Kirkwood: Switch TWSI1 of 88f6282 to DT clock providers ...
| * \ \ Merge tag 'omap-for-v3.8-rc2/fixes-signed-v2' of ↵Olof Johansson2013-01-0811-38/+132
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes From Tony Lindgren: The biggest change is a fix to deal with different power state on omap2 registers that causes issues trying to use common PM code. Also fix few incorrect registers, and an issue for omap1 USB, and few sparse fixes for issues that sneaked in with all the clean-up. * tag 'omap-for-v3.8-rc2/fixes-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: am33xx-hwmod: Fix wrongly terminated am33xx_usbss_mpu_irqs array ARM: OMAP1: fix USB configuration use-after-release ARM: OMAP2/3: PRM: fix bogus OMAP2xxx powerstate return values ARM: OMAP3: clock data: Add missing enable/disable for EMU clock ARM: OMAP4: PRM: Correct wrong instance usage for reading reset sources ARM: OMAP4: PRM: fix RSTTIME and RSTST offsets ARM: OMAP4: PRM: Correct reset source map ARM: OMAP: SRAM: resolve sparse warnings ARM: OMAP AM33xx: hwmod data: resolve sparse warnings ARM: OMAP: 32k counter: resolve sparse warnings Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | ARM: OMAP2+: am33xx-hwmod: Fix wrongly terminated am33xx_usbss_mpu_irqs arrayPantelis Antoniou2013-01-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IRQ array must be terminated by -1 and not by -1+OMAP_INTC_START This led to having a resource list of 100s of IRQs. Looks like this was caused by commit a2cfc509 (ARM: OMAP3+: hwmod: Add AM33XX HWMOD data) that probably had some search and replace updates done for the patch for sparse irq support. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> Acked-by: Paul Walmsley <paul@pwsan.com> [tony@atomide.com: updated wit information about the breaking commit] Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | ARM: OMAP1: fix USB configuration use-after-releaseAaro Koskinen2013-01-032-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All boards, except Amstrad E3, mark USB config with __initdata. As a result, when you compile USB into modules, they will try to refer already released platform data and the behaviour is undefined. For example on Nokia 770, I get the following kernel panic when modprobing ohci-hcd: [ 3.462158] Unable to handle kernel paging request at virtual address e7fddef0 [ 3.477050] pgd = c3434000 [ 3.487365] [e7fddef0] *pgd=00000000 [ 3.498535] Internal error: Oops: 80000005 [#1] ARM [ 3.510955] Modules linked in: ohci_hcd(+) [ 3.522705] CPU: 0 Not tainted (3.7.0-770_tiny+ #5) [ 3.535552] PC is at 0xe7fddef0 [ 3.546508] LR is at ohci_omap_init+0x5c/0x144 [ohci_hcd] [ 3.560272] pc : [<e7fddef0>] lr : [<bf003140>] psr: a0000013 [ 3.560272] sp : c344bdb0 ip : c344bce0 fp : c344bdcc [ 3.589782] r10: 00000001 r9 : 00000000 r8 : 00000000 [ 3.604553] r7 : 00000026 r6 : 000000de r5 : c0227300 r4 : c342d620 [ 3.621032] r3 : e7fddef0 r2 : c048b880 r1 : 00000000 r0 : 0000000a [ 3.637786] Flags: NzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user [ 3.655822] Control: 0005317f Table: 13434000 DAC: 00000015 [ 3.672790] Process modprobe (pid: 425, stack limit = 0xc344a1b8) [ 3.690643] Stack: (0xc344bdb0 to 0xc344c000) [ 3.707031] bda0: bf0030e4 c342d620 00000000 c049e62c [ 3.727905] bdc0: c344be04 c344bdd0 c0150ff0 bf0030f4 bf001b88 00000000 c048a4ac c345b020 [ 3.748870] bde0: c342d620 00000000 c048a468 bf003968 00000001 bf006000 c344be34 c344be08 [ 3.769836] be00: bf001bf0 c0150e48 00000000 c344be18 c00b9bfc c048a478 c048a4ac bf0037f8 [ 3.790985] be20: c012ca04 c000e024 c344be44 c344be38 c012d968 bf001a84 c344be64 c344be48 [ 3.812164] be40: c012c8ac c012d95c 00000000 c048a478 c048a4ac bf0037f8 c344be84 c344be68 [ 3.833740] be60: c012ca74 c012c80c 20000013 00000000 c344be88 bf0037f8 c344beac c344be88 [ 3.855468] be80: c012b038 c012ca14 c38093cc c383ee10 bf0037f8 c35be5a0 c049d5e8 00000000 [ 3.877166] bea0: c344bebc c344beb0 c012c40c c012aff4 c344beec c344bec0 c012bfc0 c012c3fc [ 3.898834] bec0: bf00378c 00000000 c344beec bf0037f8 00067f39 00000000 00005c44 c000e024 [ 3.920837] bee0: c344bf14 c344bef0 c012cd54 c012befc c04ce080 00067f39 00000000 00005c44 [ 3.943023] bf00: c000e024 bf006000 c344bf24 c344bf18 c012db14 c012ccc0 c344bf3c c344bf28 [ 3.965423] bf20: bf00604c c012dad8 c344a000 bf003834 c344bf7c c344bf40 c00087ac bf006010 [ 3.987976] bf40: 0000000f bf003834 00067f39 00000000 00005c44 bf003834 00067f39 00000000 [ 4.010711] bf60: 00005c44 c000e024 c344a000 00000000 c344bfa4 c344bf80 c004c35c c0008720 [ 4.033569] bf80: c344bfac c344bf90 01422192 01427ea0 00000000 00000080 00000000 c344bfa8 [ 4.056518] bfa0: c000dec0 c004c2f0 01422192 01427ea0 01427ea0 00005c44 00067f39 00000000 [ 4.079406] bfc0: 01422192 01427ea0 00000000 00000080 b6e11008 014221aa be941fcc b6e1e008 [ 4.102569] bfe0: b6ef6300 be941758 0000e93c b6ef6310 60000010 01427ea0 00000000 00000000 [ 4.125946] Backtrace: [ 4.143463] [<bf0030e4>] (ohci_omap_init+0x0/0x144 [ohci_hcd]) from [<c0150ff0>] (usb_add_hcd+0x1b8/0x61c) [ 4.183898] r6:c049e62c r5:00000000 r4:c342d620 r3:bf0030e4 [ 4.205596] [<c0150e38>] (usb_add_hcd+0x0/0x61c) from [<bf001bf0>] (ohci_hcd_omap_drv_probe+0x17c/0x224 [ohci_hcd]) [ 4.248138] [<bf001a74>] (ohci_hcd_omap_drv_probe+0x0/0x224 [ohci_hcd]) from [<c012d968>] (platform_drv_probe+0x1c/0x20) [ 4.292144] r8:c000e024 r7:c012ca04 r6:bf0037f8 r5:c048a4ac r4:c048a478 [ 4.316192] [<c012d94c>] (platform_drv_probe+0x0/0x20) from [<c012c8ac>] (driver_probe_device+0xb0/0x208) [ 4.360168] [<c012c7fc>] (driver_probe_device+0x0/0x208) from [<c012ca74>] (__driver_attach+0x70/0x94) [ 4.405548] r6:bf0037f8 r5:c048a4ac r4:c048a478 r3:00000000 [ 4.429809] [<c012ca04>] (__driver_attach+0x0/0x94) from [<c012b038>] (bus_for_each_dev+0x54/0x90) [ 4.475708] r6:bf0037f8 r5:c344be88 r4:00000000 r3:20000013 [ 4.500366] [<c012afe4>] (bus_for_each_dev+0x0/0x90) from [<c012c40c>] (driver_attach+0x20/0x28) [ 4.528442] r7:00000000 r6:c049d5e8 r5:c35be5a0 r4:bf0037f8 [ 4.553466] [<c012c3ec>] (driver_attach+0x0/0x28) from [<c012bfc0>] (bus_add_driver+0xd4/0x228) [ 4.581878] [<c012beec>] (bus_add_driver+0x0/0x228) from [<c012cd54>] (driver_register+0xa4/0x134) [ 4.629730] r8:c000e024 r7:00005c44 r6:00000000 r5:00067f39 r4:bf0037f8 [ 4.656738] [<c012ccb0>] (driver_register+0x0/0x134) from [<c012db14>] (platform_driver_register+0x4c/0x60) [ 4.706542] [<c012dac8>] (platform_driver_register+0x0/0x60) from [<bf00604c>] (ohci_hcd_mod_init+0x4c/0x8c [ohci_hcd]) [ 4.757843] [<bf006000>] (ohci_hcd_mod_init+0x0/0x8c [ohci_hcd]) from [<c00087ac>] (do_one_initcall+0x9c/0x174) [ 4.808990] r4:bf003834 r3:c344a000 [ 4.832641] [<c0008710>] (do_one_initcall+0x0/0x174) from [<c004c35c>] (sys_init_module+0x7c/0x194) [ 4.881530] [<c004c2e0>] (sys_init_module+0x0/0x194) from [<c000dec0>] (ret_fast_syscall+0x0/0x2c) [ 4.930664] r7:00000080 r6:00000000 r5:01427ea0 r4:01422192 [ 4.956481] Code: bad PC value [ 4.978729] ---[ end trace 58280240f08342c4 ]--- [ 5.002258] Kernel panic - not syncing: Fatal exception Fix this by taking a copy of the data. Also mark Amstrad E3's data with __initdata to save some memory with multi-board kernels. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | Merge tag 'omap-fixes-a2-for-v3.8-rc' of ↵Tony Lindgren2013-01-039-35/+123
| | |\ \ \ | | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.8-rc2/fixes Some OMAP PRCM and sparse fixes against v3.8-rc1. A basic set of test logs are available here: http://www.pwsan.com/omap/testlogs/prcm_fixes_b_3.8-rc/20130102120724/ The 3730 Beagle XM here has an intermittent failure mounting SD root, but the suspicion right now is that this is due to a failing SD card, rather than any change introduced by these patches. This second version includes a few changes requested by Tony Lindgren.
| | | * | ARM: OMAP2/3: PRM: fix bogus OMAP2xxx powerstate return valuesPaul Walmsley2013-01-023-28/+110
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On OMAP2xxx chips, the register bitfields for the PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED are different than those used on OMAP3/4. The order is reversed. So, for example, on OMAP2xxx, 0x0 indicates 'ON'; but on OMAP3/4, 0x0 indicates 'OFF'. Similarly, on OMAP2xxx, 0x3 indicates 'OFF', but on OMAP3/4, 0x3 indicates 'ON'. To fix this, we treat the OMAP3/4 values as the powerdomain API values, and create new low-level powerdomain functions for the OMAP2xxx chips which translate between the OMAP2xxx values and the OMAP3/4 values. Without this patch, the conversion of the OMAP2xxx PM code to the functional powerstate code results in a non-booting kernel. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | | * | ARM: OMAP3: clock data: Add missing enable/disable for EMU clockJon Hunter2013-01-021-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ETM/ETB drivers for OMAP3, enable the emu_src_ck clock in order to access the ETM/ETB hardware. The emu_src_ck should enable the EMU clock domain so that the ETM/ETB hardware is accessible. However, currently when enabling the emu_src_ck the EMU clock domain is not being enabled and so the ETM/ETB drivers are failing. Add enable/disable clock functions to enable the EMU clock domain when enabling the emu_src_ck. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | | * | ARM: OMAP4: PRM: Correct wrong instance usage for reading reset sourcesIvan Khoronzhuk2013-01-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To read reset sources registers we have to use PRM_DEVICE_INST Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | | * | ARM: OMAP4: PRM: fix RSTTIME and RSTST offsetsNishanth Menon2013-01-021-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RSTTIME is offset 0x8 and RSTST is offset 0x04 for OMAP4430 and OMAP4460. Signed-off-by: Nishanth Menon <nm@ti.com> [ivan.khoronzhuk@ti.com: ported from k3.4] Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | | * | ARM: OMAP4: PRM: Correct reset source mapIvan Khoronzhuk2013-01-021-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the map for reset sources register we use defines intended for using with PRM_RSTCTRL register. So fix it. Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | | * | ARM: OMAP: SRAM: resolve sparse warningsPaul Walmsley2013-01-011-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit bb77209432873214a796a70a4539e4ebdf3feb54 ("ARM: OMAP: Move omap2+ specific parts of sram.c to mach-omap2") adds some new sparse warnings: arch/arm/plat-omap/sram.c:43:6: warning: symbol 'omap_sram_push_address' was not declared. Should it be static? arch/arm/plat-omap/sram.c:65:6: warning: symbol 'omap_sram_reset' was not declared. Should it be static? arch/arm/plat-omap/sram.c:73:13: warning: symbol 'omap_map_sram' was not declared. Should it be static? This second version fixes the warnings by including <plat/sram.h>, at Tony's request. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com>
| | | * | ARM: OMAP AM33xx: hwmod data: resolve sparse warningsPaul Walmsley2013-01-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 70384a6af0914d5dcec034643941e29d3e3e69f7 ("ARM: OMAP3+: hwmod: Add AM33XX HWMOD data for davinci_mdio module") adds two new sparse warnings: arch/arm/mach-omap2/omap_hwmod_33xx_data.c:2518:30: warning: symbol 'am33xx_mdio_addr_space' was not declared. Should it be static? arch/arm/mach-omap2/omap_hwmod_33xx_data.c:2526:26: warning: symbol 'am33xx_cpgmac0__mdio' was not declared. Should it be static? Fix by marking the two new records as static. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Peter Korsgaard <jacmet@sunsite.dk> Cc: Richard Cochran <richardcochran@gmail.com> Cc: David S. Miller <davem@davemloft.net> Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
| | | * | ARM: OMAP: 32k counter: resolve sparse warningsPaul Walmsley2012-12-281-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 1fe97c8f6a1de67a5f56e029a818903d5bed8017 ("ARM: OMAP: Make OMAP clocksource source selection using kernel param") results in a new warning from sparse: arch/arm/plat-omap/counter_32k.c:86:12: warning: symbol 'omap_init_clocksource_32k' was not declared. Should it be static? This second version fixes this warning by including <plat/counter-32k.h>, at Tony's request. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Felipe Balbi <balbi@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Tony Lindgren <tony@atomide.com>
| * | | | Merge branch 'v3.8-samsung-fixes-2' of ↵Olof Johansson2013-01-086-4/+13
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes From Kukjin Kim: Most of them are EXYNOS5440 fixes which are for changing uart console, cpu id (typo) and silent complaining gpio error in kernel boot. * 'v3.8-samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: skip the clock initialization for exynos5440 ARM: EXYNOS: enable PINCTRL for EXYNOS5440 ARM: dts: use uart port1 for console on exynos4210-smdkv310 ARM: dts: use uart port0 for console on exynos5440-ssdk5440 ARM: SAMSUNG: fix the cpu id for EXYNOS5440 ARM: EXYNOS: Revise HDMI resource size
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