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* Silence spurious ENODEV poll failure warning in OCC hwmon driverdev-4.13-fsiRaptor Engineering Development Team2018-05-151-2/+4
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* Add missing license declaration call to common OCC fileTimothy Pearson2018-05-151-0/+3
| | | | | | This fixes symbol access errors and taint when built as a module Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
* Lower clock frequency of FPGA I2C bus to mitigate read / write errorsRaptor Engineering Development Team2018-05-151-0/+1
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* Update MAX31785 setings on Talos systemsRaptor Engineering Development Team2018-05-151-6/+12
| | | | | Enable faster fan ramp up/down to avoid overshoot / fan speed oscillations Disable unnecessary temperature sensor watchdog
* Remove explicit chassis reset binding on Talos systemsRaptor Engineering Development Team2018-05-151-6/+0
| | | | This allows the reset button service to bind to the GPIO
* Remove DD1 VCS workaround GPIO hogRaptor Engineering Development Team2018-05-151-6/+0
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* Move the system speaker from PWM7 to GPION7 for software-mode beep ↵Raptor Engineering Development Team2018-05-151-7/+5
| | | | development The ASpeed device doesn't really support variable PWM frequencies, at least not enough for proper beep support
* Port commit e3fac12aa8172222281420bf2eb1b25b756e82c8 to TalosRaptor Engineering Development Team2018-05-151-1/+4
| | | | ARM: dts: aspeed: talos: Add w83773g temp sensor
* Port commit 052add4e0fd8d827b85382f584e53582ce621951 to TalosRaptor Engineering Development Team2018-05-151-0/+6
| | | | ARM: dts: aspeed: talos: hog GPIOS7
* Add chassis reset request input to BMC DTS for TalosRaptor Engineering Development Team2018-05-151-0/+6
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* Add BMC ready LED output to Talos BMC device treeRaptor Engineering Development Team2018-05-151-0/+4
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* Put Talos system fans into PWM mode by defaultRaptor Engineering Development Team2018-05-151-6/+6
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* Update Talos device tree to match production hardwareRaptor Engineering Development Team2018-05-151-28/+5
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* Put fans in RPM mode at startup on Talos systemsRaptor Engineering Development Team2018-05-151-0/+6
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* Enable PWM7 for use with on-board piezo speakerRaptor Engineering Development Team2018-05-151-1/+1
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* Enable MAX31785 fan controllerRaptor Engineering Development Team2018-05-151-2/+87
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* Add Raptor Computing Systems Talos BMC setup and device tree filesRaptor Engineering Development Team2018-05-152-0/+302
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* Delay sampling of FSI data inputBenjamin Herrenschmidt2018-05-151-0/+9
| | | | | | | Seems to solve CRC errors on OCC startup at boot (strangly it's solid otherwise, not sure what's up) Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* occ retry on checksum errorsBenjamin Herrenschmidt2018-05-151-2/+6
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* Add debug stuff on CRC errorsBenjamin Herrenschmidt2018-05-151-0/+5
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* CRC recoveryBenjamin Herrenschmidt2018-05-151-9/+43
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* fsi/occ: Add retries on SBE errorsBenjamin Herrenschmidt2018-05-151-75/+104
| | | | Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* occ debugBenjamin Herrenschmidt2018-05-152-1/+6
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* more error handling cleanupBenjamin Herrenschmidt2018-05-152-22/+7
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* print msg on CRC errorBenjamin Herrenschmidt2018-05-151-1/+2
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* include cleanupBenjamin Herrenschmidt2018-05-151-6/+0
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* fsi: Define FSI specific error codesBenjamin Herrenschmidt2018-05-152-8/+18
| | | | | | | This allows the upper layers to take specific actions based on what error occurred. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* cleanup debugBenjamin Herrenschmidt2018-05-151-15/+13
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* Debug: Print slave ID and addr on FSI master errorsBenjamin Herrenschmidt2018-05-151-0/+6
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* convert occ to new sbefifoBenjamin Herrenschmidt2018-05-151-110/+92
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* New sbefifoBenjamin Herrenschmidt2018-05-152-805/+524
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* fsi/gpio: Use relative-addressing commandsJeremy Kerr2018-05-151-11/+91
| | | | | | | | | FSI CFAMs support shorter commands that use a relative (or same) address as the last. This change introduces a last_addr to the master state, and uses it for subsequent reads/writes, and performs relative addressing when a subsequent read/write is in range. Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
* fsi/gpio: Include command build in locked sectionJeremy Kerr2018-05-151-7/+18
| | | | | | | | For implementing relative addressing mode, we'll need to build a command that is coherent with CFAM state. To do that, include the build_command_* functions in the locked section of read/write/term. Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
* FSI verbose errorsBenjamin Herrenschmidt2018-05-142-3/+10
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* Palmetto FSI DT stuffBenjamin Herrenschmidt2018-05-141-7/+12
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* fsi/fsi-master-gpio: Reduce dpoll clocksBenjamin Herrenschmidt2018-05-111-2/+3
| | | | | | | | | | | | | | | | | FSI_GPIO_DPOLL_CLOCKS is the number of clocks before sending a DPOLL command after receiving a BUSY status. It should be at least tSendDelay (16 clocks). According to comments in the code, it needs to also be at least 21 clocks due to HW issues. It's currently 100 clocks which impacts performances negatively in some cases. Reduces it in half to 50 clocks which seems to still be solid. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* fsi/fsi-master-gpio: Reduce turnaround clocksBenjamin Herrenschmidt2018-05-111-1/+1
| | | | | | | | | | | | | | | | | FSI_GPIO_PRIME_SLAVE_CLOCKS is the number of clocks if the "idle" phase between the end of a response and the beginning of the next one. It corresponds to tSendDelay in the FSI specification. The default value in the slave is 16 clocks. 100 is way overkill and significantly reduces the driver performance. This changes it to 20 (which gives the HW a bit of margin still just in case). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* fsi/fsi-master-gpio: Add "no-gpio-delays" optionBenjamin Herrenschmidt2018-05-114-4/+19
| | | | | | | | | | | | | | | | | This adds support for an optional device-tree property that makes the driver skip all the delays around clocking the GPIOs and set it in the device-tree of common POWER9 based OpenPower platforms. This useful on chips like the AST2500 where the GPIO block is running at a fairly low clock frequency (25Mhz typically). In this case, the delays are unnecessary and due to the low precision of the timers, actually quite harmful in terms of performance. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* fsi/fsi-master-gpio: Sample input data on different clock phaseBenjamin Herrenschmidt2018-05-111-3/+5
| | | | | | | | | | | | | | We currently sample the input data right after we toggle the clock low, then high. The slave establishes the data on the rising edge, so this is not ideal. We should sample it on the low phase instead. This currently works because we have an extra delay, but subsequent patches will remove it. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* gpio/aspeed: Use a cache of output data registersBenjamin Herrenschmidt2018-05-111-2/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | The current driver does a read/modify/write of the output registers when changing a bit in __aspeed_gpio_set(). This is sub-optimal for a couple of reasons: - If any of the neighbouring GPIOs (sharing the shared register) isn't (yet) configured as an output, it will read the current input value, and then apply it to the output latch, which may not be what the user expects. There should be no bug in practice as aspeed_gpio_dir_out() will establish a new value but it's not great either. - The GPIO block in the aspeed chip is clocked rather slowly (typically 25Mhz). That extra MMIO read halves the maximum speed at which we can toggle the GPIO. This provides a significant performance improvement to the GPIO based FSI master. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* gpio/aspeed: Set output latch before changing directionBenjamin Herrenschmidt2018-05-111-2/+1
| | | | | | | | | | | | In aspeed_gpio_dir_out(), we need to establish the new output value in the output latch *before* we change the direction to output in order to avoid a glitch on the output line if the previous value of the latch was different. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed-g5: Clean up sio registersJoel Stanley2018-05-111-19/+18
| | | | | | | | Remove the unnecessary reg property. Drop the 'rx' in the name, as this refers to a quirk in the datasheet and is not useful. Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: configs: aspeed: Add watchdog sysfsEddie James2018-05-072-0/+2
| | | | | | | | | | | This kernel config adds sysfs entries for watchdog devices. This is needed in order to access the bootstatus sysfs file that will indicate whether or not the BMC has tripped the watchdog and subsequently switched sides. OpenBMC-Staging-Count: 1 Signed-off-by: Eddie James <eajames@linux.vnet.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* fsi: occ: Add check for OCC response checksumEddie James2018-05-071-2/+24
| | | | | | | | | | | | The OCC specification indicates that it is an error scenario if the response checksum doesn't match the sum of the bytes of the response. The driver needs to perform this calculation and check, and return an error if it's a mismatch. OpenBMC-Staging-Count: 1 Signed-off-by: Eddie James <eajames@linux.vnet.ibm.com> Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: Move random number deviceJoel Stanley2018-05-072-12/+12
| | | | | | | | | | Move the node out from under the syscon/simple-mfd. Being a child of this node causes the driver to fail to probe, as platform_get_resource returns NULL due to dev->num_resources being zero. OpenBMC-Staging-Count: 1 Signed-off-by: Joel Stanley <joel@jms.id.au>
* fsi: occ: Use PutOCCSRAM in circular mode for OCC attentionAndrew Jeffery2018-05-011-13/+9
| | | | | | | | | | | | | | | | | | | | | We can't do SCOMs from the BMC when the host is booted in secure mode, and without triggering the attention of the OCC our commands won't be processed. Further, the SCOM operation fails, which causes the OCC driver's probe to fail, which leads the BMC to think that the OCC has failed. We have an alternative to the SCOM though: We can trigger the OCC by writing the correct attention magic in circular buffer mode. The PutOCCSRAM operation returns the written data length in the response payload before the 0xCODE word, so the condition testing the success of the operation is rearranged. OpenBMC-Staging-Count: 1 Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Matt Spinler mspinler@linux.vnet.ibm.com Reviewed-by: Eddie James <eajames@linux.vnet.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: romulus: Enable the GFX IPJoel Stanley2018-05-011-0/+12
| | | | | | | | | | | The GFX controller is the internal graphics device used by the SoC (opposed to the one connected via the PCIe device and used by the host). This configures it with a framebuffer region and enables the GFX node. OpenBMC-Staging-Count: 1 Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: Add Inventec Lanyang BMCBrian Yang2018-04-262-0/+332
| | | | | | | | | The Inventec Lanyang is Power 9 platform with ast2500 BMC. Tested-by: Brian Yang <yang.brianc.w@inventec.com> Signed-off-by: Brian Yang <yang.brianc.w@inventec.com> Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: Add Portwell Neptune machineAmithash Prasad2018-04-263-1/+162
| | | | | | | | | | | | Initial introduction of Portwell Neptune family equipped with Aspeed 2500 BMC SoC. Neptune is a x86 server development kit with a ASPEED ast2500 BMC manufactured by Portwell. Specifically, This adds the neptune platform device tree file including the flash layout used by the neptune machines. Signed-off-by: Amithash Prasad <amithash@fb.com> Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* clk: aspeed: Fix reset assert logicJae Hyun Yoo2018-04-261-1/+1
| | | | | | | | | | This commit fixes a bug in aspeed_reset_assert() which determines the second reset register using condition. OpenBMC-Staging-Count: 1 Fixes: 9e3efb97c78f ("clk: aspeed: Support second reset register") Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
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