| Commit message (Collapse) | Author | Age | Files | Lines |
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This reverts commit 0387c354d342b76ad2fac1d240a4ea2a60863cb3.
The software-based PWM driver introduced other issues. Revert
pending investigation / fix.
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This patch adds a bit-banging gpio PWM driver. It makes use of hrtimers,
to allow nano-second resolution, though it obviously strongly depends on
the switching speed of the gpio pins, hrtimer and system load.
Each pwm node can have 1 or more "pwm-gpio" entries, which will be
treated as pwm's as part of a pwm chip.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
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We can't do SCOMs from the BMC when the host is booted in secure mode,
and without triggering the attention of the OCC our commands won't be
processed. Further, the SCOM operation fails, which causes the OCC
driver's probe to fail, which leads the BMC to think that the OCC has
failed.
We have an alternative to the SCOM though: We can trigger the OCC by
writing the correct attention magic in circular buffer mode.
The PutOCCSRAM operation returns the written data length in the response
payload before the 0xCODE word, so the condition testing the success of
the operation is rearranged.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
---
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Enable faster fan ramp up/down to avoid overshoot / fan speed oscillations
Disable unnecessary temperature sensor watchdog
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This allows the reset button service to bind to the GPIO
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HACK to reduce time from IPL start to SBE boot sequence kickoff
Figure out a better way to either:
1.) Prevent probe() being called during devicetree scan -or-
2.) Abort probe when OCC is not online, instead of timing out
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This fixes error -19 failures on FSI scan
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DD2.1 devices on latest hostboot with secure mode enabled return
condition flags after SCOM access. OCC access appears to function
normally even with these flags set, therefore downgrade the abort
to a warning to allow OCC to function.
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The ASpeed device doesn't really support variable PWM frequencies, at least not enough for proper beep support
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ARM: dts: aspeed: talos: Add w83773g temp sensor
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ARM: dts: aspeed: talos: hog GPIOS7
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OpenBMC-Staging-Count: 1
Signed-off-by: Joel Stanley <joel@jms.id.au>
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OpenBMC-Staging-Count: 1
Signed-off-by: Lei YU <mine260309@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Smatch reports:
drivers/hwmon/w83773g.c:105
get_fault() warn: shift has higher precedence than mask
Code analysis shows that the code is indeed wrong.
Fix it, and while we are at it, drop unnecessary typecast.
OpenBMC-Staging-Count: 1
Fixes: 86a10c802362 ("hwmon: Add W83773G driver")
Cc: Lei YU <mine260309@gmail.com>
Reviewed-by: Lei YU <mine260309@gmail.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Nuvoton W83773G is a hardware monitor IC providing one local
temperature and two remote temperature sensors.
OpenBMC-Staging-Count: 1
Signed-off-by: Lei YU <mine260309@gmail.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Add documentation for the w83773g driver.
OpenBMC-Staging-Count: 1
Signed-off-by: Lei YU <mine260309@gmail.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Add GPIO key to check presence of PCIE E2B
OpenBMC-Staging-Count: 1
Signed-off-by: Lei YU <mine260309@gmail.com>
Acked-by: Xo Wang <xow@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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The ir35221 datasheet describes specific scaling factors for a number of
commands which the current driver applies when reading.
However now that the ir35221 has been tested on machines with more
easily verifiable readings these descriptions have turned out to be
superfluous and reading each command according to the linear format is
sufficient.
OpenBMC-Staging-Count: 1
Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Power values were overflowing INT_MAX when being converted to
microwatts, even though the storage was sufficiently large (unsigned 64
bit). Change literals to unsigned long long. Also change tmep storage to u32
to avoid overflows at 65000 millidegrees.
OpenBMC-Staging-Count: 1
Signed-off-by: Edward A. James <eajames@us.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Use the new pinconf parameter for state persistence to expose the
associated capability of the Aspeed GPIO controller.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit 1b43d26985745901c87e0dca44c9b57896062306)
Signed-off-by: Joel Stanley <joel@jms.id.au>
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General support for state persistence is added to gpiolib with the
introduction of a new pinconf parameter to propagate the request to
hardware. The existing persistence support for sleep is adapted to
include hardware support if the GPIO driver provides it. Persistence
continues to be enabled by default; in-kernel consumers can opt out, but
userspace (currently) does not have a choice.
The *_SLEEP_MAY_LOSE_VALUE and *_SLEEP_MAINTAIN_VALUE symbols are
renamed, dropping the SLEEP prefix to reflect that the concept is no
longer sleep-specific. I feel that renaming to just *_MAY_LOSE_VALUE
could initially be misinterpreted, so I've further changed the symbols
to *_TRANSITORY and *_PERSISTENT to address this.
The sysfs interface is modified only to keep consistency with the
chardev interface in enforcing persistence for userspace exports.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit e10f72bf4b3e8885c1915a119141481e7fc45ca8)
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Currently, the GPIO interface is said to Open Drain if it is Single
Ended and active LOW. Similarly, it is said as Open Source if it is
Single Ended and active HIGH.
The active HIGH/LOW is used in the interface for setting the pin
state to HIGH or LOW when enabling/disabling the interface.
In Open Drain interface, pin is set to HIGH by putting pin in
high impedance and LOW by driving to the LOW.
In Open Source interface, pin is set to HIGH by driving pin to
HIGH and set to LOW by putting pin in high impedance.
With above, the Open Drain/Source is unrelated to the active LOW/HIGH
in interface. There is interface where the enable/disable of interface
is ether active LOW or HIGH but it is Open Drain type.
Hence decouple the Open Drain with Single Ended + Active LOW and
Open Source with Single Ended + Active HIGH.
Adding different flag for the Open Drain/Open Source which is valid
only when Single ended flag is enabled.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit 4c0facddb7d88c78c8bd977c16faa647f079ccda)
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Make fwnode_get_named_gpiod() consistent with the rest of
gpiod_get() like API, i.e. configure GPIO pin immediately after
request.
Besides obvious clean up it will help to configure pins based
on firmware provided resources.
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit a264d10ff45c688293d9112fddd8d29c819e0853)
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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This power supply device doesn't correctly manage it's own fault led.
Add an led class device and register it so that userspace can manage
power supply fault led as necessary.
OpenBMC-Staging-Count: 1
Signed-off-by: Eddie James <eajames@linux.vnet.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Add debugfs entries for additional power supply data, including part
number, serial number, FRU number, firmware revision, ccin, and the
input history of the power supply. The input history is 10 minutes of
input power data in the form of twenty 30-second packets. Each packet
contains average and maximum power for that 30 second period.
OpenBMC-Staging-Count: 1
Signed-off-by: Edward A. James <eajames@us.ibm.com>
[groeck: Fixed endianness problem]
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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This power supply device regularly fails to read VOUT_MODE due to the
CML bit going high. This results in an incorrect exponent used for the
voltage data, and therefore the power supply reports incorrect voltage.
Work around this by setting the pmbus flag to skip the CML check.
OpenBMC-Staging-Count: 1
Signed-off-by: Eddie James <eajames@linux.vnet.ibm.com>
Fixes: f69316d62c70 ("hwmon: (pmbus) Add IBM Common Form Factor (CFF) ...")
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Pmbus client drivers, if they want to use debugfs, should use the same
root directory as the pmbus debugfs entries are using. Therefore, export
the device dentry for the pmbus client.
OpenBMC-Staging-Count: 1
Signed-off-by: Edward A. James <eajames@us.ibm.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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The pmbus core may call read/write word data functions with a page value
of -1, intending to perform the operation without setting the page.
However, the read/write word data functions accept only unsigned 8-bit
page numbers, and therefore cannot check for negative page number to
avoid setting the page. This results in setting the page number to 0xFF.
This may result in errors or undefined behavior of some devices
(specifically the ir35221, which allows the page to be set to 0xFF,
but some subsequent operations to read registers may fail).
Switch the pmbus_set_page page parameter to an integer and perform the
check for negative page there. Make read/write functions consistent in
accepting an integer page number parameter.
OpenBMC-Staging-Count: 1
Signed-off-by: Edward A. James <eajames@us.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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GPIOS7 shall be pulled low for CPLD to continue the power up sequence.
With this hogged as pull-low, the CPLD workaround can be removed in
OpenBMC.
OpenBMC-Staging-Count: 1
Signed-off-by: Lei YU <mine260309@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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S2600WF is a Intel platform family with an Aspeed ast2500 BMC.
OpenBMC-Staging-Count: 1
Signed-off-by: James Feist <james.feist@linux.intel.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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The memory riser frus on the board are controlled
by a gpio mux.
OpenBMC-Staging-Count: 1
Signed-off-by: Patrick Venture <venture@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Adds the serial gpio driver entry for the aspeed
ast2400.
OpenBMC-Staging-Count: 1
Signed-off-by: Patrick Venture <venture@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Moved the coin battery sensor into a separate iio-hwmon
instance to facilitate reading it as a separate hwmon instance.
OpenBMC-Staging-Count: 1
Signed-off-by: Patrick Venture <venture@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Moved the coin battery sensor into a separate iio-hwmon
instance to facilitate reading it as a separate hwmon instance.
OpenBMC-Staging-Count: 1
Signed-off-by: Patrick Venture <venture@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Yong Li found that writes to the AST2500 strapping register were not
properly supported by the Aspeed pinctrl core and provided a patch to
rectify the problem. Several revisions of the patch were posted and
ultimately v4 should have been applied, however some unfortunate
liberal application of tags on my part lead to confusion between v3[1]
and v4[2].
Generate the diff between v3 and v4 to apply as a fixup patch.
[1] http://patchwork.ozlabs.org/patch/801662/
[2] http://patchwork.ozlabs.org/patch/802946/
Cc: Yong Li <sdliyong@gmail.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit 5241bd16c7576de3cf189e3e40b01bd4fa10f803)
Signed-off-by: Joel Stanley <joel@jms.id.au>
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On AST2500, the hardware strap register(SCU70) only accepts write ‘1’,
to clear it to ‘0’, must set bits(write ‘1’) to SCU7C
Signed-off-by: Yong Li <sdliyong@gmail.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Tested-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit 1865af212dfa0819ca21c7e5c18c2a75202c1827)
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Port D and port E GPIO loopback modes are commonly enabled via hardware
straps for use with front-panel buttons. When the BMC is powered
off or fails to boot, the front-panel buttons are directly connected to
the host chipset via the loopback to allow direct power-on and reset
control. Once the BMC has booted, the loopback mode must be disabled for
the BMC to take over control of host power-on and reset.
Disabling these loopback modes requires writing to the hardware strap
register which violates the current design of assuming the system
designer chose the strap settings for a specific reason and they should
be treated as read-only. Only the two bits of the strap register related
to these loopback modes are allowed to be written and comments have been
added to explain why.
Signed-off-by: Rick Altherr <raltherr@google.com>
Acked-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit c825676b0823fd43a4d08bf865f81bb188b51db1)
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Provide aliases to each i2c bus per labels added for
each PCIe slot, etc, that are downstream beyond a mux.
Signed-off-by: Patrick Venture <venture@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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