diff options
Diffstat (limited to 'include')
34 files changed, 447 insertions, 654 deletions
diff --git a/include/asm-frv/highmem.h b/include/asm-frv/highmem.h index 26cefcde5cee..68e4677fb9e7 100644 --- a/include/asm-frv/highmem.h +++ b/include/asm-frv/highmem.h @@ -18,6 +18,7 @@ #ifdef __KERNEL__ #include <linux/init.h> +#include <linux/highmem.h> #include <asm/mem-layout.h> #include <asm/spr-regs.h> #include <asm/mb-regs.h> @@ -116,6 +117,7 @@ static inline void *kmap_atomic(struct page *page, enum km_type type) unsigned long paddr; pagefault_disable(); + debug_kmap_atomic(type); paddr = page_to_phys(page); switch (type) { diff --git a/include/asm-generic/dma-mapping.h b/include/asm-generic/dma-mapping.h deleted file mode 100644 index 189486c3f92e..000000000000 --- a/include/asm-generic/dma-mapping.h +++ /dev/null @@ -1,308 +0,0 @@ -/* Copyright (C) 2002 by James.Bottomley@HansenPartnership.com - * - * Implements the generic device dma API via the existing pci_ one - * for unconverted architectures - */ - -#ifndef _ASM_GENERIC_DMA_MAPPING_H -#define _ASM_GENERIC_DMA_MAPPING_H - - -#ifdef CONFIG_PCI - -/* we implement the API below in terms of the existing PCI one, - * so include it */ -#include <linux/pci.h> -/* need struct page definitions */ -#include <linux/mm.h> - -static inline int -dma_supported(struct device *dev, u64 mask) -{ - BUG_ON(dev->bus != &pci_bus_type); - - return pci_dma_supported(to_pci_dev(dev), mask); -} - -static inline int -dma_set_mask(struct device *dev, u64 dma_mask) -{ - BUG_ON(dev->bus != &pci_bus_type); - - return pci_set_dma_mask(to_pci_dev(dev), dma_mask); -} - -static inline void * -dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, - gfp_t flag) -{ - BUG_ON(dev->bus != &pci_bus_type); - - return pci_alloc_consistent(to_pci_dev(dev), size, dma_handle); -} - -static inline void -dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, - dma_addr_t dma_handle) -{ - BUG_ON(dev->bus != &pci_bus_type); - - pci_free_consistent(to_pci_dev(dev), size, cpu_addr, dma_handle); -} - -static inline dma_addr_t -dma_map_single(struct device *dev, void *cpu_addr, size_t size, - enum dma_data_direction direction) -{ - BUG_ON(dev->bus != &pci_bus_type); - - return pci_map_single(to_pci_dev(dev), cpu_addr, size, (int)direction); -} - -static inline void -dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, - enum dma_data_direction direction) -{ - BUG_ON(dev->bus != &pci_bus_type); - - pci_unmap_single(to_pci_dev(dev), dma_addr, size, (int)direction); -} - -static inline dma_addr_t -dma_map_page(struct device *dev, struct page *page, - unsigned long offset, size_t size, - enum dma_data_direction direction) -{ - BUG_ON(dev->bus != &pci_bus_type); - - return pci_map_page(to_pci_dev(dev), page, offset, size, (int)direction); -} - -static inline void -dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, - enum dma_data_direction direction) -{ - BUG_ON(dev->bus != &pci_bus_type); - - pci_unmap_page(to_pci_dev(dev), dma_address, size, (int)direction); -} - -static inline int -dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, - enum dma_data_direction direction) -{ - BUG_ON(dev->bus != &pci_bus_type); - - return pci_map_sg(to_pci_dev(dev), sg, nents, (int)direction); -} - -static inline void -dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, - enum dma_data_direction direction) -{ - BUG_ON(dev->bus != &pci_bus_type); - - pci_unmap_sg(to_pci_dev(dev), sg, nhwentries, (int)direction); -} - -static inline void -dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size, - enum dma_data_direction direction) -{ - BUG_ON(dev->bus != &pci_bus_type); - - pci_dma_sync_single_for_cpu(to_pci_dev(dev), dma_handle, - size, (int)direction); -} - -static inline void -dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size, - enum dma_data_direction direction) -{ - BUG_ON(dev->bus != &pci_bus_type); - - pci_dma_sync_single_for_device(to_pci_dev(dev), dma_handle, - size, (int)direction); -} - -static inline void -dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, - enum dma_data_direction direction) -{ - BUG_ON(dev->bus != &pci_bus_type); - - pci_dma_sync_sg_for_cpu(to_pci_dev(dev), sg, nelems, (int)direction); -} - -static inline void -dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems, - enum dma_data_direction direction) -{ - BUG_ON(dev->bus != &pci_bus_type); - - pci_dma_sync_sg_for_device(to_pci_dev(dev), sg, nelems, (int)direction); -} - -static inline int -dma_mapping_error(struct device *dev, dma_addr_t dma_addr) -{ - return pci_dma_mapping_error(to_pci_dev(dev), dma_addr); -} - - -#else - -static inline int -dma_supported(struct device *dev, u64 mask) -{ - return 0; -} - -static inline int -dma_set_mask(struct device *dev, u64 dma_mask) -{ - BUG(); - return 0; -} - -static inline void * -dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, - gfp_t flag) -{ - BUG(); - return NULL; -} - -static inline void -dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, - dma_addr_t dma_handle) -{ - BUG(); -} - -static inline dma_addr_t -dma_map_single(struct device *dev, void *cpu_addr, size_t size, - enum dma_data_direction direction) -{ - BUG(); - return 0; -} - -static inline void -dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, - enum dma_data_direction direction) -{ - BUG(); -} - -static inline dma_addr_t -dma_map_page(struct device *dev, struct page *page, - unsigned long offset, size_t size, - enum dma_data_direction direction) -{ - BUG(); - return 0; -} - -static inline void -dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, - enum dma_data_direction direction) -{ - BUG(); -} - -static inline int -dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, - enum dma_data_direction direction) -{ - BUG(); - return 0; -} - -static inline void -dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, - enum dma_data_direction direction) -{ - BUG(); -} - -static inline void -dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size, - enum dma_data_direction direction) -{ - BUG(); -} - -static inline void -dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size, - enum dma_data_direction direction) -{ - BUG(); -} - -static inline void -dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, - enum dma_data_direction direction) -{ - BUG(); -} - -static inline void -dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems, - enum dma_data_direction direction) -{ - BUG(); -} - -static inline int -dma_error(dma_addr_t dma_addr) -{ - return 0; -} - -#endif - -/* Now for the API extensions over the pci_ one */ - -#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) -#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) -#define dma_is_consistent(d, h) (1) - -static inline int -dma_get_cache_alignment(void) -{ - /* no easy way to get cache size on all processors, so return - * the maximum possible, to be safe */ - return (1 << INTERNODE_CACHE_SHIFT); -} - -static inline void -dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle, - unsigned long offset, size_t size, - enum dma_data_direction direction) -{ - /* just sync everything, that's all the pci API can do */ - dma_sync_single_for_cpu(dev, dma_handle, offset+size, direction); -} - -static inline void -dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle, - unsigned long offset, size_t size, - enum dma_data_direction direction) -{ - /* just sync everything, that's all the pci API can do */ - dma_sync_single_for_device(dev, dma_handle, offset+size, direction); -} - -static inline void -dma_cache_sync(struct device *dev, void *vaddr, size_t size, - enum dma_data_direction direction) -{ - /* could define this in terms of the dma_cache ... operations, - * but if you get this on a platform, you should convert the platform - * to using the generic device DMA API */ - BUG(); -} - -#endif - diff --git a/include/asm-mn10300/highmem.h b/include/asm-mn10300/highmem.h index 5256854c0453..90f2abb04bfd 100644 --- a/include/asm-mn10300/highmem.h +++ b/include/asm-mn10300/highmem.h @@ -16,6 +16,7 @@ #include <linux/init.h> #include <linux/interrupt.h> +#include <linux/highmem.h> #include <asm/kmap_types.h> #include <asm/pgtable.h> @@ -77,6 +78,7 @@ static inline unsigned long kmap_atomic(struct page *page, enum km_type type) if (page < highmem_start_page) return page_address(page); + debug_kmap_atomic(type); idx = type + KM_TYPE_NR * smp_processor_id(); vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); #if HIGHMEM_DEBUG diff --git a/include/linux/auto_dev-ioctl.h b/include/linux/auto_dev-ioctl.h index 91a773993a5c..850f39b33e74 100644 --- a/include/linux/auto_dev-ioctl.h +++ b/include/linux/auto_dev-ioctl.h @@ -10,8 +10,13 @@ #ifndef _LINUX_AUTO_DEV_IOCTL_H #define _LINUX_AUTO_DEV_IOCTL_H +#include <linux/auto_fs.h> + +#ifdef __KERNEL__ #include <linux/string.h> -#include <linux/types.h> +#else +#include <string.h> +#endif /* __KERNEL__ */ #define AUTOFS_DEVICE_NAME "autofs" diff --git a/include/linux/auto_fs.h b/include/linux/auto_fs.h index c21e5972a3e8..63265852b7d1 100644 --- a/include/linux/auto_fs.h +++ b/include/linux/auto_fs.h @@ -17,11 +17,13 @@ #ifdef __KERNEL__ #include <linux/fs.h> #include <linux/limits.h> +#include <linux/types.h> +#include <linux/ioctl.h> +#else #include <asm/types.h> +#include <sys/ioctl.h> #endif /* __KERNEL__ */ -#include <linux/ioctl.h> - /* This file describes autofs v3 */ #define AUTOFS_PROTO_VERSION 3 diff --git a/include/linux/bootmem.h b/include/linux/bootmem.h index 455d83219fae..bc3ab7073695 100644 --- a/include/linux/bootmem.h +++ b/include/linux/bootmem.h @@ -146,10 +146,10 @@ extern void *alloc_large_system_hash(const char *tablename, #define HASH_EARLY 0x00000001 /* Allocating during early boot? */ -/* Only NUMA needs hash distribution. - * IA64 and x86_64 have sufficient vmalloc space. +/* Only NUMA needs hash distribution. 64bit NUMA architectures have + * sufficient vmalloc space. */ -#if defined(CONFIG_NUMA) && (defined(CONFIG_IA64) || defined(CONFIG_X86_64)) +#if defined(CONFIG_NUMA) && defined(CONFIG_64BIT) #define HASHDIST_DEFAULT 1 #else #define HASHDIST_DEFAULT 0 diff --git a/include/linux/buffer_head.h b/include/linux/buffer_head.h index f19fd9045ea0..3d7bcde2e332 100644 --- a/include/linux/buffer_head.h +++ b/include/linux/buffer_head.h @@ -216,7 +216,7 @@ int cont_write_begin(struct file *, struct address_space *, loff_t, get_block_t *, loff_t *); int generic_cont_expand_simple(struct inode *inode, loff_t size); int block_commit_write(struct page *page, unsigned from, unsigned to); -int block_page_mkwrite(struct vm_area_struct *vma, struct page *page, +int block_page_mkwrite(struct vm_area_struct *vma, struct vm_fault *vmf, get_block_t get_block); void block_sync_page(struct page *); sector_t generic_block_bmap(struct address_space *, sector_t, get_block_t *); diff --git a/include/linux/eventfd.h b/include/linux/eventfd.h index a667637b54e3..f45a8ae5f828 100644 --- a/include/linux/eventfd.h +++ b/include/linux/eventfd.h @@ -13,10 +13,20 @@ /* For O_CLOEXEC and O_NONBLOCK */ #include <linux/fcntl.h> -/* Flags for eventfd2. */ +/* + * CAREFUL: Check include/asm-generic/fcntl.h when defining + * new flags, since they might collide with O_* ones. We want + * to re-use O_* flags that couldn't possibly have a meaning + * from eventfd, in order to leave a free define-space for + * shared O_* flags. + */ +#define EFD_SEMAPHORE (1 << 0) #define EFD_CLOEXEC O_CLOEXEC #define EFD_NONBLOCK O_NONBLOCK +#define EFD_SHARED_FCNTL_FLAGS (O_CLOEXEC | O_NONBLOCK) +#define EFD_FLAGS_SET (EFD_SHARED_FCNTL_FLAGS | EFD_SEMAPHORE) + struct file *eventfd_fget(int fd); int eventfd_signal(struct file *file, int n); diff --git a/include/linux/fb.h b/include/linux/fb.h index 31527e17076b..f563c5013932 100644 --- a/include/linux/fb.h +++ b/include/linux/fb.h @@ -123,6 +123,7 @@ struct dentry; #define FB_ACCEL_TRIDENT_3DIMAGE 51 /* Trident 3DImage */ #define FB_ACCEL_TRIDENT_BLADE3D 52 /* Trident Blade3D */ #define FB_ACCEL_TRIDENT_BLADEXP 53 /* Trident BladeXP */ +#define FB_ACCEL_CIRRUS_ALPINE 53 /* Cirrus Logic 543x/544x/5480 */ #define FB_ACCEL_NEOMAGIC_NM2070 90 /* NeoMagic NM2070 */ #define FB_ACCEL_NEOMAGIC_NM2090 91 /* NeoMagic NM2090 */ #define FB_ACCEL_NEOMAGIC_NM2093 92 /* NeoMagic NM2093 */ @@ -960,15 +961,7 @@ extern struct fb_info *registered_fb[FB_MAX]; extern int num_registered_fb; extern struct class *fb_class; -static inline int lock_fb_info(struct fb_info *info) -{ - mutex_lock(&info->lock); - if (!info->fbops) { - mutex_unlock(&info->lock); - return 0; - } - return 1; -} +extern int lock_fb_info(struct fb_info *info); static inline void unlock_fb_info(struct fb_info *info) { diff --git a/include/linux/fs.h b/include/linux/fs.h index 87e7bfc5ebd7..61211ad823fe 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -1878,6 +1878,7 @@ extern struct block_device *open_by_devnum(dev_t, fmode_t); extern void invalidate_bdev(struct block_device *); extern int sync_blockdev(struct block_device *bdev); extern struct super_block *freeze_bdev(struct block_device *); +extern void emergency_thaw_all(void); extern int thaw_bdev(struct block_device *bdev, struct super_block *sb); extern int fsync_bdev(struct block_device *); extern int fsync_super(struct super_block *); diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h index d9051d717d27..7ef1caf50269 100644 --- a/include/linux/fsl_devices.h +++ b/include/linux/fsl_devices.h @@ -95,14 +95,15 @@ struct fsl_usb2_platform_data { #define FSL_USB2_PORT0_ENABLED 0x00000001 #define FSL_USB2_PORT1_ENABLED 0x00000002 +struct spi_device; + struct fsl_spi_platform_data { u32 initial_spmode; /* initial SPMODE value */ - u16 bus_num; + s16 bus_num; bool qe_mode; /* board specific information */ u16 max_chipselect; - void (*activate_cs)(u8 cs, u8 polarity); - void (*deactivate_cs)(u8 cs, u8 polarity); + void (*cs_control)(struct spi_device *spi, bool on); u32 sysclk; }; diff --git a/include/linux/highmem.h b/include/linux/highmem.h index 13875ce9112a..7ff5c55f9b55 100644 --- a/include/linux/highmem.h +++ b/include/linux/highmem.h @@ -187,4 +187,16 @@ static inline void copy_highpage(struct page *to, struct page *from) kunmap_atomic(vto, KM_USER1); } +#if defined(CONFIG_DEBUG_HIGHMEM) && defined(CONFIG_TRACE_IRQFLAGS_SUPPORT) + +void debug_kmap_atomic(enum km_type type); + +#else + +static inline void debug_kmap_atomic(enum km_type type) +{ +} + +#endif + #endif /* _LINUX_HIGHMEM_H */ diff --git a/include/linux/kernel.h b/include/linux/kernel.h index f81d80f47dcb..e720b0da7751 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -353,6 +353,8 @@ static inline char *pack_hex_byte(char *buf, u8 byte) printk(KERN_NOTICE pr_fmt(fmt), ##__VA_ARGS__) #define pr_info(fmt, ...) \ printk(KERN_INFO pr_fmt(fmt), ##__VA_ARGS__) +#define pr_cont(fmt, ...) \ + printk(KERN_CONT fmt, ##__VA_ARGS__) /* If you are writing a driver, please use dev_dbg instead */ #if defined(DEBUG) diff --git a/include/linux/loop.h b/include/linux/loop.h index 6ffd6db5bb0d..40725447f5e0 100644 --- a/include/linux/loop.h +++ b/include/linux/loop.h @@ -160,5 +160,6 @@ int loop_unregister_transfer(int number); #define LOOP_SET_STATUS64 0x4C04 #define LOOP_GET_STATUS64 0x4C05 #define LOOP_CHANGE_FD 0x4C06 +#define LOOP_SET_CAPACITY 0x4C07 #endif diff --git a/include/linux/mm.h b/include/linux/mm.h index b1ea37fc7a24..aeabe953ba4f 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -135,6 +135,7 @@ extern pgprot_t protection_map[16]; #define FAULT_FLAG_WRITE 0x01 /* Fault was a write access */ #define FAULT_FLAG_NONLINEAR 0x02 /* Fault was via a nonlinear mapping */ +#define FAULT_FLAG_MKWRITE 0x04 /* Fault was mkwrite of existing pte */ /* * This interface is used by x86 PAT code to identify a pfn mapping that is @@ -187,7 +188,7 @@ struct vm_operations_struct { /* notification that a previously read-only page is about to become * writable, if an error is returned it will cause a SIGBUS */ - int (*page_mkwrite)(struct vm_area_struct *vma, struct page *page); + int (*page_mkwrite)(struct vm_area_struct *vma, struct vm_fault *vmf); /* called by access_process_vm when get_user_pages() fails, typically * for use by special VMAs that can switch between memory and hardware @@ -834,6 +835,7 @@ int __set_page_dirty_nobuffers(struct page *page); int __set_page_dirty_no_writeback(struct page *page); int redirty_page_for_writepage(struct writeback_control *wbc, struct page *page); +void account_page_dirtied(struct page *page, struct address_space *mapping); int set_page_dirty(struct page *page); int set_page_dirty_lock(struct page *page); int clear_page_dirty_for_io(struct page *page); diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h index d84feb7bdbf0..ddadb4defe00 100644 --- a/include/linux/mm_types.h +++ b/include/linux/mm_types.h @@ -11,6 +11,7 @@ #include <linux/rwsem.h> #include <linux/completion.h> #include <linux/cpumask.h> +#include <linux/page-debug-flags.h> #include <asm/page.h> #include <asm/mmu.h> @@ -174,6 +175,9 @@ struct vm_area_struct { #ifdef CONFIG_NUMA struct mempolicy *vm_policy; /* NUMA policy for the VMA */ #endif +#ifdef CONFIG_WANT_PAGE_DEBUG_FLAGS + unsigned long debug_flags; /* Use atomic bitops on this */ +#endif }; struct core_thread { diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h index 1aca6cebbb78..26ef24076b76 100644 --- a/include/linux/mmzone.h +++ b/include/linux/mmzone.h @@ -806,6 +806,14 @@ extern struct zone *next_zone(struct zone *zone); zone; \ zone = next_zone(zone)) +#define for_each_populated_zone(zone) \ + for (zone = (first_online_pgdat())->node_zones; \ + zone; \ + zone = next_zone(zone)) \ + if (!populated_zone(zone)) \ + ; /* do nothing */ \ + else + static inline struct zone *zonelist_zone(struct zoneref *zoneref) { return zoneref->zone; diff --git a/include/linux/page-debug-flags.h b/include/linux/page-debug-flags.h new file mode 100644 index 000000000000..b0638fd91e92 --- /dev/null +++ b/include/linux/page-debug-flags.h @@ -0,0 +1,30 @@ +#ifndef LINUX_PAGE_DEBUG_FLAGS_H +#define LINUX_PAGE_DEBUG_FLAGS_H + +/* + * page->debug_flags bits: + * + * PAGE_DEBUG_FLAG_POISON is set for poisoned pages. This is used to + * implement generic debug pagealloc feature. The pages are filled with + * poison patterns and set this flag after free_pages(). The poisoned + * pages are verified whether the patterns are not corrupted and clear + * the flag before alloc_pages(). + */ + +enum page_debug_flags { + PAGE_DEBUG_FLAG_POISON, /* Page is poisoned */ +}; + +/* + * Ensure that CONFIG_WANT_PAGE_DEBUG_FLAGS reliably + * gets turned off when no debug features are enabling it! + */ + +#ifdef CONFIG_WANT_PAGE_DEBUG_FLAGS +#if !defined(CONFIG_PAGE_POISONING) \ +/* && !defined(CONFIG_PAGE_DEBUG_SOMETHING_ELSE) && ... */ +#error WANT_PAGE_DEBUG_FLAGS is turned on with no debug features! +#endif +#endif /* CONFIG_WANT_PAGE_DEBUG_FLAGS */ + +#endif /* LINUX_PAGE_DEBUG_FLAGS_H */ diff --git a/include/linux/page-flags.h b/include/linux/page-flags.h index 219a523ecdb0..61df1779b2a5 100644 --- a/include/linux/page-flags.h +++ b/include/linux/page-flags.h @@ -96,6 +96,8 @@ enum pageflags { PG_swapbacked, /* Page is backed by RAM/swap */ #ifdef CONFIG_UNEVICTABLE_LRU PG_unevictable, /* Page is "unevictable" */ +#endif +#ifdef CONFIG_HAVE_MLOCKED_PAGE_BIT PG_mlocked, /* Page is vma mlocked */ #endif #ifdef CONFIG_IA64_UNCACHED_ALLOCATOR @@ -234,20 +236,20 @@ PAGEFLAG_FALSE(SwapCache) #ifdef CONFIG_UNEVICTABLE_LRU PAGEFLAG(Unevictable, unevictable) __CLEARPAGEFLAG(Unevictable, unevictable) TESTCLEARFLAG(Unevictable, unevictable) +#else +PAGEFLAG_FALSE(Unevictable) TESTCLEARFLAG_FALSE(Unevictable) + SETPAGEFLAG_NOOP(Unevictable) CLEARPAGEFLAG_NOOP(Unevictable) + __CLEARPAGEFLAG_NOOP(Unevictable) +#endif +#ifdef CONFIG_HAVE_MLOCKED_PAGE_BIT #define MLOCK_PAGES 1 PAGEFLAG(Mlocked, mlocked) __CLEARPAGEFLAG(Mlocked, mlocked) TESTSCFLAG(Mlocked, mlocked) - #else - #define MLOCK_PAGES 0 PAGEFLAG_FALSE(Mlocked) SETPAGEFLAG_NOOP(Mlocked) TESTCLEARFLAG_FALSE(Mlocked) - -PAGEFLAG_FALSE(Unevictable) TESTCLEARFLAG_FALSE(Unevictable) - SETPAGEFLAG_NOOP(Unevictable) CLEARPAGEFLAG_NOOP(Unevictable) - __CLEARPAGEFLAG_NOOP(Unevictable) #endif #ifdef CONFIG_IA64_UNCACHED_ALLOCATOR @@ -367,9 +369,13 @@ static inline void __ClearPageTail(struct page *page) #ifdef CONFIG_UNEVICTABLE_LRU #define __PG_UNEVICTABLE (1 << PG_unevictable) -#define __PG_MLOCKED (1 << PG_mlocked) #else #define __PG_UNEVICTABLE 0 +#endif + +#ifdef CONFIG_HAVE_MLOCKED_PAGE_BIT +#define __PG_MLOCKED (1 << PG_mlocked) +#else #define __PG_MLOCKED 0 #endif diff --git a/include/linux/pagevec.h b/include/linux/pagevec.h index 7b2886fa7fdc..bab82f4c571c 100644 --- a/include/linux/pagevec.h +++ b/include/linux/pagevec.h @@ -24,7 +24,6 @@ void __pagevec_release(struct pagevec *pvec); void __pagevec_free(struct pagevec *pvec); void ____pagevec_lru_add(struct pagevec *pvec, enum lru_list lru); void pagevec_strip(struct pagevec *pvec); -void pagevec_swap_free(struct pagevec *pvec); unsigned pagevec_lookup(struct pagevec *pvec, struct address_space *mapping, pgoff_t start, unsigned nr_pages); unsigned pagevec_lookup_tag(struct pagevec *pvec, diff --git a/include/linux/poison.h b/include/linux/poison.h index 9f31683728fd..6729f7dcd60e 100644 --- a/include/linux/poison.h +++ b/include/linux/poison.h @@ -17,6 +17,9 @@ */ #define TIMER_ENTRY_STATIC ((void *) 0x74737461) +/********** mm/debug-pagealloc.c **********/ +#define PAGE_POISON 0xaa + /********** mm/slab.c **********/ /* * Magic nums for obj red zoning. diff --git a/include/linux/rtc.h b/include/linux/rtc.h index 4046b75563c1..60f88a7fb13d 100644 --- a/include/linux/rtc.h +++ b/include/linux/rtc.h @@ -99,6 +99,7 @@ struct rtc_pll_info { #ifdef __KERNEL__ +#include <linux/types.h> #include <linux/interrupt.h> extern int rtc_month_days(unsigned int month, unsigned int year); @@ -232,6 +233,11 @@ int rtc_register(rtc_task_t *task); int rtc_unregister(rtc_task_t *task); int rtc_control(rtc_task_t *t, unsigned int cmd, unsigned long arg); +static inline bool is_leap_year(unsigned int year) +{ + return (!(year % 4) && (year % 100)) || !(year % 400); +} + #endif /* __KERNEL__ */ #endif /* _LINUX_RTC_H_ */ diff --git a/include/linux/sched.h b/include/linux/sched.h index 29df6374d2de..481fad3a9b42 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -391,8 +391,15 @@ extern void arch_unmap_area_topdown(struct mm_struct *, unsigned long); (mm)->hiwater_vm = (mm)->total_vm; \ } while (0) -#define get_mm_hiwater_rss(mm) max((mm)->hiwater_rss, get_mm_rss(mm)) -#define get_mm_hiwater_vm(mm) max((mm)->hiwater_vm, (mm)->total_vm) +static inline unsigned long get_mm_hiwater_rss(struct mm_struct *mm) +{ + return max(mm->hiwater_rss, get_mm_rss(mm)); +} + +static inline unsigned long get_mm_hiwater_vm(struct mm_struct *mm) +{ + return max(mm->hiwater_vm, mm->total_vm); +} extern void set_dumpable(struct mm_struct *mm, int value); extern int get_dumpable(struct mm_struct *mm); diff --git a/include/linux/string.h b/include/linux/string.h index d18fc198aa2f..8852739f36df 100644 --- a/include/linux/string.h +++ b/include/linux/string.h @@ -12,6 +12,7 @@ #include <linux/stddef.h> /* for NULL */ extern char *strndup_user(const char __user *, long); +extern void *memdup_user(const void __user *, size_t); /* * Include machine specific inline routines diff --git a/include/linux/suspend.h b/include/linux/suspend.h index c7d9bb1832ba..3e3a4364cbff 100644 --- a/include/linux/suspend.h +++ b/include/linux/suspend.h @@ -1,9 +1,6 @@ #ifndef _LINUX_SUSPEND_H #define _LINUX_SUSPEND_H -#if defined(CONFIG_X86) || defined(CONFIG_FRV) || defined(CONFIG_PPC32) || defined(CONFIG_PPC64) -#include <asm/suspend.h> -#endif #include <linux/swap.h> #include <linux/notifier.h> #include <linux/init.h> diff --git a/include/linux/swap.h b/include/linux/swap.h index d30215578877..62d81435347a 100644 --- a/include/linux/swap.h +++ b/include/linux/swap.h @@ -212,7 +212,7 @@ static inline void lru_cache_add_active_file(struct page *page) /* linux/mm/vmscan.c */ extern unsigned long try_to_free_pages(struct zonelist *zonelist, int order, - gfp_t gfp_mask); + gfp_t gfp_mask, nodemask_t *mask); extern unsigned long try_to_free_mem_cgroup_pages(struct mem_cgroup *mem, gfp_t gfp_mask, bool noswap, unsigned int swappiness); @@ -382,6 +382,11 @@ static inline struct page *swapin_readahead(swp_entry_t swp, gfp_t gfp_mask, return NULL; } +static inline int swap_writepage(struct page *p, struct writeback_control *wbc) +{ + return 0; +} + static inline struct page *lookup_swap_cache(swp_entry_t swp) { return NULL; diff --git a/include/linux/tty_driver.h b/include/linux/tty_driver.h index 08e088334dba..8615d661ab60 100644 --- a/include/linux/tty_driver.h +++ b/include/linux/tty_driver.h @@ -252,8 +252,6 @@ struct tty_operations { void (*set_ldisc)(struct tty_struct *tty); void (*wait_until_sent)(struct tty_struct *tty, int timeout); void (*send_xchar)(struct tty_struct *tty, char ch); - int (*read_proc)(char *page, char **start, off_t off, - int count, int *eof, void *data); int (*tiocmget)(struct tty_struct *tty, struct file *file); int (*tiocmset)(struct tty_struct *tty, struct file *file, unsigned int set, unsigned int clear); @@ -264,6 +262,7 @@ struct tty_operations { int (*poll_get_char)(struct tty_driver *driver, int line); void (*poll_put_char)(struct tty_driver *driver, int line, char ch); #endif + const struct file_operations *proc_fops; }; struct tty_driver { diff --git a/include/linux/wait.h b/include/linux/wait.h index a210ede73b56..5d631c17eaee 100644 --- a/include/linux/wait.h +++ b/include/linux/wait.h @@ -135,8 +135,11 @@ static inline void __remove_wait_queue(wait_queue_head_t *head, void __wake_up_common(wait_queue_head_t *q, unsigned int mode, int nr_exclusive, int sync, void *key); void __wake_up(wait_queue_head_t *q, unsigned int mode, int nr, void *key); -extern void __wake_up_locked(wait_queue_head_t *q, unsigned int mode); -extern void __wake_up_sync(wait_queue_head_t *q, unsigned int mode, int nr); +void __wake_up_locked_key(wait_queue_head_t *q, unsigned int mode, void *key); +void __wake_up_sync_key(wait_queue_head_t *q, unsigned int mode, int nr, + void *key); +void __wake_up_locked(wait_queue_head_t *q, unsigned int mode); +void __wake_up_sync(wait_queue_head_t *q, unsigned int mode, int nr); void __wake_up_bit(wait_queue_head_t *, void *, int); int __wait_on_bit(wait_queue_head_t *, struct wait_bit_queue *, int (*)(void *), unsigned); int __wait_on_bit_lock(wait_queue_head_t *, struct wait_bit_queue *, int (*)(void *), unsigned); @@ -155,21 +158,17 @@ wait_queue_head_t *bit_waitqueue(void *, int); #define wake_up_interruptible_all(x) __wake_up(x, TASK_INTERRUPTIBLE, 0, NULL) #define wake_up_interruptible_sync(x) __wake_up_sync((x), TASK_INTERRUPTIBLE, 1) -#ifdef CONFIG_DEBUG_LOCK_ALLOC /* - * macro to avoid include hell + * Wakeup macros to be used to report events to the targets. */ -#define wake_up_nested(x, s) \ -do { \ - unsigned long flags; \ - \ - spin_lock_irqsave_nested(&(x)->lock, flags, (s)); \ - wake_up_locked(x); \ - spin_unlock_irqrestore(&(x)->lock, flags); \ -} while (0) -#else -#define wake_up_nested(x, s) wake_up(x) -#endif +#define wake_up_poll(x, m) \ + __wake_up(x, TASK_NORMAL, 1, (void *) (m)) +#define wake_up_locked_poll(x, m) \ + __wake_up_locked_key((x), TASK_NORMAL, (void *) (m)) +#define wake_up_interruptible_poll(x, m) \ + __wake_up(x, TASK_INTERRUPTIBLE, 1, (void *) (m)) +#define wake_up_interruptible_sync_poll(x, m) \ + __wake_up_sync_key((x), TASK_INTERRUPTIBLE, 1, (void *) (m)) #define __wait_event(wq, condition) \ do { \ diff --git a/include/linux/writeback.h b/include/linux/writeback.h index 7300ecdc480c..93445477f86a 100644 --- a/include/linux/writeback.h +++ b/include/linux/writeback.h @@ -109,8 +109,8 @@ extern int dirty_background_ratio; extern unsigned long dirty_background_bytes; extern int vm_dirty_ratio; extern unsigned long vm_dirty_bytes; -extern int dirty_writeback_interval; -extern int dirty_expire_interval; +extern unsigned int dirty_writeback_interval; +extern unsigned int dirty_expire_interval; extern int vm_highmem_is_dirtyable; extern int block_dump; extern int laptop_mode; diff --git a/include/video/aty128.h b/include/video/aty128.h index 51ac69f05bdc..f0851e3bb7cc 100644 --- a/include/video/aty128.h +++ b/include/video/aty128.h @@ -415,7 +415,7 @@ #define PWR_MGT_SLOWDOWN_MCLK 0x00002000 #define PMI_PMSCR_REG 0x60 - + /* used by ATI bug fix for hardware ROM */ #define RAGE128_MPP_TB_CONFIG 0x01c0 diff --git a/include/video/cirrus.h b/include/video/cirrus.h index b2776b6c8679..9a5e9ee30782 100644 --- a/include/video/cirrus.h +++ b/include/video/cirrus.h @@ -32,7 +32,6 @@ #define CL_VSSM2 0x3c3 /* Motherboard Sleep */ /*** VGA Sequencer Registers ***/ -#define CL_SEQR0 0x0 /* Reset */ /* the following are from the "extension registers" group */ #define CL_SEQR6 0x6 /* Unlock ALL Extensions */ #define CL_SEQR7 0x7 /* Extended Sequencer Mode */ @@ -71,6 +70,7 @@ #define CL_CRT1B 0x1b /* Extended Display Controls */ #define CL_CRT1C 0x1c /* Sync adjust and genlock register */ #define CL_CRT1D 0x1d /* Overlay Extended Control register */ +#define CL_CRT1E 0x1e /* Another overflow register */ #define CL_CRT25 0x25 /* Part Status Register */ #define CL_CRT27 0x27 /* ID Register */ #define CL_CRT51 0x51 /* P4 disable "flicker fixer" */ diff --git a/include/video/newport.h b/include/video/newport.h index 1f5ebeaa818f..001b935e71c4 100644 --- a/include/video/newport.h +++ b/include/video/newport.h @@ -453,7 +453,7 @@ static __inline__ int newport_wait(struct newport_regs *regs) { int t = BUSY_TIMEOUT; - while (t--) + while (--t) if (!(regs->cset.status & NPORT_STAT_GBUSY)) break; return !t; @@ -463,7 +463,7 @@ static __inline__ int newport_bfwait(struct newport_regs *regs) { int t = BUSY_TIMEOUT; - while (t--) + while (--t) if(!(regs->cset.status & NPORT_STAT_BBUSY)) break; return !t; diff --git a/include/video/radeon.h b/include/video/radeon.h index e072b16b39ab..56b188abfb54 100644 --- a/include/video/radeon.h +++ b/include/video/radeon.h @@ -5,12 +5,12 @@ #define RADEON_REGSIZE 0x4000 -#define MM_INDEX 0x0000 -#define MM_DATA 0x0004 -#define BUS_CNTL 0x0030 -#define HI_STAT 0x004C +#define MM_INDEX 0x0000 +#define MM_DATA 0x0004 +#define BUS_CNTL 0x0030 +#define HI_STAT 0x004C #define BUS_CNTL1 0x0034 -#define I2C_CNTL_1 0x0094 +#define I2C_CNTL_1 0x0094 #define CNFG_CNTL 0x00E0 #define CNFG_MEMSIZE 0x00F8 #define CNFG_APER_0_BASE 0x0100 @@ -18,8 +18,8 @@ #define CNFG_APER_SIZE 0x0108 #define CNFG_REG_1_BASE 0x010C #define CNFG_REG_APER_SIZE 0x0110 -#define PAD_AGPINPUT_DELAY 0x0164 -#define PAD_CTLR_STRENGTH 0x0168 +#define PAD_AGPINPUT_DELAY 0x0164 +#define PAD_CTLR_STRENGTH 0x0168 #define PAD_CTLR_UPDATE 0x016C #define PAD_CTLR_MISC 0x0aa0 #define AGP_CNTL 0x0174 @@ -27,171 +27,171 @@ #define CAP0_TRIG_CNTL 0x0950 #define CAP1_TRIG_CNTL 0x09c0 #define VIPH_CONTROL 0x0C40 -#define VENDOR_ID 0x0F00 -#define DEVICE_ID 0x0F02 -#define COMMAND 0x0F04 -#define STATUS 0x0F06 -#define REVISION_ID 0x0F08 -#define REGPROG_INF 0x0F09 -#define SUB_CLASS 0x0F0A -#define BASE_CODE 0x0F0B -#define CACHE_LINE 0x0F0C -#define LATENCY 0x0F0D -#define HEADER 0x0F0E -#define BIST 0x0F0F -#define REG_MEM_BASE 0x0F10 -#define REG_IO_BASE 0x0F14 +#define VENDOR_ID 0x0F00 +#define DEVICE_ID 0x0F02 +#define COMMAND 0x0F04 +#define STATUS 0x0F06 +#define REVISION_ID 0x0F08 +#define REGPROG_INF 0x0F09 +#define SUB_CLASS 0x0F0A +#define BASE_CODE 0x0F0B +#define CACHE_LINE 0x0F0C +#define LATENCY 0x0F0D +#define HEADER 0x0F0E +#define BIST 0x0F0F +#define REG_MEM_BASE 0x0F10 +#define REG_IO_BASE 0x0F14 #define REG_REG_BASE 0x0F18 #define ADAPTER_ID 0x0F2C #define BIOS_ROM 0x0F30 -#define CAPABILITIES_PTR 0x0F34 -#define INTERRUPT_LINE 0x0F3C -#define INTERRUPT_PIN 0x0F3D -#define MIN_GRANT 0x0F3E -#define MAX_LATENCY 0x0F3F -#define ADAPTER_ID_W 0x0F4C -#define PMI_CAP_ID 0x0F50 -#define PMI_NXT_CAP_PTR 0x0F51 -#define PMI_PMC_REG 0x0F52 -#define PM_STATUS 0x0F54 -#define PMI_DATA 0x0F57 -#define AGP_CAP_ID 0x0F58 -#define AGP_STATUS 0x0F5C -#define AGP_COMMAND 0x0F60 +#define CAPABILITIES_PTR 0x0F34 +#define INTERRUPT_LINE 0x0F3C +#define INTERRUPT_PIN 0x0F3D +#define MIN_GRANT 0x0F3E +#define MAX_LATENCY 0x0F3F +#define ADAPTER_ID_W 0x0F4C +#define PMI_CAP_ID 0x0F50 +#define PMI_NXT_CAP_PTR 0x0F51 +#define PMI_PMC_REG 0x0F52 +#define PM_STATUS 0x0F54 +#define PMI_DATA 0x0F57 +#define AGP_CAP_ID 0x0F58 +#define AGP_STATUS 0x0F5C +#define AGP_COMMAND 0x0F60 #define AIC_CTRL 0x01D0 #define AIC_STAT 0x01D4 #define AIC_PT_BASE 0x01D8 -#define AIC_LO_ADDR 0x01DC -#define AIC_HI_ADDR 0x01E0 -#define AIC_TLB_ADDR 0x01E4 -#define AIC_TLB_DATA 0x01E8 -#define DAC_CNTL 0x0058 +#define AIC_LO_ADDR 0x01DC +#define AIC_HI_ADDR 0x01E0 +#define AIC_TLB_ADDR 0x01E4 +#define AIC_TLB_DATA 0x01E8 +#define DAC_CNTL 0x0058 #define DAC_CNTL2 0x007c -#define CRTC_GEN_CNTL 0x0050 -#define MEM_CNTL 0x0140 +#define CRTC_GEN_CNTL 0x0050 +#define MEM_CNTL 0x0140 #define MC_CNTL 0x0140 -#define EXT_MEM_CNTL 0x0144 +#define EXT_MEM_CNTL 0x0144 #define MC_TIMING_CNTL 0x0144 -#define MC_AGP_LOCATION 0x014C -#define MEM_IO_CNTL_A0 0x0178 +#define MC_AGP_LOCATION 0x014C +#define MEM_IO_CNTL_A0 0x0178 #define MEM_REFRESH_CNTL 0x0178 -#define MEM_INIT_LATENCY_TIMER 0x0154 +#define MEM_INIT_LATENCY_TIMER 0x0154 #define MC_INIT_GFX_LAT_TIMER 0x0154 -#define MEM_SDRAM_MODE_REG 0x0158 -#define AGP_BASE 0x0170 -#define MEM_IO_CNTL_A1 0x017C +#define MEM_SDRAM_MODE_REG 0x0158 +#define AGP_BASE 0x0170 +#define MEM_IO_CNTL_A1 0x017C #define MC_READ_CNTL_AB 0x017C #define MEM_IO_CNTL_B0 0x0180 #define MC_INIT_MISC_LAT_TIMER 0x0180 #define MEM_IO_CNTL_B1 0x0184 #define MC_IOPAD_CNTL 0x0184 #define MC_DEBUG 0x0188 -#define MC_STATUS 0x0150 -#define MEM_IO_OE_CNTL 0x018C +#define MC_STATUS 0x0150 +#define MEM_IO_OE_CNTL 0x018C #define MC_CHIP_IO_OE_CNTL_AB 0x018C -#define MC_FB_LOCATION 0x0148 -#define HOST_PATH_CNTL 0x0130 -#define MEM_VGA_WP_SEL 0x0038 -#define MEM_VGA_RP_SEL 0x003C -#define HDP_DEBUG 0x0138 +#define MC_FB_LOCATION 0x0148 +#define HOST_PATH_CNTL 0x0130 +#define MEM_VGA_WP_SEL 0x0038 +#define MEM_VGA_RP_SEL 0x003C +#define HDP_DEBUG 0x0138 #define SW_SEMAPHORE 0x013C -#define CRTC2_GEN_CNTL 0x03f8 +#define CRTC2_GEN_CNTL 0x03f8 #define CRTC2_DISPLAY_BASE_ADDR 0x033c -#define SURFACE_CNTL 0x0B00 -#define SURFACE0_LOWER_BOUND 0x0B04 -#define SURFACE1_LOWER_BOUND 0x0B14 -#define SURFACE2_LOWER_BOUND 0x0B24 -#define SURFACE3_LOWER_BOUND 0x0B34 -#define SURFACE4_LOWER_BOUND 0x0B44 +#define SURFACE_CNTL 0x0B00 +#define SURFACE0_LOWER_BOUND 0x0B04 +#define SURFACE1_LOWER_BOUND 0x0B14 +#define SURFACE2_LOWER_BOUND 0x0B24 +#define SURFACE3_LOWER_BOUND 0x0B34 +#define SURFACE4_LOWER_BOUND 0x0B44 #define SURFACE5_LOWER_BOUND 0x0B54 #define SURFACE6_LOWER_BOUND 0x0B64 #define SURFACE7_LOWER_BOUND 0x0B74 -#define SURFACE0_UPPER_BOUND 0x0B08 -#define SURFACE1_UPPER_BOUND 0x0B18 -#define SURFACE2_UPPER_BOUND 0x0B28 -#define SURFACE3_UPPER_BOUND 0x0B38 -#define SURFACE4_UPPER_BOUND 0x0B48 -#define SURFACE5_UPPER_BOUND 0x0B58 -#define SURFACE6_UPPER_BOUND 0x0B68 -#define SURFACE7_UPPER_BOUND 0x0B78 -#define SURFACE0_INFO 0x0B0C -#define SURFACE1_INFO 0x0B1C -#define SURFACE2_INFO 0x0B2C -#define SURFACE3_INFO 0x0B3C -#define SURFACE4_INFO 0x0B4C -#define SURFACE5_INFO 0x0B5C +#define SURFACE0_UPPER_BOUND 0x0B08 +#define SURFACE1_UPPER_BOUND 0x0B18 +#define SURFACE2_UPPER_BOUND 0x0B28 +#define SURFACE3_UPPER_BOUND 0x0B38 +#define SURFACE4_UPPER_BOUND 0x0B48 +#define SURFACE5_UPPER_BOUND 0x0B58 +#define SURFACE6_UPPER_BOUND 0x0B68 +#define SURFACE7_UPPER_BOUND 0x0B78 +#define SURFACE0_INFO 0x0B0C +#define SURFACE1_INFO 0x0B1C +#define SURFACE2_INFO 0x0B2C +#define SURFACE3_INFO 0x0B3C +#define SURFACE4_INFO 0x0B4C +#define SURFACE5_INFO 0x0B5C #define SURFACE6_INFO 0x0B6C #define SURFACE7_INFO 0x0B7C #define SURFACE_ACCESS_FLAGS 0x0BF8 -#define SURFACE_ACCESS_CLR 0x0BFC -#define GEN_INT_CNTL 0x0040 -#define GEN_INT_STATUS 0x0044 +#define SURFACE_ACCESS_CLR 0x0BFC +#define GEN_INT_CNTL 0x0040 +#define GEN_INT_STATUS 0x0044 #define CRTC_EXT_CNTL 0x0054 -#define RB3D_CNTL 0x1C3C -#define WAIT_UNTIL 0x1720 -#define ISYNC_CNTL 0x1724 -#define RBBM_GUICNTL 0x172C -#define RBBM_STATUS 0x0E40 -#define RBBM_STATUS_alt_1 0x1740 -#define RBBM_CNTL 0x00EC -#define RBBM_CNTL_alt_1 0x0E44 -#define RBBM_SOFT_RESET 0x00F0 -#define RBBM_SOFT_RESET_alt_1 0x0E48 -#define NQWAIT_UNTIL 0x0E50 +#define RB3D_CNTL 0x1C3C +#define WAIT_UNTIL 0x1720 +#define ISYNC_CNTL 0x1724 +#define RBBM_GUICNTL 0x172C +#define RBBM_STATUS 0x0E40 +#define RBBM_STATUS_alt_1 0x1740 +#define RBBM_CNTL 0x00EC +#define RBBM_CNTL_alt_1 0x0E44 +#define RBBM_SOFT_RESET 0x00F0 +#define RBBM_SOFT_RESET_alt_1 0x0E48 +#define NQWAIT_UNTIL 0x0E50 #define RBBM_DEBUG 0x0E6C #define RBBM_CMDFIFO_ADDR 0x0E70 #define RBBM_CMDFIFO_DATAL 0x0E74 -#define RBBM_CMDFIFO_DATAH 0x0E78 -#define RBBM_CMDFIFO_STAT 0x0E7C -#define CRTC_STATUS 0x005C -#define GPIO_VGA_DDC 0x0060 -#define GPIO_DVI_DDC 0x0064 -#define GPIO_MONID 0x0068 +#define RBBM_CMDFIFO_DATAH 0x0E78 +#define RBBM_CMDFIFO_STAT 0x0E7C +#define CRTC_STATUS 0x005C +#define GPIO_VGA_DDC 0x0060 +#define GPIO_DVI_DDC 0x0064 +#define GPIO_MONID 0x0068 #define GPIO_CRT2_DDC 0x006c -#define PALETTE_INDEX 0x00B0 -#define PALETTE_DATA 0x00B4 -#define PALETTE_30_DATA 0x00B8 -#define CRTC_H_TOTAL_DISP 0x0200 -#define CRTC_H_SYNC_STRT_WID 0x0204 -#define CRTC_V_TOTAL_DISP 0x0208 -#define CRTC_V_SYNC_STRT_WID 0x020C -#define CRTC_VLINE_CRNT_VLINE 0x0210 +#define PALETTE_INDEX 0x00B0 +#define PALETTE_DATA 0x00B4 +#define PALETTE_30_DATA 0x00B8 +#define CRTC_H_TOTAL_DISP 0x0200 +#define CRTC_H_SYNC_STRT_WID 0x0204 +#define CRTC_V_TOTAL_DISP 0x0208 +#define CRTC_V_SYNC_STRT_WID 0x020C +#define CRTC_VLINE_CRNT_VLINE 0x0210 #define CRTC_CRNT_FRAME 0x0214 #define CRTC_GUI_TRIG_VLINE 0x0218 #define CRTC_DEBUG 0x021C -#define CRTC_OFFSET_RIGHT 0x0220 -#define CRTC_OFFSET 0x0224 -#define CRTC_OFFSET_CNTL 0x0228 -#define CRTC_PITCH 0x022C -#define OVR_CLR 0x0230 -#define OVR_WID_LEFT_RIGHT 0x0234 -#define OVR_WID_TOP_BOTTOM 0x0238 -#define DISPLAY_BASE_ADDR 0x023C -#define SNAPSHOT_VH_COUNTS 0x0240 -#define SNAPSHOT_F_COUNT 0x0244 -#define N_VIF_COUNT 0x0248 -#define SNAPSHOT_VIF_COUNT 0x024C -#define FP_CRTC_H_TOTAL_DISP 0x0250 -#define FP_CRTC_V_TOTAL_DISP 0x0254 +#define CRTC_OFFSET_RIGHT 0x0220 +#define CRTC_OFFSET 0x0224 +#define CRTC_OFFSET_CNTL 0x0228 +#define CRTC_PITCH 0x022C +#define OVR_CLR 0x0230 +#define OVR_WID_LEFT_RIGHT 0x0234 +#define OVR_WID_TOP_BOTTOM 0x0238 +#define DISPLAY_BASE_ADDR 0x023C +#define SNAPSHOT_VH_COUNTS 0x0240 +#define SNAPSHOT_F_COUNT 0x0244 +#define N_VIF_COUNT 0x0248 +#define SNAPSHOT_VIF_COUNT 0x024C +#define FP_CRTC_H_TOTAL_DISP 0x0250 +#define FP_CRTC_V_TOTAL_DISP 0x0254 #define CRT_CRTC_H_SYNC_STRT_WID 0x0258 #define CRT_CRTC_V_SYNC_STRT_WID 0x025C #define CUR_OFFSET 0x0260 -#define CUR_HORZ_VERT_POSN 0x0264 -#define CUR_HORZ_VERT_OFF 0x0268 -#define CUR_CLR0 0x026C -#define CUR_CLR1 0x0270 -#define FP_HORZ_VERT_ACTIVE 0x0278 -#define CRTC_MORE_CNTL 0x027C +#define CUR_HORZ_VERT_POSN 0x0264 +#define CUR_HORZ_VERT_OFF 0x0268 +#define CUR_CLR0 0x026C +#define CUR_CLR1 0x0270 +#define FP_HORZ_VERT_ACTIVE 0x0278 +#define CRTC_MORE_CNTL 0x027C #define CRTC_H_CUTOFF_ACTIVE_EN (1<<4) #define CRTC_V_CUTOFF_ACTIVE_EN (1<<5) -#define DAC_EXT_CNTL 0x0280 -#define FP_GEN_CNTL 0x0284 -#define FP_HORZ_STRETCH 0x028C -#define FP_VERT_STRETCH 0x0290 -#define FP_H_SYNC_STRT_WID 0x02C4 -#define FP_V_SYNC_STRT_WID 0x02C8 -#define AUX_WINDOW_HORZ_CNTL 0x02D8 -#define AUX_WINDOW_VERT_CNTL 0x02DC +#define DAC_EXT_CNTL 0x0280 +#define FP_GEN_CNTL 0x0284 +#define FP_HORZ_STRETCH 0x028C +#define FP_VERT_STRETCH 0x0290 +#define FP_H_SYNC_STRT_WID 0x02C4 +#define FP_V_SYNC_STRT_WID 0x02C8 +#define AUX_WINDOW_HORZ_CNTL 0x02D8 +#define AUX_WINDOW_VERT_CNTL 0x02DC //#define DDA_CONFIG 0x02e0 //#define DDA_ON_OFF 0x02e4 #define DVI_I2C_CNTL_1 0x02e4 @@ -199,192 +199,192 @@ #define GRPH2_BUFFER_CNTL 0x03F0 #define VGA_BUFFER_CNTL 0x02F4 #define OV0_Y_X_START 0x0400 -#define OV0_Y_X_END 0x0404 -#define OV0_PIPELINE_CNTL 0x0408 -#define OV0_REG_LOAD_CNTL 0x0410 -#define OV0_SCALE_CNTL 0x0420 -#define OV0_V_INC 0x0424 -#define OV0_P1_V_ACCUM_INIT 0x0428 -#define OV0_P23_V_ACCUM_INIT 0x042C -#define OV0_P1_BLANK_LINES_AT_TOP 0x0430 -#define OV0_P23_BLANK_LINES_AT_TOP 0x0434 -#define OV0_BASE_ADDR 0x043C -#define OV0_VID_BUF0_BASE_ADRS 0x0440 -#define OV0_VID_BUF1_BASE_ADRS 0x0444 -#define OV0_VID_BUF2_BASE_ADRS 0x0448 -#define OV0_VID_BUF3_BASE_ADRS 0x044C +#define OV0_Y_X_END 0x0404 +#define OV0_PIPELINE_CNTL 0x0408 +#define OV0_REG_LOAD_CNTL 0x0410 +#define OV0_SCALE_CNTL 0x0420 +#define OV0_V_INC 0x0424 +#define OV0_P1_V_ACCUM_INIT 0x0428 +#define OV0_P23_V_ACCUM_INIT 0x042C +#define OV0_P1_BLANK_LINES_AT_TOP 0x0430 +#define OV0_P23_BLANK_LINES_AT_TOP 0x0434 +#define OV0_BASE_ADDR 0x043C +#define OV0_VID_BUF0_BASE_ADRS 0x0440 +#define OV0_VID_BUF1_BASE_ADRS 0x0444 +#define OV0_VID_BUF2_BASE_ADRS 0x0448 +#define OV0_VID_BUF3_BASE_ADRS 0x044C #define OV0_VID_BUF4_BASE_ADRS 0x0450 #define OV0_VID_BUF5_BASE_ADRS 0x0454 #define OV0_VID_BUF_PITCH0_VALUE 0x0460 -#define OV0_VID_BUF_PITCH1_VALUE 0x0464 -#define OV0_AUTO_FLIP_CNTRL 0x0470 -#define OV0_DEINTERLACE_PATTERN 0x0474 -#define OV0_SUBMIT_HISTORY 0x0478 -#define OV0_H_INC 0x0480 -#define OV0_STEP_BY 0x0484 -#define OV0_P1_H_ACCUM_INIT 0x0488 -#define OV0_P23_H_ACCUM_INIT 0x048C -#define OV0_P1_X_START_END 0x0494 -#define OV0_P2_X_START_END 0x0498 -#define OV0_P3_X_START_END 0x049C -#define OV0_FILTER_CNTL 0x04A0 -#define OV0_FOUR_TAP_COEF_0 0x04B0 -#define OV0_FOUR_TAP_COEF_1 0x04B4 +#define OV0_VID_BUF_PITCH1_VALUE 0x0464 +#define OV0_AUTO_FLIP_CNTRL 0x0470 +#define OV0_DEINTERLACE_PATTERN 0x0474 +#define OV0_SUBMIT_HISTORY 0x0478 +#define OV0_H_INC 0x0480 +#define OV0_STEP_BY 0x0484 +#define OV0_P1_H_ACCUM_INIT 0x0488 +#define OV0_P23_H_ACCUM_INIT 0x048C +#define OV0_P1_X_START_END 0x0494 +#define OV0_P2_X_START_END 0x0498 +#define OV0_P3_X_START_END 0x049C +#define OV0_FILTER_CNTL 0x04A0 +#define OV0_FOUR_TAP_COEF_0 0x04B0 +#define OV0_FOUR_TAP_COEF_1 0x04B4 #define OV0_FOUR_TAP_COEF_2 0x04B8 #define OV0_FOUR_TAP_COEF_3 0x04BC #define OV0_FOUR_TAP_COEF_4 0x04C0 -#define OV0_FLAG_CNTRL 0x04DC -#define OV0_SLICE_CNTL 0x04E0 -#define OV0_VID_KEY_CLR_LOW 0x04E4 -#define OV0_VID_KEY_CLR_HIGH 0x04E8 -#define OV0_GRPH_KEY_CLR_LOW 0x04EC -#define OV0_GRPH_KEY_CLR_HIGH 0x04F0 -#define OV0_KEY_CNTL 0x04F4 -#define OV0_TEST 0x04F8 -#define SUBPIC_CNTL 0x0540 -#define SUBPIC_DEFCOLCON 0x0544 -#define SUBPIC_Y_X_START 0x054C -#define SUBPIC_Y_X_END 0x0550 -#define SUBPIC_V_INC 0x0554 -#define SUBPIC_H_INC 0x0558 +#define OV0_FLAG_CNTRL 0x04DC +#define OV0_SLICE_CNTL 0x04E0 +#define OV0_VID_KEY_CLR_LOW 0x04E4 +#define OV0_VID_KEY_CLR_HIGH 0x04E8 +#define OV0_GRPH_KEY_CLR_LOW 0x04EC +#define OV0_GRPH_KEY_CLR_HIGH 0x04F0 +#define OV0_KEY_CNTL 0x04F4 +#define OV0_TEST 0x04F8 +#define SUBPIC_CNTL 0x0540 +#define SUBPIC_DEFCOLCON 0x0544 +#define SUBPIC_Y_X_START 0x054C +#define SUBPIC_Y_X_END 0x0550 +#define SUBPIC_V_INC 0x0554 +#define SUBPIC_H_INC 0x0558 #define SUBPIC_BUF0_OFFSET 0x055C #define SUBPIC_BUF1_OFFSET 0x0560 #define SUBPIC_LC0_OFFSET 0x0564 -#define SUBPIC_LC1_OFFSET 0x0568 -#define SUBPIC_PITCH 0x056C -#define SUBPIC_BTN_HLI_COLCON 0x0570 -#define SUBPIC_BTN_HLI_Y_X_START 0x0574 -#define SUBPIC_BTN_HLI_Y_X_END 0x0578 -#define SUBPIC_PALETTE_INDEX 0x057C -#define SUBPIC_PALETTE_DATA 0x0580 -#define SUBPIC_H_ACCUM_INIT 0x0584 -#define SUBPIC_V_ACCUM_INIT 0x0588 -#define DISP_MISC_CNTL 0x0D00 -#define DAC_MACRO_CNTL 0x0D04 -#define DISP_PWR_MAN 0x0D08 -#define DISP_TEST_DEBUG_CNTL 0x0D10 -#define DISP_HW_DEBUG 0x0D14 +#define SUBPIC_LC1_OFFSET 0x0568 +#define SUBPIC_PITCH 0x056C +#define SUBPIC_BTN_HLI_COLCON 0x0570 +#define SUBPIC_BTN_HLI_Y_X_START 0x0574 +#define SUBPIC_BTN_HLI_Y_X_END 0x0578 +#define SUBPIC_PALETTE_INDEX 0x057C +#define SUBPIC_PALETTE_DATA 0x0580 +#define SUBPIC_H_ACCUM_INIT 0x0584 +#define SUBPIC_V_ACCUM_INIT 0x0588 +#define DISP_MISC_CNTL 0x0D00 +#define DAC_MACRO_CNTL 0x0D04 +#define DISP_PWR_MAN 0x0D08 +#define DISP_TEST_DEBUG_CNTL 0x0D10 +#define DISP_HW_DEBUG 0x0D14 #define DAC_CRC_SIG1 0x0D18 #define DAC_CRC_SIG2 0x0D1C #define OV0_LIN_TRANS_A 0x0D20 -#define OV0_LIN_TRANS_B 0x0D24 -#define OV0_LIN_TRANS_C 0x0D28 -#define OV0_LIN_TRANS_D 0x0D2C -#define OV0_LIN_TRANS_E 0x0D30 -#define OV0_LIN_TRANS_F 0x0D34 -#define OV0_GAMMA_0_F 0x0D40 -#define OV0_GAMMA_10_1F 0x0D44 -#define OV0_GAMMA_20_3F 0x0D48 -#define OV0_GAMMA_40_7F 0x0D4C -#define OV0_GAMMA_380_3BF 0x0D50 -#define OV0_GAMMA_3C0_3FF 0x0D54 -#define DISP_MERGE_CNTL 0x0D60 -#define DISP_OUTPUT_CNTL 0x0D64 -#define DISP_LIN_TRANS_GRPH_A 0x0D80 +#define OV0_LIN_TRANS_B 0x0D24 +#define OV0_LIN_TRANS_C 0x0D28 +#define OV0_LIN_TRANS_D 0x0D2C +#define OV0_LIN_TRANS_E 0x0D30 +#define OV0_LIN_TRANS_F 0x0D34 +#define OV0_GAMMA_0_F 0x0D40 +#define OV0_GAMMA_10_1F 0x0D44 +#define OV0_GAMMA_20_3F 0x0D48 +#define OV0_GAMMA_40_7F 0x0D4C +#define OV0_GAMMA_380_3BF 0x0D50 +#define OV0_GAMMA_3C0_3FF 0x0D54 +#define DISP_MERGE_CNTL 0x0D60 +#define DISP_OUTPUT_CNTL 0x0D64 +#define DISP_LIN_TRANS_GRPH_A 0x0D80 #define DISP_LIN_TRANS_GRPH_B 0x0D84 #define DISP_LIN_TRANS_GRPH_C 0x0D88 #define DISP_LIN_TRANS_GRPH_D 0x0D8C -#define DISP_LIN_TRANS_GRPH_E 0x0D90 -#define DISP_LIN_TRANS_GRPH_F 0x0D94 -#define DISP_LIN_TRANS_VID_A 0x0D98 -#define DISP_LIN_TRANS_VID_B 0x0D9C -#define DISP_LIN_TRANS_VID_C 0x0DA0 -#define DISP_LIN_TRANS_VID_D 0x0DA4 -#define DISP_LIN_TRANS_VID_E 0x0DA8 -#define DISP_LIN_TRANS_VID_F 0x0DAC -#define RMX_HORZ_FILTER_0TAP_COEF 0x0DB0 -#define RMX_HORZ_FILTER_1TAP_COEF 0x0DB4 -#define RMX_HORZ_FILTER_2TAP_COEF 0x0DB8 -#define RMX_HORZ_PHASE 0x0DBC -#define DAC_EMBEDDED_SYNC_CNTL 0x0DC0 -#define DAC_BROAD_PULSE 0x0DC4 +#define DISP_LIN_TRANS_GRPH_E 0x0D90 +#define DISP_LIN_TRANS_GRPH_F 0x0D94 +#define DISP_LIN_TRANS_VID_A 0x0D98 +#define DISP_LIN_TRANS_VID_B 0x0D9C +#define DISP_LIN_TRANS_VID_C 0x0DA0 +#define DISP_LIN_TRANS_VID_D 0x0DA4 +#define DISP_LIN_TRANS_VID_E 0x0DA8 +#define DISP_LIN_TRANS_VID_F 0x0DAC +#define RMX_HORZ_FILTER_0TAP_COEF 0x0DB0 +#define RMX_HORZ_FILTER_1TAP_COEF 0x0DB4 +#define RMX_HORZ_FILTER_2TAP_COEF 0x0DB8 +#define RMX_HORZ_PHASE 0x0DBC +#define DAC_EMBEDDED_SYNC_CNTL 0x0DC0 +#define DAC_BROAD_PULSE 0x0DC4 #define DAC_SKEW_CLKS 0x0DC8 #define DAC_INCR 0x0DCC #define DAC_NEG_SYNC_LEVEL 0x0DD0 -#define DAC_POS_SYNC_LEVEL 0x0DD4 -#define DAC_BLANK_LEVEL 0x0DD8 -#define CLOCK_CNTL_INDEX 0x0008 -#define CLOCK_CNTL_DATA 0x000C -#define CP_RB_CNTL 0x0704 -#define CP_RB_BASE 0x0700 -#define CP_RB_RPTR_ADDR 0x070C -#define CP_RB_RPTR 0x0710 -#define CP_RB_WPTR 0x0714 -#define CP_RB_WPTR_DELAY 0x0718 -#define CP_IB_BASE 0x0738 -#define CP_IB_BUFSZ 0x073C -#define SCRATCH_REG0 0x15E0 -#define GUI_SCRATCH_REG0 0x15E0 -#define SCRATCH_REG1 0x15E4 -#define GUI_SCRATCH_REG1 0x15E4 +#define DAC_POS_SYNC_LEVEL 0x0DD4 +#define DAC_BLANK_LEVEL 0x0DD8 +#define CLOCK_CNTL_INDEX 0x0008 +#define CLOCK_CNTL_DATA 0x000C +#define CP_RB_CNTL 0x0704 +#define CP_RB_BASE 0x0700 +#define CP_RB_RPTR_ADDR 0x070C +#define CP_RB_RPTR 0x0710 +#define CP_RB_WPTR 0x0714 +#define CP_RB_WPTR_DELAY 0x0718 +#define CP_IB_BASE 0x0738 +#define CP_IB_BUFSZ 0x073C +#define SCRATCH_REG0 0x15E0 +#define GUI_SCRATCH_REG0 0x15E0 +#define SCRATCH_REG1 0x15E4 +#define GUI_SCRATCH_REG1 0x15E4 #define SCRATCH_REG2 0x15E8 #define GUI_SCRATCH_REG2 0x15E8 #define SCRATCH_REG3 0x15EC -#define GUI_SCRATCH_REG3 0x15EC -#define SCRATCH_REG4 0x15F0 -#define GUI_SCRATCH_REG4 0x15F0 -#define SCRATCH_REG5 0x15F4 -#define GUI_SCRATCH_REG5 0x15F4 -#define SCRATCH_UMSK 0x0770 -#define SCRATCH_ADDR 0x0774 -#define DP_BRUSH_FRGD_CLR 0x147C +#define GUI_SCRATCH_REG3 0x15EC +#define SCRATCH_REG4 0x15F0 +#define GUI_SCRATCH_REG4 0x15F0 +#define SCRATCH_REG5 0x15F4 +#define GUI_SCRATCH_REG5 0x15F4 +#define SCRATCH_UMSK 0x0770 +#define SCRATCH_ADDR 0x0774 +#define DP_BRUSH_FRGD_CLR 0x147C #define DP_BRUSH_BKGD_CLR 0x1478 #define DST_LINE_START 0x1600 -#define DST_LINE_END 0x1604 -#define SRC_OFFSET 0x15AC +#define DST_LINE_END 0x1604 +#define SRC_OFFSET 0x15AC #define SRC_PITCH 0x15B0 #define SRC_TILE 0x1704 #define SRC_PITCH_OFFSET 0x1428 -#define SRC_X 0x1414 -#define SRC_Y 0x1418 -#define SRC_X_Y 0x1590 -#define SRC_Y_X 0x1434 +#define SRC_X 0x1414 +#define SRC_Y 0x1418 +#define SRC_X_Y 0x1590 +#define SRC_Y_X 0x1434 #define DST_Y_X 0x1438 #define DST_WIDTH_HEIGHT 0x1598 #define DST_HEIGHT_WIDTH 0x143c #define DST_OFFSET 0x1404 -#define SRC_CLUT_ADDRESS 0x1780 -#define SRC_CLUT_DATA 0x1784 -#define SRC_CLUT_DATA_RD 0x1788 -#define HOST_DATA0 0x17C0 -#define HOST_DATA1 0x17C4 -#define HOST_DATA2 0x17C8 -#define HOST_DATA3 0x17CC -#define HOST_DATA4 0x17D0 -#define HOST_DATA5 0x17D4 -#define HOST_DATA6 0x17D8 +#define SRC_CLUT_ADDRESS 0x1780 +#define SRC_CLUT_DATA 0x1784 +#define SRC_CLUT_DATA_RD 0x1788 +#define HOST_DATA0 0x17C0 +#define HOST_DATA1 0x17C4 +#define HOST_DATA2 0x17C8 +#define HOST_DATA3 0x17CC +#define HOST_DATA4 0x17D0 +#define HOST_DATA5 0x17D4 +#define HOST_DATA6 0x17D8 #define HOST_DATA7 0x17DC #define HOST_DATA_LAST 0x17E0 #define DP_SRC_ENDIAN 0x15D4 -#define DP_SRC_FRGD_CLR 0x15D8 -#define DP_SRC_BKGD_CLR 0x15DC -#define SC_LEFT 0x1640 -#define SC_RIGHT 0x1644 -#define SC_TOP 0x1648 -#define SC_BOTTOM 0x164C -#define SRC_SC_RIGHT 0x1654 -#define SRC_SC_BOTTOM 0x165C -#define DP_CNTL 0x16C0 -#define DP_CNTL_XDIR_YDIR_YMAJOR 0x16D0 -#define DP_DATATYPE 0x16C4 -#define DP_MIX 0x16C8 -#define DP_WRITE_MSK 0x16CC -#define DP_XOP 0x17F8 +#define DP_SRC_FRGD_CLR 0x15D8 +#define DP_SRC_BKGD_CLR 0x15DC +#define SC_LEFT 0x1640 +#define SC_RIGHT 0x1644 +#define SC_TOP 0x1648 +#define SC_BOTTOM 0x164C +#define SRC_SC_RIGHT 0x1654 +#define SRC_SC_BOTTOM 0x165C +#define DP_CNTL 0x16C0 +#define DP_CNTL_XDIR_YDIR_YMAJOR 0x16D0 +#define DP_DATATYPE 0x16C4 +#define DP_MIX 0x16C8 +#define DP_WRITE_MSK 0x16CC +#define DP_XOP 0x17F8 #define CLR_CMP_CLR_SRC 0x15C4 #define CLR_CMP_CLR_DST 0x15C8 #define CLR_CMP_CNTL 0x15C0 -#define CLR_CMP_MSK 0x15CC -#define DSTCACHE_MODE 0x1710 -#define DSTCACHE_CTLSTAT 0x1714 -#define DEFAULT_PITCH_OFFSET 0x16E0 -#define DEFAULT_SC_BOTTOM_RIGHT 0x16E8 +#define CLR_CMP_MSK 0x15CC +#define DSTCACHE_MODE 0x1710 +#define DSTCACHE_CTLSTAT 0x1714 +#define DEFAULT_PITCH_OFFSET 0x16E0 +#define DEFAULT_SC_BOTTOM_RIGHT 0x16E8 #define DEFAULT_SC_TOP_LEFT 0x16EC #define SRC_PITCH_OFFSET 0x1428 #define DST_PITCH_OFFSET 0x142C -#define DP_GUI_MASTER_CNTL 0x146C -#define SC_TOP_LEFT 0x16EC -#define SC_BOTTOM_RIGHT 0x16F0 -#define SRC_SC_BOTTOM_RIGHT 0x16F4 +#define DP_GUI_MASTER_CNTL 0x146C +#define SC_TOP_LEFT 0x16EC +#define SC_BOTTOM_RIGHT 0x16F0 +#define SRC_SC_BOTTOM_RIGHT 0x16F4 #define RB2D_DSTCACHE_MODE 0x3428 #define RB2D_DSTCACHE_CTLSTAT_broken 0x342C /* do not use */ #define LVDS_GEN_CNTL 0x02d0 @@ -686,7 +686,7 @@ #define VERT_FP_LOOP_STRETCH (0x7 << 28) #define VERT_STRETCH_RESERVED 0xf1000000 -/* DAC_CNTL bit constants */ +/* DAC_CNTL bit constants */ #define DAC_8BIT_EN 0x00000100 #define DAC_4BPP_PIX_ORDER 0x00000200 #define DAC_CRC_EN 0x00080000 @@ -700,7 +700,7 @@ #define DAC_CMP_EN (1 << 3) #define DAC_CMP_OUTPUT (1 << 7) -/* DAC_CNTL2 bit constants */ +/* DAC_CNTL2 bit constants */ #define DAC2_EXPAND_MODE (1 << 14) #define DAC2_CMP_EN (1 << 7) #define DAC2_PALETTE_ACCESS_CNTL (1 << 5) diff --git a/include/video/s1d13xxxfb.h b/include/video/s1d13xxxfb.h index fe41b8407946..c3b2a2aa7140 100644 --- a/include/video/s1d13xxxfb.h +++ b/include/video/s1d13xxxfb.h @@ -14,13 +14,16 @@ #define S1D13XXXFB_H #define S1D_PALETTE_SIZE 256 -#define S1D13506_CHIP_REV 4 /* expected chip revision number for s1d13506 */ -#define S1D13806_CHIP_REV 7 /* expected chip revision number for s1d13806 */ -#define S1D_FBID "S1D13806" -#define S1D_DEVICENAME "s1d13806fb" +#define S1D_FBID "S1D13xxx" +#define S1D_DEVICENAME "s1d13xxxfb" + +/* S1DREG_REV_CODE register = prod_id (6 bits) + revision (2 bits) */ +#define S1D13505_PROD_ID 0x3 /* 000011 */ +#define S1D13506_PROD_ID 0x4 /* 000100 */ +#define S1D13806_PROD_ID 0x7 /* 000111 */ /* register definitions (tested on s1d13896) */ -#define S1DREG_REV_CODE 0x0000 /* Revision Code Register */ +#define S1DREG_REV_CODE 0x0000 /* Prod + Rev Code Register */ #define S1DREG_MISC 0x0001 /* Miscellaneous Register */ #define S1DREG_GPIO_CNF0 0x0004 /* General IO Pins Configuration Register 0 */ #define S1DREG_GPIO_CNF1 0x0005 /* General IO Pins Configuration Register 1 */ @@ -141,10 +144,11 @@ struct s1d13xxxfb_regval { u8 value; }; - struct s1d13xxxfb_par { void __iomem *regs; unsigned char display; + unsigned char prod_id; + unsigned char revision; unsigned int pseudo_palette[16]; #ifdef CONFIG_PM |
