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-rw-r--r--include/linux/mfd/axp20x.h6
-rw-r--r--include/linux/mfd/davinci_voicecodec.h4
-rw-r--r--include/linux/mfd/rk808.h1
-rw-r--r--include/linux/mfd/rn5t618.h9
-rw-r--r--include/linux/mfd/sun4i-gpadc.h94
-rw-r--r--include/linux/mfd/tps65217.h4
-rw-r--r--include/linux/mfd/tps65218.h3
-rw-r--r--include/linux/mfd/tps65912.h16
8 files changed, 115 insertions, 22 deletions
diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h
index fec597fb34cb..a4860bc9b73d 100644
--- a/include/linux/mfd/axp20x.h
+++ b/include/linux/mfd/axp20x.h
@@ -115,6 +115,8 @@ enum {
#define AXP806_CLDO2_V_CTRL 0x25
#define AXP806_CLDO3_V_CTRL 0x26
#define AXP806_VREF_TEMP_WARN_L 0xf3
+#define AXP806_BUS_ADDR_EXT 0xfe
+#define AXP806_REG_ADDR_EXT 0xff
/* Interrupt */
#define AXP152_IRQ1_EN 0x40
@@ -226,6 +228,10 @@ enum {
#define AXP20X_OCV_MAX 0xf
/* AXP22X specific registers */
+#define AXP22X_PMIC_ADC_H 0x56
+#define AXP22X_PMIC_ADC_L 0x57
+#define AXP22X_TS_ADC_H 0x58
+#define AXP22X_TS_ADC_L 0x59
#define AXP22X_BATLOW_THRES1 0xe6
/* AXP288 specific registers */
diff --git a/include/linux/mfd/davinci_voicecodec.h b/include/linux/mfd/davinci_voicecodec.h
index 8e1cdbef3dad..2c0127cb06c5 100644
--- a/include/linux/mfd/davinci_voicecodec.h
+++ b/include/linux/mfd/davinci_voicecodec.h
@@ -28,8 +28,6 @@
#include <linux/mfd/core.h>
#include <linux/platform_data/edma.h>
-#include <mach/hardware.h>
-
struct regmap;
/*
@@ -99,8 +97,6 @@ struct davinci_vcif {
dma_addr_t dma_rx_addr;
};
-struct davinci_vc;
-
struct davinci_vc {
/* Device data */
struct device *dev;
diff --git a/include/linux/mfd/rk808.h b/include/linux/mfd/rk808.h
index 6d435a3c06bc..83701ef7d3c7 100644
--- a/include/linux/mfd/rk808.h
+++ b/include/linux/mfd/rk808.h
@@ -290,6 +290,7 @@ enum rk818_reg {
#define SWITCH2_EN BIT(6)
#define SWITCH1_EN BIT(5)
#define DEV_OFF_RST BIT(3)
+#define DEV_OFF BIT(0)
#define VB_LO_ACT BIT(4)
#define VB_LO_SEL_3500MV (7 << 0)
diff --git a/include/linux/mfd/rn5t618.h b/include/linux/mfd/rn5t618.h
index cadc6543909d..e5a6cdeb77db 100644
--- a/include/linux/mfd/rn5t618.h
+++ b/include/linux/mfd/rn5t618.h
@@ -58,10 +58,13 @@
#define RN5T618_DC3CTL2 0x31
#define RN5T618_DC4CTL 0x32
#define RN5T618_DC4CTL2 0x33
+#define RN5T618_DC5CTL 0x34
+#define RN5T618_DC5CTL2 0x35
#define RN5T618_DC1DAC 0x36
#define RN5T618_DC2DAC 0x37
#define RN5T618_DC3DAC 0x38
#define RN5T618_DC4DAC 0x39
+#define RN5T618_DC5DAC 0x3a
#define RN5T618_DC1DAC_SLP 0x3b
#define RN5T618_DC2DAC_SLP 0x3c
#define RN5T618_DC3DAC_SLP 0x3d
@@ -77,6 +80,11 @@
#define RN5T618_LDO3DAC 0x4e
#define RN5T618_LDO4DAC 0x4f
#define RN5T618_LDO5DAC 0x50
+#define RN5T618_LDO6DAC 0x51
+#define RN5T618_LDO7DAC 0x52
+#define RN5T618_LDO8DAC 0x53
+#define RN5T618_LDO9DAC 0x54
+#define RN5T618_LDO10DAC 0x55
#define RN5T618_LDORTCDAC 0x56
#define RN5T618_LDORTC2DAC 0x57
#define RN5T618_LDO1DAC_SLP 0x58
@@ -231,6 +239,7 @@ enum {
enum {
RN5T567 = 0,
RN5T618,
+ RC5T619,
};
struct rn5t618 {
diff --git a/include/linux/mfd/sun4i-gpadc.h b/include/linux/mfd/sun4i-gpadc.h
new file mode 100644
index 000000000000..d7a29f246d64
--- /dev/null
+++ b/include/linux/mfd/sun4i-gpadc.h
@@ -0,0 +1,94 @@
+/* Header of ADC MFD core driver for sunxi platforms
+ *
+ * Copyright (c) 2016 Quentin Schulz <quentin.schulz@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it under
+ * the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation.
+ */
+
+#ifndef __SUN4I_GPADC__H__
+#define __SUN4I_GPADC__H__
+
+#define SUN4I_GPADC_CTRL0 0x00
+
+#define SUN4I_GPADC_CTRL0_ADC_FIRST_DLY(x) ((GENMASK(7, 0) & (x)) << 24)
+#define SUN4I_GPADC_CTRL0_ADC_FIRST_DLY_MODE BIT(23)
+#define SUN4I_GPADC_CTRL0_ADC_CLK_SELECT BIT(22)
+#define SUN4I_GPADC_CTRL0_ADC_CLK_DIVIDER(x) ((GENMASK(1, 0) & (x)) << 20)
+#define SUN4I_GPADC_CTRL0_FS_DIV(x) ((GENMASK(3, 0) & (x)) << 16)
+#define SUN4I_GPADC_CTRL0_T_ACQ(x) (GENMASK(15, 0) & (x))
+
+#define SUN4I_GPADC_CTRL1 0x04
+
+#define SUN4I_GPADC_CTRL1_STYLUS_UP_DEBOUNCE(x) ((GENMASK(7, 0) & (x)) << 12)
+#define SUN4I_GPADC_CTRL1_STYLUS_UP_DEBOUNCE_EN BIT(9)
+#define SUN4I_GPADC_CTRL1_TOUCH_PAN_CALI_EN BIT(6)
+#define SUN4I_GPADC_CTRL1_TP_DUAL_EN BIT(5)
+#define SUN4I_GPADC_CTRL1_TP_MODE_EN BIT(4)
+#define SUN4I_GPADC_CTRL1_TP_ADC_SELECT BIT(3)
+#define SUN4I_GPADC_CTRL1_ADC_CHAN_SELECT(x) (GENMASK(2, 0) & (x))
+
+/* TP_CTRL1 bits for sun6i SOCs */
+#define SUN6I_GPADC_CTRL1_TOUCH_PAN_CALI_EN BIT(7)
+#define SUN6I_GPADC_CTRL1_TP_DUAL_EN BIT(6)
+#define SUN6I_GPADC_CTRL1_TP_MODE_EN BIT(5)
+#define SUN6I_GPADC_CTRL1_TP_ADC_SELECT BIT(4)
+#define SUN6I_GPADC_CTRL1_ADC_CHAN_SELECT(x) (GENMASK(3, 0) & BIT(x))
+
+#define SUN4I_GPADC_CTRL2 0x08
+
+#define SUN4I_GPADC_CTRL2_TP_SENSITIVE_ADJUST(x) ((GENMASK(3, 0) & (x)) << 28)
+#define SUN4I_GPADC_CTRL2_TP_MODE_SELECT(x) ((GENMASK(1, 0) & (x)) << 26)
+#define SUN4I_GPADC_CTRL2_PRE_MEA_EN BIT(24)
+#define SUN4I_GPADC_CTRL2_PRE_MEA_THRE_CNT(x) (GENMASK(23, 0) & (x))
+
+#define SUN4I_GPADC_CTRL3 0x0c
+
+#define SUN4I_GPADC_CTRL3_FILTER_EN BIT(2)
+#define SUN4I_GPADC_CTRL3_FILTER_TYPE(x) (GENMASK(1, 0) & (x))
+
+#define SUN4I_GPADC_TPR 0x18
+
+#define SUN4I_GPADC_TPR_TEMP_ENABLE BIT(16)
+#define SUN4I_GPADC_TPR_TEMP_PERIOD(x) (GENMASK(15, 0) & (x))
+
+#define SUN4I_GPADC_INT_FIFOC 0x10
+
+#define SUN4I_GPADC_INT_FIFOC_TEMP_IRQ_EN BIT(18)
+#define SUN4I_GPADC_INT_FIFOC_TP_OVERRUN_IRQ_EN BIT(17)
+#define SUN4I_GPADC_INT_FIFOC_TP_DATA_IRQ_EN BIT(16)
+#define SUN4I_GPADC_INT_FIFOC_TP_DATA_XY_CHANGE BIT(13)
+#define SUN4I_GPADC_INT_FIFOC_TP_FIFO_TRIG_LEVEL(x) ((GENMASK(4, 0) & (x)) << 8)
+#define SUN4I_GPADC_INT_FIFOC_TP_DATA_DRQ_EN BIT(7)
+#define SUN4I_GPADC_INT_FIFOC_TP_FIFO_FLUSH BIT(4)
+#define SUN4I_GPADC_INT_FIFOC_TP_UP_IRQ_EN BIT(1)
+#define SUN4I_GPADC_INT_FIFOC_TP_DOWN_IRQ_EN BIT(0)
+
+#define SUN4I_GPADC_INT_FIFOS 0x14
+
+#define SUN4I_GPADC_INT_FIFOS_TEMP_DATA_PENDING BIT(18)
+#define SUN4I_GPADC_INT_FIFOS_FIFO_OVERRUN_PENDING BIT(17)
+#define SUN4I_GPADC_INT_FIFOS_FIFO_DATA_PENDING BIT(16)
+#define SUN4I_GPADC_INT_FIFOS_TP_IDLE_FLG BIT(2)
+#define SUN4I_GPADC_INT_FIFOS_TP_UP_PENDING BIT(1)
+#define SUN4I_GPADC_INT_FIFOS_TP_DOWN_PENDING BIT(0)
+
+#define SUN4I_GPADC_CDAT 0x1c
+#define SUN4I_GPADC_TEMP_DATA 0x20
+#define SUN4I_GPADC_DATA 0x24
+
+#define SUN4I_GPADC_IRQ_FIFO_DATA 0
+#define SUN4I_GPADC_IRQ_TEMP_DATA 1
+
+/* 10s delay before suspending the IP */
+#define SUN4I_GPADC_AUTOSUSPEND_DELAY 10000
+
+struct sun4i_gpadc_dev {
+ struct device *dev;
+ struct regmap *regmap;
+ struct regmap_irq_chip_data *regmap_irqc;
+ void __iomem *base;
+};
+
+#endif
diff --git a/include/linux/mfd/tps65217.h b/include/linux/mfd/tps65217.h
index 3cbec4b2496a..eac285756b37 100644
--- a/include/linux/mfd/tps65217.h
+++ b/include/linux/mfd/tps65217.h
@@ -73,13 +73,15 @@
#define TPS65217_PPATH_AC_CURRENT_MASK 0x0C
#define TPS65217_PPATH_USB_CURRENT_MASK 0x03
-#define TPS65217_INT_RESERVEDM BIT(7)
#define TPS65217_INT_PBM BIT(6)
#define TPS65217_INT_ACM BIT(5)
#define TPS65217_INT_USBM BIT(4)
#define TPS65217_INT_PBI BIT(2)
#define TPS65217_INT_ACI BIT(1)
#define TPS65217_INT_USBI BIT(0)
+#define TPS65217_INT_SHIFT 4
+#define TPS65217_INT_MASK (TPS65217_INT_PBM | TPS65217_INT_ACM | \
+ TPS65217_INT_USBM)
#define TPS65217_CHGCONFIG0_TREG BIT(7)
#define TPS65217_CHGCONFIG0_DPPM BIT(6)
diff --git a/include/linux/mfd/tps65218.h b/include/linux/mfd/tps65218.h
index d1db9527fab5..bccd2d68b1e3 100644
--- a/include/linux/mfd/tps65218.h
+++ b/include/linux/mfd/tps65218.h
@@ -282,10 +282,9 @@ struct tps65218 {
struct regulator_desc desc[TPS65218_NUM_REGULATOR];
struct tps_info *info[TPS65218_NUM_REGULATOR];
struct regmap *regmap;
+ u8 *strobes;
};
-int tps65218_reg_read(struct tps65218 *tps, unsigned int reg,
- unsigned int *val);
int tps65218_reg_write(struct tps65218 *tps, unsigned int reg,
unsigned int val, unsigned int level);
int tps65218_set_bits(struct tps65218 *tps, unsigned int reg,
diff --git a/include/linux/mfd/tps65912.h b/include/linux/mfd/tps65912.h
index 1a603701550e..b25d0297ba88 100644
--- a/include/linux/mfd/tps65912.h
+++ b/include/linux/mfd/tps65912.h
@@ -319,21 +319,7 @@ struct tps65912 {
struct regmap_irq_chip_data *irq_data;
};
-static const struct regmap_range tps65912_yes_ranges[] = {
- regmap_reg_range(TPS65912_INT_STS, TPS65912_GPIO5),
-};
-
-static const struct regmap_access_table tps65912_volatile_table = {
- .yes_ranges = tps65912_yes_ranges,
- .n_yes_ranges = ARRAY_SIZE(tps65912_yes_ranges),
-};
-
-static const struct regmap_config tps65912_regmap_config = {
- .reg_bits = 8,
- .val_bits = 8,
- .cache_type = REGCACHE_RBTREE,
- .volatile_table = &tps65912_volatile_table,
-};
+extern const struct regmap_config tps65912_regmap_config;
int tps65912_device_init(struct tps65912 *tps);
int tps65912_device_exit(struct tps65912 *tps);
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