3 files changed, 71 insertions, 0 deletions
diff --git a/include/asm-sh/sh03/ide.h b/include/asm-sh/sh03/ide.h
new file mode 100644
index 000000000000..73ee92e5c79e
--- /dev/null
+++ b/include/asm-sh/sh03/ide.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_SH_SH03_IDE_H
+#define __ASM_SH_SH03_IDE_H
+
+#define IRQ_CFCARD	8
+#define IRQ_PCMCIA	8
+
+#endif /* __ASM_SH_SH03_IDE_H */
diff --git a/include/asm-sh/sh03/io.h b/include/asm-sh/sh03/io.h
new file mode 100644
index 000000000000..25792e9831ea
--- /dev/null
+++ b/include/asm-sh/sh03/io.h
@@ -0,0 +1,46 @@
+/*
+ * include/asm-sh/sh03/io.h
+ *
+ * Copyright 2004 Interface Co.,Ltd. Saito.K
+ *
+ * IO functions for an Interface CTP/PCI-SH03
+ */
+
+#ifndef _ASM_SH_IO_SH03_H
+#define _ASM_SH_IO_SH03_H
+
+#include <linux/time.h>
+
+#define INTC_IPRD	0xffd00010UL
+
+#define IRL0_IRQ	2
+#define IRL0_IPR_ADDR	INTC_IPRD
+#define IRL0_IPR_POS	3
+#define IRL0_PRIORITY	13
+
+#define IRL1_IRQ	5
+#define IRL1_IPR_ADDR	INTC_IPRD
+#define IRL1_IPR_POS	2
+#define IRL1_PRIORITY	10
+
+#define IRL2_IRQ	8
+#define IRL2_IPR_ADDR	INTC_IPRD
+#define IRL2_IPR_POS	1
+#define IRL2_PRIORITY	7
+
+#define IRL3_IRQ	11
+#define IRL3_IPR_ADDR	INTC_IPRD
+#define IRL3_IPR_POS	0
+#define IRL3_PRIORITY	4
+
+
+extern unsigned long sh03_isa_port2addr(unsigned long offset);
+
+extern void setup_sh03(void);
+extern void init_sh03_IRQ(void);
+extern void heartbeat_sh03(void);
+
+extern void sh03_rtc_gettimeofday(struct timeval *tv);
+extern int sh03_rtc_settimeofday(const struct timeval *tv);
+
+#endif /* _ASM_SH_IO_SH03_H */
diff --git a/include/asm-sh/sh03/sh03.h b/include/asm-sh/sh03/sh03.h
new file mode 100644
index 000000000000..19c40b80428d
--- /dev/null
+++ b/include/asm-sh/sh03/sh03.h
@@ -0,0 +1,18 @@
+#ifndef __ASM_SH_SH03_H
+#define __ASM_SH_SH03_H
+
+/*
+ * linux/include/asm-sh/sh03/sh03.h
+ *
+ * Copyright (C) 2004  Interface Co., Ltd. Saito.K
+ *
+ * Interface CTP/PCI-SH03 support
+ */
+
+#define PA_PCI_IO       (0xbe240000)    /* PCI I/O space */
+#define PA_PCI_MEM      (0xbd000000)    /* PCI MEM space */
+
+#define PCIPAR          (0xa4000cf8)    /* PCI Config address */
+#define PCIPDR          (0xa4000cfc)    /* PCI Config data    */
+
+#endif  /* __ASM_SH_SH03_H */