diff options
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_cmd_parser.c | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 4 |
2 files changed, 9 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c index 09932cab1a3f..db58c8d664c2 100644 --- a/drivers/gpu/drm/i915/i915_cmd_parser.c +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c @@ -448,6 +448,9 @@ static const struct drm_i915_reg_descriptor gen7_render_regs[] = { REG32(GEN7_3DPRIM_INSTANCE_COUNT), REG32(GEN7_3DPRIM_START_INSTANCE), REG32(GEN7_3DPRIM_BASE_VERTEX), + REG32(GEN7_GPGPU_DISPATCHDIMX), + REG32(GEN7_GPGPU_DISPATCHDIMY), + REG32(GEN7_GPGPU_DISPATCHDIMZ), REG64(GEN7_SO_NUM_PRIMS_WRITTEN(0)), REG64(GEN7_SO_NUM_PRIMS_WRITTEN(1)), REG64(GEN7_SO_NUM_PRIMS_WRITTEN(2)), @@ -1214,6 +1217,7 @@ int i915_cmd_parser_get_version(void) * MI_PREDICATE_SRC1 registers. * 3. Allow access to the GPGPU_THREADS_DISPATCHED register. * 4. L3 atomic chicken bits of HSW_SCRATCH1 and HSW_ROW_CHICKEN3. + * 5. GPGPU dispatch compute indirect registers. */ - return 4; + return 5; } diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 8d7be66d96bc..07588b63d434 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -536,6 +536,10 @@ #define GEN7_3DPRIM_START_INSTANCE 0x243C #define GEN7_3DPRIM_BASE_VERTEX 0x2440 +#define GEN7_GPGPU_DISPATCHDIMX 0x2500 +#define GEN7_GPGPU_DISPATCHDIMY 0x2504 +#define GEN7_GPGPU_DISPATCHDIMZ 0x2508 + #define OACONTROL 0x2360 #define _GEN7_PIPEA_DE_LOAD_SL 0x70068 |
