summaryrefslogtreecommitdiffstats
path: root/arch/unicore32/kernel/pci.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/unicore32/kernel/pci.c')
-rw-r--r--arch/unicore32/kernel/pci.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/unicore32/kernel/pci.c b/arch/unicore32/kernel/pci.c
index 65c265ee8e94..100eab842e66 100644
--- a/arch/unicore32/kernel/pci.c
+++ b/arch/unicore32/kernel/pci.c
@@ -75,27 +75,27 @@ void pci_puv3_preinit(void)
{
printk(KERN_DEBUG "PCI: PKUnity PCI Controller Initializing ...\n");
/* config PCI bridge base */
- writel(PKUNITY_PCIBRI_BASE, PCICFG_BRIBASE);
+ writel(io_v2p(PKUNITY_PCIBRI_BASE), PCICFG_BRIBASE);
writel(0, PCIBRI_AHBCTL0);
- writel(PKUNITY_PCIBRI_BASE | PCIBRI_BARx_MEM, PCIBRI_AHBBAR0);
+ writel(io_v2p(PKUNITY_PCIBRI_BASE) | PCIBRI_BARx_MEM, PCIBRI_AHBBAR0);
writel(0xFFFF0000, PCIBRI_AHBAMR0);
writel(0, PCIBRI_AHBTAR0);
writel(PCIBRI_CTLx_AT, PCIBRI_AHBCTL1);
- writel(PKUNITY_PCILIO_BASE | PCIBRI_BARx_IO, PCIBRI_AHBBAR1);
+ writel(io_v2p(PKUNITY_PCILIO_BASE) | PCIBRI_BARx_IO, PCIBRI_AHBBAR1);
writel(0xFFFF0000, PCIBRI_AHBAMR1);
writel(0x00000000, PCIBRI_AHBTAR1);
writel(PCIBRI_CTLx_PREF, PCIBRI_AHBCTL2);
- writel(PKUNITY_PCIMEM_BASE | PCIBRI_BARx_MEM, PCIBRI_AHBBAR2);
+ writel(io_v2p(PKUNITY_PCIMEM_BASE) | PCIBRI_BARx_MEM, PCIBRI_AHBBAR2);
writel(0xF8000000, PCIBRI_AHBAMR2);
writel(0, PCIBRI_AHBTAR2);
- writel(PKUNITY_PCIAHB_BASE | PCIBRI_BARx_MEM, PCIBRI_BAR1);
+ writel(io_v2p(PKUNITY_PCIAHB_BASE) | PCIBRI_BARx_MEM, PCIBRI_BAR1);
writel(PCIBRI_CTLx_AT | PCIBRI_CTLx_PREF, PCIBRI_PCICTL0);
- writel(PKUNITY_PCIAHB_BASE | PCIBRI_BARx_MEM, PCIBRI_PCIBAR0);
+ writel(io_v2p(PKUNITY_PCIAHB_BASE) | PCIBRI_BARx_MEM, PCIBRI_PCIBAR0);
writel(0xF8000000, PCIBRI_PCIAMR0);
writel(PKUNITY_SDRAM_BASE, PCIBRI_PCITAR0);
OpenPOWER on IntegriCloud