diff options
Diffstat (limited to 'arch/mips/kernel/irq-msc01.c')
| -rw-r--r-- | arch/mips/kernel/irq-msc01.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c index 97ebdc754b9e..63dfeb41796b 100644 --- a/arch/mips/kernel/irq-msc01.c +++ b/arch/mips/kernel/irq-msc01.c @@ -137,7 +137,7 @@ msc_bind_eic_interrupt (unsigned int irq, unsigned int set) #define shutdown_msc_irq disable_msc_irq -struct hw_interrupt_type msc_levelirq_type = { +struct irq_chip msc_levelirq_type = { .typename = "SOC-it-Level", .startup = startup_msc_irq, .shutdown = shutdown_msc_irq, @@ -147,7 +147,7 @@ struct hw_interrupt_type msc_levelirq_type = { .end = end_msc_irq, }; -struct hw_interrupt_type msc_edgeirq_type = { +struct irq_chip msc_edgeirq_type = { .typename = "SOC-it-Edge", .startup =startup_msc_irq, .shutdown = shutdown_msc_irq, @@ -174,14 +174,14 @@ void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq) switch (imp->im_type) { case MSC01_IRQ_EDGE: - irq_desc[base+n].handler = &msc_edgeirq_type; + irq_desc[base+n].chip = &msc_edgeirq_type; if (cpu_has_veic) MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT); else MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl); break; case MSC01_IRQ_LEVEL: - irq_desc[base+n].handler = &msc_levelirq_type; + irq_desc[base+n].chip = &msc_levelirq_type; if (cpu_has_veic) MSCIC_WRITE(MSC01_IC_SUP+n*8, 0); else |
