diff options
Diffstat (limited to 'arch/m68knommu')
31 files changed, 955 insertions, 416 deletions
diff --git a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig index f4b582cbb567..6abbbb8aac5e 100644 --- a/arch/m68knommu/Kconfig +++ b/arch/m68knommu/Kconfig @@ -53,6 +53,10 @@ config GENERIC_CALIBRATE_DELAY bool default y +config GENERIC_TIME + bool + default y + config TIME_LOW_RES bool default y @@ -707,8 +711,6 @@ source "drivers/Kconfig" source "fs/Kconfig" -source "kernel/Kconfig.instrumentation" - source "arch/m68knommu/Kconfig.debug" source "security/Kconfig" diff --git a/arch/m68knommu/Kconfig.debug b/arch/m68knommu/Kconfig.debug index 9ff47bd09aee..ed6d9a83bfdb 100644 --- a/arch/m68knommu/Kconfig.debug +++ b/arch/m68knommu/Kconfig.debug @@ -21,13 +21,6 @@ config BOOTPARAM_STRING default 'console=ttyS0,19200' depends on BOOTPARAM -config DUMPTOFLASH - bool "Panic/Dump to FLASH" - depends on COLDFIRE - help - Dump any panic of trap output into a flash memory segment - for later analysis. - config NO_KERNEL_MSG bool "Suppress Kernel BUG Messages" help diff --git a/arch/m68knommu/Makefile b/arch/m68knommu/Makefile index 30aa2553693d..e0b5f62e395c 100644 --- a/arch/m68knommu/Makefile +++ b/arch/m68knommu/Makefile @@ -61,17 +61,17 @@ MODEL := $(model-y) # for the selected cpu. ONLY need to define this for the non-base member # of the family. # -cpuclass-$(CONFIG_M5206) := 5307 -cpuclass-$(CONFIG_M5206e) := 5307 -cpuclass-$(CONFIG_M520x) := 5307 -cpuclass-$(CONFIG_M523x) := 5307 -cpuclass-$(CONFIG_M5249) := 5307 -cpuclass-$(CONFIG_M527x) := 5307 -cpuclass-$(CONFIG_M5272) := 5307 -cpuclass-$(CONFIG_M528x) := 5307 -cpuclass-$(CONFIG_M5307) := 5307 -cpuclass-$(CONFIG_M532x) := 5307 -cpuclass-$(CONFIG_M5407) := 5307 +cpuclass-$(CONFIG_M5206) := coldfire +cpuclass-$(CONFIG_M5206e) := coldfire +cpuclass-$(CONFIG_M520x) := coldfire +cpuclass-$(CONFIG_M523x) := coldfire +cpuclass-$(CONFIG_M5249) := coldfire +cpuclass-$(CONFIG_M527x) := coldfire +cpuclass-$(CONFIG_M5272) := coldfire +cpuclass-$(CONFIG_M528x) := coldfire +cpuclass-$(CONFIG_M5307) := coldfire +cpuclass-$(CONFIG_M532x) := coldfire +cpuclass-$(CONFIG_M5407) := coldfire cpuclass-$(CONFIG_M68328) := 68328 cpuclass-$(CONFIG_M68EZ328) := 68328 cpuclass-$(CONFIG_M68VZ328) := 68328 diff --git a/arch/m68knommu/defconfig b/arch/m68knommu/defconfig index 5a0ecaaee3b0..648113075f97 100644 --- a/arch/m68knommu/defconfig +++ b/arch/m68knommu/defconfig @@ -597,7 +597,6 @@ CONFIG_MSDOS_PARTITION=y # CONFIG_FULLDEBUG is not set # CONFIG_HIGHPROFILE is not set # CONFIG_BOOTPARAM is not set -# CONFIG_DUMPTOFLASH is not set # CONFIG_NO_KERNEL_MSG is not set # CONFIG_BDM_DISABLE is not set diff --git a/arch/m68knommu/kernel/m68k_ksyms.c b/arch/m68knommu/kernel/m68k_ksyms.c index f795062aba1e..53fad1490282 100644 --- a/arch/m68knommu/kernel/m68k_ksyms.c +++ b/arch/m68knommu/kernel/m68k_ksyms.c @@ -24,14 +24,6 @@ extern int dump_fpu(struct pt_regs *, elf_fpregset_t *); EXPORT_SYMBOL(__ioremap); EXPORT_SYMBOL(iounmap); EXPORT_SYMBOL(dump_fpu); -EXPORT_SYMBOL(strnlen); -EXPORT_SYMBOL(strrchr); -EXPORT_SYMBOL(strstr); -EXPORT_SYMBOL(strchr); -EXPORT_SYMBOL(strcat); -EXPORT_SYMBOL(strlen); -EXPORT_SYMBOL(strcmp); -EXPORT_SYMBOL(strncmp); EXPORT_SYMBOL(ip_fast_csum); @@ -46,9 +38,6 @@ EXPORT_SYMBOL(csum_partial_copy_nocheck); it's OK to leave it out of version control. */ EXPORT_SYMBOL(memcpy); EXPORT_SYMBOL(memset); -EXPORT_SYMBOL(memcmp); -EXPORT_SYMBOL(memscan); -EXPORT_SYMBOL(memmove); EXPORT_SYMBOL(__down_failed); EXPORT_SYMBOL(__down_failed_interruptible); diff --git a/arch/m68knommu/kernel/setup.c b/arch/m68knommu/kernel/setup.c index 332345d7675d..81507c53d4a9 100644 --- a/arch/m68knommu/kernel/setup.c +++ b/arch/m68knommu/kernel/setup.c @@ -64,9 +64,6 @@ void (*mach_power_off)(void); #ifdef CONFIG_M68VZ328 #define CPU "MC68VZ328" #endif -#ifdef CONFIG_M68332 - #define CPU "MC68332" -#endif #ifdef CONFIG_M68360 #define CPU "MC68360" #endif diff --git a/arch/m68knommu/kernel/syscalltable.S b/arch/m68knommu/kernel/syscalltable.S index 9620093514bc..1b02b8820068 100644 --- a/arch/m68knommu/kernel/syscalltable.S +++ b/arch/m68knommu/kernel/syscalltable.S @@ -336,7 +336,7 @@ ENTRY(sys_call_table) .long sys_epoll_pwait /* 315 */ .long sys_utimensat .long sys_signalfd - .long sys_timerfd + .long sys_ni_syscall .long sys_eventfd .long sys_fallocate /* 320 */ diff --git a/arch/m68knommu/kernel/time.c b/arch/m68knommu/kernel/time.c index 77e5375a2dd5..89cdbcaeb45f 100644 --- a/arch/m68knommu/kernel/time.c +++ b/arch/m68knommu/kernel/time.c @@ -22,7 +22,6 @@ #include <linux/timex.h> #include <asm/machdep.h> -#include <asm/io.h> #include <asm/irq_regs.h> #define TICK_SIZE (tick_nsec / 1000) @@ -66,29 +65,6 @@ irqreturn_t arch_timer_interrupt(int irq, void *dummy) else last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */ } -#ifdef CONFIG_HEARTBEAT - /* use power LED as a heartbeat instead -- much more useful - for debugging -- based on the version for PReP by Cort */ - /* acts like an actual heart beat -- ie thump-thump-pause... */ - if (mach_heartbeat) { - static unsigned cnt = 0, period = 0, dist = 0; - - if (cnt == 0 || cnt == dist) - mach_heartbeat( 1 ); - else if (cnt == 7 || cnt == dist+7) - mach_heartbeat( 0 ); - - if (++cnt > period) { - cnt = 0; - /* The hyperbolic function below modifies the heartbeat period - * length in dependency of the current (5min) load. It goes - * through the points f(0)=126, f(1)=86, f(5)=51, - * f(inf)->30. */ - period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT))) + 30; - dist = period / 4; - } - } -#endif /* CONFIG_HEARTBEAT */ write_sequnlock(&xtime_lock); return(IRQ_HANDLED); @@ -112,60 +88,3 @@ void time_init(void) hw_timer_init(); } -/* - * This version of gettimeofday has near microsecond resolution. - */ -void do_gettimeofday(struct timeval *tv) -{ - unsigned long flags; - unsigned long seq; - unsigned long usec, sec; - - do { - seq = read_seqbegin_irqsave(&xtime_lock, flags); - usec = hw_timer_offset(); - sec = xtime.tv_sec; - usec += (xtime.tv_nsec / 1000); - } while (read_seqretry_irqrestore(&xtime_lock, seq, flags)); - - while (usec >= 1000000) { - usec -= 1000000; - sec++; - } - - tv->tv_sec = sec; - tv->tv_usec = usec; -} - -EXPORT_SYMBOL(do_gettimeofday); - -int do_settimeofday(struct timespec *tv) -{ - time_t wtm_sec, sec = tv->tv_sec; - long wtm_nsec, nsec = tv->tv_nsec; - - if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC) - return -EINVAL; - - write_seqlock_irq(&xtime_lock); - /* - * This is revolting. We need to set the xtime.tv_usec - * correctly. However, the value in this location is - * is value at the last tick. - * Discover what correction gettimeofday - * would have done, and then undo it! - */ - nsec -= (hw_timer_offset() * 1000); - - wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec); - wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec); - - set_normalized_timespec(&xtime, sec, nsec); - set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec); - - ntp_clear(); - write_sequnlock_irq(&xtime_lock); - clock_was_set(); - return 0; -} -EXPORT_SYMBOL(do_settimeofday); diff --git a/arch/m68knommu/kernel/vmlinux.lds.S b/arch/m68knommu/kernel/vmlinux.lds.S index 07a0055602f4..b44edb08e212 100644 --- a/arch/m68knommu/kernel/vmlinux.lds.S +++ b/arch/m68knommu/kernel/vmlinux.lds.S @@ -143,9 +143,9 @@ SECTIONS { . = ALIGN(4096); __init_begin = .; _sinittext = .; - *(.init.text) + INIT_TEXT _einittext = .; - *(.init.data) + INIT_DATA . = ALIGN(16); __setup_start = .; *(.init.setup) @@ -170,8 +170,8 @@ SECTIONS { } > INIT /DISCARD/ : { - *(.exit.text) - *(.exit.data) + EXIT_TEXT + EXIT_DATA *(.exitcall.exit) } diff --git a/arch/m68knommu/lib/memcpy.c b/arch/m68knommu/lib/memcpy.c index 0d5577569e4c..b50dbcad4746 100644 --- a/arch/m68knommu/lib/memcpy.c +++ b/arch/m68knommu/lib/memcpy.c @@ -1,6 +1,5 @@ #include <linux/types.h> -#include <linux/autoconf.h> void * memcpy(void * to, const void * from, size_t n) { diff --git a/arch/m68knommu/platform/5206/config.c b/arch/m68knommu/platform/5206/config.c index b3c4dd4cc135..53a5920c2b71 100644 --- a/arch/m68knommu/platform/5206/config.c +++ b/arch/m68knommu/platform/5206/config.c @@ -13,12 +13,11 @@ #include <linux/param.h> #include <linux/init.h> #include <linux/interrupt.h> -#include <asm/dma.h> +#include <linux/io.h> #include <asm/machdep.h> #include <asm/coldfire.h> -#include <asm/mcftimer.h> #include <asm/mcfsim.h> -#include <asm/mcfdma.h> +#include <asm/mcfuart.h> /***************************************************************************/ @@ -26,15 +25,51 @@ void coldfire_reset(void); /***************************************************************************/ -/* - * DMA channel base address table. - */ -unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { - MCF_MBAR + MCFDMA_BASE0, - MCF_MBAR + MCFDMA_BASE1, +static struct mcf_platform_uart m5206_uart_platform[] = { + { + .mapbase = MCF_MBAR + MCFUART_BASE1, + .irq = 73, + }, + { + .mapbase = MCF_MBAR + MCFUART_BASE2, + .irq = 74, + }, + { }, +}; + +static struct platform_device m5206_uart = { + .name = "mcfuart", + .id = 0, + .dev.platform_data = m5206_uart_platform, +}; + +static struct platform_device *m5206_devices[] __initdata = { + &m5206_uart, }; -unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; +/***************************************************************************/ + +static void __init m5206_uart_init_line(int line, int irq) +{ + if (line == 0) { + writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); + writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); + mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1); + } else if (line == 1) { + writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); + writeb(irq, MCFUART_BASE2 + MCFUART_UIVR); + mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2); + } +} + +static void __init m5206_uarts_init(void) +{ + const int nrlines = ARRAY_SIZE(m5206_uart_platform); + int line; + + for (line = 0; (line < nrlines); line++) + m5206_uart_init_line(line, m5206_uart_platform[line].irq); +} /***************************************************************************/ @@ -74,24 +109,21 @@ void mcf_settimericr(unsigned int timer, unsigned int level) /***************************************************************************/ -int mcf_timerirqpending(int timer) +void __init config_BSP(char *commandp, int size) { - unsigned int imr = 0; - - switch (timer) { - case 1: imr = MCFSIM_IMR_TIMER1; break; - case 2: imr = MCFSIM_IMR_TIMER2; break; - default: break; - } - return (mcf_getipr() & imr); + mcf_setimr(MCFSIM_IMR_MASKALL); + mach_reset = coldfire_reset; } /***************************************************************************/ -void config_BSP(char *commandp, int size) +static int __init init_BSP(void) { - mcf_setimr(MCFSIM_IMR_MASKALL); - mach_reset = coldfire_reset; + m5206_uarts_init(); + platform_add_devices(m5206_devices, ARRAY_SIZE(m5206_devices)); + return 0; } +arch_initcall(init_BSP); + /***************************************************************************/ diff --git a/arch/m68knommu/platform/5206e/config.c b/arch/m68knommu/platform/5206e/config.c index f84a4aea8cb6..a6692e958f6b 100644 --- a/arch/m68knommu/platform/5206e/config.c +++ b/arch/m68knommu/platform/5206e/config.c @@ -10,8 +10,9 @@ #include <linux/kernel.h> #include <linux/param.h> +#include <linux/init.h> #include <linux/interrupt.h> -#include <asm/dma.h> +#include <linux/io.h> #include <asm/machdep.h> #include <asm/coldfire.h> #include <asm/mcfsim.h> @@ -23,15 +24,51 @@ void coldfire_reset(void); /***************************************************************************/ -/* - * DMA channel base address table. - */ -unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { - MCF_MBAR + MCFDMA_BASE0, - MCF_MBAR + MCFDMA_BASE1, +static struct mcf_platform_uart m5206e_uart_platform[] = { + { + .mapbase = MCF_MBAR + MCFUART_BASE1, + .irq = 73, + }, + { + .mapbase = MCF_MBAR + MCFUART_BASE2, + .irq = 74, + }, + { }, +}; + +static struct platform_device m5206e_uart = { + .name = "mcfuart", + .id = 0, + .dev.platform_data = m5206e_uart_platform, }; -unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; +static struct platform_device *m5206e_devices[] __initdata = { + &m5206e_uart, +}; + +/***************************************************************************/ + +static void __init m5206_uart_init_line(int line, int irq) +{ + if (line == 0) { + writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); + writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); + mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1); + } else if (line == 1) { + writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); + writeb(irq, MCFUART_BASE2 + MCFUART_UIVR); + mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2); + } +} + +static void __init m5206e_uarts_init(void) +{ + const int nrlines = ARRAY_SIZE(m5206e_uart_platform); + int line; + + for (line = 0; (line < nrlines); line++) + m5206e_uart_init_line(line, m5206e_uart_platform[line].irq); +} /***************************************************************************/ @@ -71,21 +108,7 @@ void mcf_settimericr(unsigned int timer, unsigned int level) /***************************************************************************/ -int mcf_timerirqpending(int timer) -{ - unsigned int imr = 0; - - switch (timer) { - case 1: imr = MCFSIM_IMR_TIMER1; break; - case 2: imr = MCFSIM_IMR_TIMER2; break; - default: break; - } - return (mcf_getipr() & imr); -} - -/***************************************************************************/ - -void config_BSP(char *commandp, int size) +void __init config_BSP(char *commandp, int size) { mcf_setimr(MCFSIM_IMR_MASKALL); @@ -99,3 +122,14 @@ void config_BSP(char *commandp, int size) } /***************************************************************************/ + +static int __init init_BSP(void) +{ + m5206e_uarts_init(); + platform_add_devices(m5206e_devices, ARRAY_SIZE(m5206e_devices)); + return 0; +} + +arch_initcall(init_BSP); + +/***************************************************************************/ diff --git a/arch/m68knommu/platform/520x/config.c b/arch/m68knommu/platform/520x/config.c index 6edbd41261cc..06d887cdcbfb 100644 --- a/arch/m68knommu/platform/520x/config.c +++ b/arch/m68knommu/platform/520x/config.c @@ -5,7 +5,7 @@ * * Copyright (C) 2005, Freescale (www.freescale.com) * Copyright (C) 2005, Intec Automation (mike@steroidmicros.com) - * Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com) + * Copyright (C) 1999-2007, Greg Ungerer (gerg@snapgear.com) * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com) */ @@ -13,21 +13,93 @@ #include <linux/kernel.h> #include <linux/param.h> +#include <linux/init.h> #include <linux/interrupt.h> +#include <linux/io.h> #include <asm/machdep.h> -#include <asm/dma.h> +#include <asm/coldfire.h> +#include <asm/mcfsim.h> +#include <asm/mcfuart.h> /***************************************************************************/ -/* - * DMA channel base address table. - */ -unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS]; -unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; +void coldfire_reset(void); /***************************************************************************/ -void coldfire_reset(void); +static struct mcf_platform_uart m520x_uart_platform[] = { + { + .mapbase = MCF_MBAR + MCFUART_BASE1, + .irq = MCFINT_VECBASE + MCFINT_UART0, + }, + { + .mapbase = MCF_MBAR + MCFUART_BASE2, + .irq = MCFINT_VECBASE + MCFINT_UART1, + }, + { + .mapbase = MCF_MBAR + MCFUART_BASE3, + .irq = MCFINT_VECBASE + MCFINT_UART2, + }, + { }, +}; + +static struct platform_device m520x_uart = { + .name = "mcfuart", + .id = 0, + .dev.platform_data = m520x_uart_platform, +}; + +static struct platform_device *m520x_devices[] __initdata = { + &m520x_uart, +}; + +/***************************************************************************/ + +#define INTC0 (MCF_MBAR + MCFICM_INTC0) + +static void __init m520x_uart_init_line(int line, int irq) +{ + u32 imr; + u16 par; + u8 par2; + + writeb(0x03, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line); + + imr = readl(INTC0 + MCFINTC_IMRL); + imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1); + writel(imr, INTC0 + MCFINTC_IMRL); + + switch (line) { + case 0: + par = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART); + par |= MCF_GPIO_PAR_UART_PAR_UTXD0 | + MCF_GPIO_PAR_UART_PAR_URXD0; + writew(par, MCF_IPSBAR + MCF_GPIO_PAR_UART); + break; + case 1: + par = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART); + par |= MCF_GPIO_PAR_UART_PAR_UTXD1 | + MCF_GPIO_PAR_UART_PAR_URXD1; + writew(par, MCF_IPSBAR + MCF_GPIO_PAR_UART); + break; + case 2: + par2 = readb(MCF_IPSBAR + MCF_GPIO_PAR_FECI2C); + par2 &= ~0x0F; + par2 |= MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 | + MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2; + writeb(par2, MCF_IPSBAR + MCF_GPIO_PAR_FECI2C); + break; + } +} + +static void __init m520x_uarts_init(void) +{ + const int nrlines = ARRAY_SIZE(m520x_uart_platform); + int line; + + for (line = 0; (line < nrlines); line++) + m520x_uart_init_line(line, m520x_uart_platform[line].irq); +} /***************************************************************************/ @@ -42,9 +114,20 @@ void mcf_autovector(unsigned int vec) /***************************************************************************/ -void config_BSP(char *commandp, int size) +void __init config_BSP(char *commandp, int size) { mach_reset = coldfire_reset; + m520x_uarts_init(); } /***************************************************************************/ + +static int __init init_BSP(void) +{ + platform_add_devices(m520x_devices, ARRAY_SIZE(m520x_devices)); + return 0; +} + +arch_initcall(init_BSP); + +/***************************************************************************/ diff --git a/arch/m68knommu/platform/523x/config.c b/arch/m68knommu/platform/523x/config.c index e7f80c8e8636..13f02611ea23 100644 --- a/arch/m68knommu/platform/523x/config.c +++ b/arch/m68knommu/platform/523x/config.c @@ -16,11 +16,11 @@ #include <linux/param.h> #include <linux/init.h> #include <linux/interrupt.h> -#include <asm/dma.h> +#include <linux/io.h> #include <asm/machdep.h> #include <asm/coldfire.h> #include <asm/mcfsim.h> -#include <asm/mcfdma.h> +#include <asm/mcfuart.h> /***************************************************************************/ @@ -28,14 +28,58 @@ void coldfire_reset(void); /***************************************************************************/ -/* - * DMA channel base address table. - */ -unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { - MCF_MBAR + MCFDMA_BASE0, +static struct mcf_platform_uart m523x_uart_platform[] = { + { + .mapbase = MCF_MBAR + MCFUART_BASE1, + .irq = MCFINT_VECBASE + MCFINT_UART0, + }, + { + .mapbase = MCF_MBAR + MCFUART_BASE2, + .irq = MCFINT_VECBASE + MCFINT_UART0 + 1, + }, + { + .mapbase = MCF_MBAR + MCFUART_BASE3, + .irq = MCFINT_VECBASE + MCFINT_UART0 + 2, + }, + { }, +}; + +static struct platform_device m523x_uart = { + .name = "mcfuart", + .id = 0, + .dev.platform_data = m523x_uart_platform, +}; + +static struct platform_device *m523x_devices[] __initdata = { + &m523x_uart, }; -unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; +/***************************************************************************/ + +#define INTC0 (MCF_MBAR + MCFICM_INTC0) + +static void __init m523x_uart_init_line(int line, int irq) +{ + u32 imr; + + if ((line < 0) || (line > 2)) + return; + + writeb(0x30+line, (INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line)); + + imr = readl(INTC0 + MCFINTC_IMRL); + imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1); + writel(imr, INTC0 + MCFINTC_IMRL); +} + +static void __init m523x_uarts_init(void) +{ + const int nrlines = ARRAY_SIZE(m523x_uart_platform); + int line; + + for (line = 0; (line < nrlines); line++) + m523x_uart_init_line(line, m523x_uart_platform[line].irq); +} /***************************************************************************/ @@ -49,15 +93,26 @@ void mcf_disableall(void) void mcf_autovector(unsigned int vec) { - /* Everything is auto-vectored on the 5272 */ + /* Everything is auto-vectored on the 523x */ } /***************************************************************************/ -void config_BSP(char *commandp, int size) +void __init config_BSP(char *commandp, int size) { mcf_disableall(); mach_reset = coldfire_reset; + m523x_uarts_init(); } /***************************************************************************/ + +static int __init init_BSP(void) +{ + platform_add_devices(m523x_devices, ARRAY_SIZE(m523x_devices)); + return 0; +} + +arch_initcall(init_BSP); + +/***************************************************************************/ diff --git a/arch/m68knommu/platform/5249/config.c b/arch/m68knommu/platform/5249/config.c index d4d39435cb15..d299f7b8768a 100644 --- a/arch/m68knommu/platform/5249/config.c +++ b/arch/m68knommu/platform/5249/config.c @@ -12,11 +12,11 @@ #include <linux/param.h> #include <linux/init.h> #include <linux/interrupt.h> -#include <asm/dma.h> +#include <linux/io.h> #include <asm/machdep.h> #include <asm/coldfire.h> #include <asm/mcfsim.h> -#include <asm/mcfdma.h> +#include <asm/mcfuart.h> /***************************************************************************/ @@ -24,17 +24,51 @@ void coldfire_reset(void); /***************************************************************************/ -/* - * DMA channel base address table. - */ -unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { - MCF_MBAR + MCFDMA_BASE0, - MCF_MBAR + MCFDMA_BASE1, - MCF_MBAR + MCFDMA_BASE2, - MCF_MBAR + MCFDMA_BASE3, +static struct mcf_platform_uart m5249_uart_platform[] = { + { + .mapbase = MCF_MBAR + MCFUART_BASE1, + .irq = 73, + }, + { + .mapbase = MCF_MBAR + MCFUART_BASE2, + .irq = 74, + } +}; + +static struct platform_device m5249_uart = { + .name = "mcfuart", + .id = 0, + .dev.platform_data = m5249_uart_platform, +}; + +static struct platform_device *m5249_devices[] __initdata = { + &m5249_uart, }; -unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; +/***************************************************************************/ + +static void __init m5249_uart_init_line(int line, int irq) +{ + if (line == 0) { + writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); + writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); + mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1); + } else if (line == 1) { + writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); + writeb(irq, MCFUART_BASE2 + MCFUART_UIVR); + mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2); + } +} + +static void __init m5249_uarts_init(void) +{ + const int nrlines = ARRAY_SIZE(m5249_uart_platform); + int line; + + for (line = 0; (line < nrlines); line++) + m5249_uart_init_line(line, m5249_uart_platform[line].irq); +} + /***************************************************************************/ @@ -71,24 +105,21 @@ void mcf_settimericr(unsigned int timer, unsigned int level) /***************************************************************************/ -int mcf_timerirqpending(int timer) +void __init config_BSP(char *commandp, int size) { - unsigned int imr = 0; - - switch (timer) { - case 1: imr = MCFSIM_IMR_TIMER1; break; - case 2: imr = MCFSIM_IMR_TIMER2; break; - default: break; - } - return (mcf_getipr() & imr); + mcf_setimr(MCFSIM_IMR_MASKALL); + mach_reset = coldfire_reset; } /***************************************************************************/ -void config_BSP(char *commandp, int size) +static int __init init_BSP(void) { - mcf_setimr(MCFSIM_IMR_MASKALL); - mach_reset = coldfire_reset; + m5249_uarts_init(); + platform_add_devices(m5249_devices, ARRAY_SIZE(m5249_devices)); + return 0; } +arch_initcall(init_BSP); + /***************************************************************************/ diff --git a/arch/m68knommu/platform/5272/config.c b/arch/m68knommu/platform/5272/config.c index 634a6375e4a5..2aca599a1ca7 100644 --- a/arch/m68knommu/platform/5272/config.c +++ b/arch/m68knommu/platform/5272/config.c @@ -13,11 +13,11 @@ #include <linux/param.h> #include <linux/init.h> #include <linux/interrupt.h> -#include <asm/dma.h> +#include <linux/io.h> #include <asm/machdep.h> #include <asm/coldfire.h> #include <asm/mcfsim.h> -#include <asm/mcfdma.h> +#include <asm/mcfuart.h> /***************************************************************************/ @@ -37,14 +37,57 @@ unsigned char ledbank = 0xff; /***************************************************************************/ -/* - * DMA channel base address table. - */ -unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { - MCF_MBAR + MCFDMA_BASE0, +static struct mcf_platform_uart m5272_uart_platform[] = { + { + .mapbase = MCF_MBAR + MCFUART_BASE1, + .irq = 73, + }, + { + .mapbase = MCF_MBAR + MCFUART_BASE2, + .irq = 74, + }, + { }, }; -unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; +static struct platform_device m5272_uart = { + .name = "mcfuart", + .id = 0, + .dev.platform_data = m5272_uart_platform, +}; + +static struct platform_device *m5272_devices[] __initdata = { + &m5272_uart, +}; + +/***************************************************************************/ + +static void __init m5272_uart_init_line(int line, int irq) +{ + u32 v; + + if ((line >= 0) && (line < 2)) { + v = (line) ? 0x0e000000 : 0xe0000000; + writel(v, MCF_MBAR + MCFSIM_ICR2); + + /* Enable the output lines for the serial ports */ + v = readl(MCF_MBAR + MCFSIM_PBCNT); + v = (v & ~0x000000ff) | 0x00000055; + writel(v, MCF_MBAR + MCFSIM_PBCNT); + + v = readl(MCF_MBAR + MCFSIM_PDCNT); + v = (v & ~0x000003fc) | 0x000002a8; + writel(v, MCF_MBAR + MCFSIM_PDCNT); + } +} + +static void __init m5272_uarts_init(void) +{ + const int nrlines = ARRAY_SIZE(m5272_uart_platform); + int line; + + for (line = 0; (line < nrlines); line++) + m5272_uart_init_line(line, m5272_uart_platform[line].irq); +} /***************************************************************************/ @@ -80,20 +123,7 @@ void mcf_settimericr(int timer, int level) /***************************************************************************/ -int mcf_timerirqpending(int timer) -{ - volatile unsigned long *icrp; - - if ((timer >= 1 ) && (timer <= 4)) { - icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1); - return (*icrp & (0x8 << ((4 - timer) * 4))); - } - return 0; -} - -/***************************************************************************/ - -void config_BSP(char *commandp, int size) +void __init config_BSP(char *commandp, int size) { #if defined (CONFIG_MOD5272) volatile unsigned char *pivrp; @@ -125,3 +155,14 @@ void config_BSP(char *commandp, int size) } /***************************************************************************/ + +static int __init init_BSP(void) +{ + m5272_uarts_init(); + platform_add_devices(m5272_devices, ARRAY_SIZE(m5272_devices)); + return 0; +} + +arch_initcall(init_BSP); + +/***************************************************************************/ diff --git a/arch/m68knommu/platform/527x/config.c b/arch/m68knommu/platform/527x/config.c index 9cbfbc68ae4f..73cd1aef4a90 100644 --- a/arch/m68knommu/platform/527x/config.c +++ b/arch/m68knommu/platform/527x/config.c @@ -16,11 +16,11 @@ #include <linux/param.h> #include <linux/init.h> #include <linux/interrupt.h> -#include <asm/dma.h> +#include <linux/io.h> #include <asm/machdep.h> #include <asm/coldfire.h> #include <asm/mcfsim.h> -#include <asm/mcfdma.h> +#include <asm/mcfuart.h> /***************************************************************************/ @@ -28,14 +28,72 @@ void coldfire_reset(void); /***************************************************************************/ -/* - * DMA channel base address table. - */ -unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { - MCF_MBAR + MCFDMA_BASE0, +static struct mcf_platform_uart m527x_uart_platform[] = { + { + .mapbase = MCF_MBAR + MCFUART_BASE1, + .irq = MCFINT_VECBASE + MCFINT_UART0, + }, + { + .mapbase = MCF_MBAR + MCFUART_BASE2, + .irq = MCFINT_VECBASE + MCFINT_UART1, + }, + { + .mapbase = MCF_MBAR + MCFUART_BASE3, + .irq = MCFINT_VECBASE + MCFINT_UART2, + }, + { }, }; -unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; +static struct platform_device m527x_uart = { + .name = "mcfuart", + .id = 0, + .dev.platform_data = m527x_uart_platform, +}; + +static struct platform_device *m527x_devices[] __initdata = { + &m527x_uart, +}; + +/***************************************************************************/ + +#define INTC0 (MCF_MBAR + MCFICM_INTC0) + +static void __init m527x_uart_init_line(int line, int irq) +{ + u16 sepmask; + u32 imr; + + if ((line < 0) || (line > 2)) + return; + + /* level 6, line based priority */ + writeb(0x30+line, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line); + + imr = readl(INTC0 + MCFINTC_IMRL); + imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1); + writel(imr, INTC0 + MCFINTC_IMRL); + + /* + * External Pin Mask Setting & Enable External Pin for Interface + */ + sepmask = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART); + if (line == 0) + sepmask |= UART0_ENABLE_MASK; + else if (line == 1) + sepmask |= UART1_ENABLE_MASK; + else if (line == 2) + sepmask |= UART2_ENABLE_MASK; + writew(sepmask, MCF_IPSBAR + MCF_GPIO_PAR_UART); +} + +static void __init m527x_uarts_init(void) +{ + const int nrlines = ARRAY_SIZE(m527x_uart_platform); + int line; + + for (line = 0; (line < nrlines); line++) + m527x_uart_init_line(line, m527x_uart_platform[line].irq); +} /***************************************************************************/ @@ -54,10 +112,21 @@ void mcf_autovector(unsigned int vec) /***************************************************************************/ -void config_BSP(char *commandp, int size) +void __init config_BSP(char *commandp, int size) { mcf_disableall(); mach_reset = coldfire_reset; } /***************************************************************************/ + +static int __init init_BSP(void) +{ + m527x_uarts_init(); + platform_add_devices(m527x_devices, ARRAY_SIZE(m527x_devices)); + return 0; +} + +arch_initcall(init_BSP); + +/***************************************************************************/ diff --git a/arch/m68knommu/platform/528x/config.c b/arch/m68knommu/platform/528x/config.c index acbd43486d97..036e1b73d944 100644 --- a/arch/m68knommu/platform/528x/config.c +++ b/arch/m68knommu/platform/528x/config.c @@ -16,11 +16,15 @@ #include <linux/param.h> #include <linux/init.h> #include <linux/interrupt.h> -#include <asm/dma.h> +#include <linux/platform_device.h> +#include <linux/spi/spi.h> +#include <linux/spi/flash.h> +#include <linux/io.h> #include <asm/machdep.h> #include <asm/coldfire.h> #include <asm/mcfsim.h> -#include <asm/mcfdma.h> +#include <asm/mcfuart.h> +#include <asm/mcfqspi.h> /***************************************************************************/ @@ -28,14 +32,67 @@ void coldfire_reset(void); /***************************************************************************/ -/* - * DMA channel base address table. - */ -unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { - MCF_MBAR + MCFDMA_BASE0, +static struct mcf_platform_uart m528x_uart_platform[] = { + { + .mapbase = MCF_MBAR + MCFUART_BASE1, + .irq = MCFINT_VECBASE + MCFINT_UART0, + }, + { + .mapbase = MCF_MBAR + MCFUART_BASE2, + .irq = MCFINT_VECBASE + MCFINT_UART0 + 1, + }, + { + .mapbase = MCF_MBAR + MCFUART_BASE3, + .irq = MCFINT_VECBASE + MCFINT_UART0 + 2, + }, + { }, }; -unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; +static struct platform_device m528x_uart = { + .name = "mcfuart", + .id = 0, + .dev.platform_data = m528x_uart_platform, +}; + +static struct platform_device *m528x_devices[] __initdata = { + &m528x_uart, +}; + +/***************************************************************************/ + +#define INTC0 (MCF_MBAR + MCFICM_INTC0) + +static void __init m528x_uart_init_line(int line, int irq) +{ + u8 port; + u32 imr; + + if ((line < 0) || (line > 2)) + return; + + /* level 6, line based priority */ + writeb(0x30+line, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line); + + imr = readl(INTC0 + MCFINTC_IMRL); + imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1); + writel(imr, INTC0 + MCFINTC_IMRL); + + /* make sure PUAPAR is set for UART0 and UART1 */ + if (line < 2) { + port = readb(MCF_MBAR + MCF5282_GPIO_PUAPAR); + port |= (0x03 << (line * 2)); + writeb(port, MCF_MBAR + MCF5282_GPIO_PUAPAR); + } +} + +static void __init m528x_uarts_init(void) +{ + const int nrlines = ARRAY_SIZE(m528x_uart_platform); + int line; + + for (line = 0; (line < nrlines); line++) + m528x_uart_init_line(line, m528x_uart_platform[line].irq); +} /***************************************************************************/ @@ -54,10 +111,21 @@ void mcf_autovector(unsigned int vec) /***************************************************************************/ -void config_BSP(char *commandp, int size) +void __init config_BSP(char *commandp, int size) { mcf_disableall(); mach_reset = coldfire_reset; } /***************************************************************************/ + +static int __init init_BSP(void) +{ + m528x_uarts_init(); + platform_add_devices(m528x_devices, ARRAY_SIZE(m528x_devices)); + return 0; +} + +arch_initcall(init_BSP); + +/***************************************************************************/ diff --git a/arch/m68knommu/platform/5307/Makefile b/arch/m68knommu/platform/5307/Makefile index 5b600530c8d2..580fd6658d7c 100644 --- a/arch/m68knommu/platform/5307/Makefile +++ b/arch/m68knommu/platform/5307/Makefile @@ -16,17 +16,5 @@ ifdef CONFIG_FULLDEBUG EXTRA_AFLAGS += -DDEBUGGER_COMPATIBLE_CACHE=1 endif -obj-$(CONFIG_COLDFIRE) += entry.o vectors.o -obj-$(CONFIG_M5206) += timers.o -obj-$(CONFIG_M5206e) += timers.o -obj-$(CONFIG_M520x) += pit.o -obj-$(CONFIG_M523x) += pit.o -obj-$(CONFIG_M5249) += timers.o -obj-$(CONFIG_M527x) += pit.o -obj-$(CONFIG_M5272) += timers.o -obj-$(CONFIG_M5307) += config.o timers.o -obj-$(CONFIG_M532x) += timers.o -obj-$(CONFIG_M528x) += pit.o -obj-$(CONFIG_M5407) += timers.o +obj-y += config.o -extra-y := head.o diff --git a/arch/m68knommu/platform/5307/config.c b/arch/m68knommu/platform/5307/config.c index 6040821e637d..92dc862fa826 100644 --- a/arch/m68knommu/platform/5307/config.c +++ b/arch/m68knommu/platform/5307/config.c @@ -13,11 +13,11 @@ #include <linux/param.h> #include <linux/init.h> #include <linux/interrupt.h> -#include <asm/dma.h> +#include <linux/io.h> #include <asm/machdep.h> #include <asm/coldfire.h> #include <asm/mcfsim.h> -#include <asm/mcfdma.h> +#include <asm/mcfuart.h> #include <asm/mcfwdebug.h> /***************************************************************************/ @@ -38,17 +38,51 @@ unsigned char ledbank = 0xff; /***************************************************************************/ -/* - * DMA channel base address table. - */ -unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { - MCF_MBAR + MCFDMA_BASE0, - MCF_MBAR + MCFDMA_BASE1, - MCF_MBAR + MCFDMA_BASE2, - MCF_MBAR + MCFDMA_BASE3, +static struct mcf_platform_uart m5307_uart_platform[] = { + { + .mapbase = MCF_MBAR + MCFUART_BASE1, + .irq = 73, + }, + { + .mapbase = MCF_MBAR + MCFUART_BASE2, + .irq = 74, + }, + { }, +}; + +static struct platform_device m5307_uart = { + .name = "mcfuart", + .id = 0, + .dev.platform_data = m5307_uart_platform, }; -unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; +static struct platform_device *m5307_devices[] __initdata = { + &m5307_uart, +}; + +/***************************************************************************/ + +static void __init m5307_uart_init_line(int line, int irq) +{ + if (line == 0) { + writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); + writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); + mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1); + } else if (line == 1) { + writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); + writeb(irq, MCFUART_BASE2 + MCFUART_UIVR); + mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2); + } +} + +static void __init m5307_uarts_init(void) +{ + const int nrlines = ARRAY_SIZE(m5307_uart_platform); + int line; + + for (line = 0; (line < nrlines); line++) + m5307_uart_init_line(line, m5307_uart_platform[line].irq); +} /***************************************************************************/ @@ -85,21 +119,7 @@ void mcf_settimericr(unsigned int timer, unsigned int level) /***************************************************************************/ -int mcf_timerirqpending(int timer) -{ - unsigned int imr = 0; - - switch (timer) { - case 1: imr = MCFSIM_IMR_TIMER1; break; - case 2: imr = MCFSIM_IMR_TIMER2; break; - default: break; - } - return (mcf_getipr() & imr); -} - -/***************************************************************************/ - -void config_BSP(char *commandp, int size) +void __init config_BSP(char *commandp, int size) { mcf_setimr(MCFSIM_IMR_MASKALL); @@ -117,7 +137,7 @@ void config_BSP(char *commandp, int size) mach_reset = coldfire_reset; -#ifdef MCF_BDM_DISABLE +#ifdef CONFIG_BDM_DISABLE /* * Disable the BDM clocking. This also turns off most of the rest of * the BDM device. This is good for EMC reasons. This option is not @@ -128,3 +148,14 @@ void config_BSP(char *commandp, int size) } /***************************************************************************/ + +static int __init init_BSP(void) +{ + m5307_uarts_init(); + platform_add_devices(m5307_devices, ARRAY_SIZE(m5307_devices)); + return 0; +} + +arch_initcall(init_BSP); + +/***************************************************************************/ diff --git a/arch/m68knommu/platform/532x/config.c b/arch/m68knommu/platform/532x/config.c index f77328b7b6db..4f44b632045b 100644 --- a/arch/m68knommu/platform/532x/config.c +++ b/arch/m68knommu/platform/532x/config.c @@ -21,10 +21,11 @@ #include <linux/param.h> #include <linux/init.h> #include <linux/interrupt.h> -#include <asm/dma.h> +#include <linux/io.h> #include <asm/machdep.h> #include <asm/coldfire.h> #include <asm/mcfsim.h> +#include <asm/mcfuart.h> #include <asm/mcfdma.h> #include <asm/mcfwdebug.h> @@ -38,11 +39,60 @@ extern unsigned int mcf_timerlevel; /***************************************************************************/ -/* - * DMA channel base address table. - */ -unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { }; -unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; +static struct mcf_platform_uart m532x_uart_platform[] = { + { + .mapbase = MCF_MBAR + MCFUART_BASE1, + .irq = MCFINT_VECBASE + MCFINT_UART0, + }, + { + .mapbase = MCF_MBAR + MCFUART_BASE2, + .irq = MCFINT_VECBASE + MCFINT_UART1, + }, + { + .mapbase = MCF_MBAR + MCFUART_BASE3, + .irq = MCFINT_VECBASE + MCFINT_UART2, + }, + { }, +}; + +static struct platform_device m532x_uart = { + .name = "mcfuart", + .id = 0, + .dev.platform_data = m532x_uart_platform, +}; + +static struct platform_device *m532x_devices[] __initdata = { + &m532x_uart, +}; + +/***************************************************************************/ + +static void __init m532x_uart_init_line(int line, int irq) +{ + if (line == 0) { + MCF_INTC0_ICR26 = 0x3; + MCF_INTC0_CIMR = 26; + /* GPIO initialization */ + MCF_GPIO_PAR_UART |= 0x000F; + } else if (line == 1) { + MCF_INTC0_ICR27 = 0x3; + MCF_INTC0_CIMR = 27; + /* GPIO initialization */ + MCF_GPIO_PAR_UART |= 0x0FF0; + } else if (line == 2) { + MCF_INTC0_ICR28 = 0x3; + MCF_INTC0_CIMR = 28; + } +} + +static void __init m532x_uarts_init(void) +{ + const int nrlines = ARRAY_SIZE(m532x_uart_platform); + int line; + + for (line = 0; (line < nrlines); line++) + m532x_uart_init_line(line, m532x_uart_platform[line].irq); +} /***************************************************************************/ @@ -66,21 +116,7 @@ void mcf_settimericr(unsigned int timer, unsigned int level) /***************************************************************************/ -int mcf_timerirqpending(int timer) -{ - unsigned int imr = 0; - - switch (timer) { - case 1: imr = 0x1; break; - case 2: imr = 0x2; break; - default: break; - } - return (mcf_getiprh() & imr); -} - -/***************************************************************************/ - -void config_BSP(char *commandp, int size) +void __init config_BSP(char *commandp, int size) { mcf_setimr(MCFSIM_IMR_MASKALL); @@ -99,7 +135,7 @@ void config_BSP(char *commandp, int size) mcf_profilevector = 64+33; mach_reset = coldfire_reset; -#ifdef MCF_BDM_DISABLE +#ifdef CONFIG_BDM_DISABLE /* * Disable the BDM clocking. This also turns off most of the rest of * the BDM device. This is good for EMC reasons. This option is not @@ -110,9 +146,19 @@ void config_BSP(char *commandp, int size) } /***************************************************************************/ -/* Board initialization */ -/********************************************************************/ +static int __init init_BSP(void) +{ + m532x_uarts_init(); + platform_add_devices(m532x_devices, ARRAY_SIZE(m532x_devices)); + return 0; +} + +arch_initcall(init_BSP); + +/***************************************************************************/ +/* Board initialization */ +/***************************************************************************/ /* * PLL min/max specifications */ diff --git a/arch/m68knommu/platform/5407/config.c b/arch/m68knommu/platform/5407/config.c index 2d3b62eba7ca..648b8b778211 100644 --- a/arch/m68knommu/platform/5407/config.c +++ b/arch/m68knommu/platform/5407/config.c @@ -13,11 +13,11 @@ #include <linux/param.h> #include <linux/init.h> #include <linux/interrupt.h> -#include <asm/dma.h> +#include <linux/io.h> #include <asm/machdep.h> #include <asm/coldfire.h> #include <asm/mcfsim.h> -#include <asm/mcfdma.h> +#include <asm/mcfuart.h> /***************************************************************************/ @@ -29,17 +29,51 @@ extern unsigned int mcf_timerlevel; /***************************************************************************/ -/* - * DMA channel base address table. - */ -unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { - MCF_MBAR + MCFDMA_BASE0, - MCF_MBAR + MCFDMA_BASE1, - MCF_MBAR + MCFDMA_BASE2, - MCF_MBAR + MCFDMA_BASE3, +static struct mcf_platform_uart m5407_uart_platform[] = { + { + .mapbase = MCF_MBAR + MCFUART_BASE1, + .irq = 73, + }, + { + .mapbase = MCF_MBAR + MCFUART_BASE2, + .irq = 74, + }, + { }, +}; + +static struct platform_device m5407_uart = { + .name = "mcfuart", + .id = 0, + .dev.platform_data = m5407_uart_platform, }; -unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; +static struct platform_device *m5407_devices[] __initdata = { + &m5407_uart, +}; + +/***************************************************************************/ + +static void __init m5407_uart_init_line(int line, int irq) +{ + if (line == 0) { + writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); + writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); + mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1); + } else if (line == 1) { + writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); + writeb(irq, MCFUART_BASE2 + MCFUART_UIVR); + mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2); + } +} + +static void __init m5407_uarts_init(void) +{ + const int nrlines = ARRAY_SIZE(m5407_uart_platform); + int line; + + for (line = 0; (line < nrlines); line++) + m5407_uart_init_line(line, m5407_uart_platform[line].irq); +} /***************************************************************************/ @@ -76,21 +110,7 @@ void mcf_settimericr(unsigned int timer, unsigned int level) /***************************************************************************/ -int mcf_timerirqpending(int timer) -{ - unsigned int imr = 0; - - switch (timer) { - case 1: imr = MCFSIM_IMR_TIMER1; break; - case 2: imr = MCFSIM_IMR_TIMER2; break; - default: break; - } - return (mcf_getipr() & imr); -} - -/***************************************************************************/ - -void config_BSP(char *commandp, int size) +void __init config_BSP(char *commandp, int size) { mcf_setimr(MCFSIM_IMR_MASKALL); @@ -105,3 +125,14 @@ void config_BSP(char *commandp, int size) } /***************************************************************************/ + +static int __init init_BSP(void) +{ + m5407_uarts_init(); + platform_add_devices(m5407_devices, ARRAY_SIZE(m5407_devices)); + return 0; +} + +arch_initcall(init_BSP); + +/***************************************************************************/ diff --git a/arch/m68knommu/platform/68328/timers.c b/arch/m68knommu/platform/68328/timers.c index 04cbc661d4bd..9159fd05c9ac 100644 --- a/arch/m68knommu/platform/68328/timers.c +++ b/arch/m68knommu/platform/68328/timers.c @@ -19,6 +19,7 @@ #include <linux/mm.h> #include <linux/interrupt.h> #include <linux/irq.h> +#include <linux/clocksource.h> #include <asm/setup.h> #include <asm/system.h> #include <asm/pgtable.h> @@ -51,6 +52,19 @@ #define TICKS_PER_JIFFY 10 #endif +static u32 m68328_tick_cnt; + +/***************************************************************************/ + +static irqreturn_t hw_tick(int irq, void *dummy) +{ + /* Reset Timer1 */ + TSTAT &= 0; + + m68328_tick_cnt += TICKS_PER_JIFFY; + return arch_timer_interrupt(irq, dummy); +} + /***************************************************************************/ static irqreturn_t hw_tick(int irq, void *dummy) @@ -69,6 +83,33 @@ static struct irqaction m68328_timer_irq = { .handler = hw_tick, }; +/***************************************************************************/ + +static cycle_t m68328_read_clk(void) +{ + unsigned long flags; + u32 cycles; + + local_irq_save(flags); + cycles = m68328_tick_cnt + TCN; + local_irq_restore(flags); + + return cycles; +} + +/***************************************************************************/ + +static struct clocksource m68328_clk = { + .name = "timer", + .rating = 250, + .read = m68328_read_clk, + .shift = 20, + .mask = CLOCKSOURCE_MASK(32), + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; + +/***************************************************************************/ + void hw_timer_init(void) { /* disable timer 1 */ @@ -84,19 +125,8 @@ void hw_timer_init(void) /* Enable timer 1 */ TCTL |= TCTL_TEN; -} - -/***************************************************************************/ - -unsigned long hw_timer_offset(void) -{ - unsigned long ticks = TCN, offset = 0; - - /* check for pending interrupt */ - if (ticks < (TICKS_PER_JIFFY >> 1) && (ISR & (1 << TMR_IRQ_NUM))) - offset = 1000000 / HZ; - ticks = (ticks * 1000000 / HZ) / TICKS_PER_JIFFY; - return ticks + offset; + m68328_clk.mult = clocksource_hz2mult(TICKS_PER_JIFFY*HZ, m68328_clk.shift); + clocksource_register(&m68328_clk); } /***************************************************************************/ diff --git a/arch/m68knommu/platform/68360/config.c b/arch/m68knommu/platform/68360/config.c index 2b3196af811f..ac629fa30099 100644 --- a/arch/m68knommu/platform/68360/config.c +++ b/arch/m68knommu/platform/68360/config.c @@ -103,11 +103,6 @@ void hw_timer_init(void) pquicc->timer_tgcr = tgcr_save; } -unsigned long hw_timer_offset(void) -{ - return 0; -} - void BSP_gettod (int *yearp, int *monp, int *dayp, int *hourp, int *minp, int *secp) { diff --git a/arch/m68knommu/platform/coldfire/Makefile b/arch/m68knommu/platform/coldfire/Makefile new file mode 100644 index 000000000000..e5fff297ae01 --- /dev/null +++ b/arch/m68knommu/platform/coldfire/Makefile @@ -0,0 +1,32 @@ +# +# Makefile for the m68knommu kernel. +# + +# +# If you want to play with the HW breakpoints then you will +# need to add define this, which will give you a stack backtrace +# on the console port whenever a DBG interrupt occurs. You have to +# set up you HW breakpoints to trigger a DBG interrupt: +# +# EXTRA_CFLAGS += -DTRAP_DBG_INTERRUPT +# EXTRA_AFLAGS += -DTRAP_DBG_INTERRUPT +# + +ifdef CONFIG_FULLDEBUG +AFLAGS += -DDEBUGGER_COMPATIBLE_CACHE=1 +endif + +obj-$(CONFIG_COLDFIRE) += dma.o entry.o vectors.o +obj-$(CONFIG_M5206) += timers.o +obj-$(CONFIG_M5206e) += timers.o +obj-$(CONFIG_M520x) += pit.o +obj-$(CONFIG_M523x) += pit.o +obj-$(CONFIG_M5249) += timers.o +obj-$(CONFIG_M527x) += pit.o +obj-$(CONFIG_M5272) += timers.o +obj-$(CONFIG_M528x) += pit.o +obj-$(CONFIG_M5307) += timers.o +obj-$(CONFIG_M532x) += timers.o +obj-$(CONFIG_M5407) += timers.o + +extra-y := head.o diff --git a/arch/m68knommu/platform/coldfire/dma.c b/arch/m68knommu/platform/coldfire/dma.c new file mode 100644 index 000000000000..2b30cf1b8f77 --- /dev/null +++ b/arch/m68knommu/platform/coldfire/dma.c @@ -0,0 +1,39 @@ +/***************************************************************************/ + +/* + * dma.c -- Freescale ColdFire DMA support + * + * Copyright (C) 2007, Greg Ungerer (gerg@snapgear.com) + */ + +/***************************************************************************/ + +#include <linux/kernel.h> +#include <asm/dma.h> +#include <asm/coldfire.h> +#include <asm/mcfsim.h> +#include <asm/mcfdma.h> + +/***************************************************************************/ + +/* + * DMA channel base address table. + */ +unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { +#ifdef MCFDMA_BASE0 + MCF_MBAR + MCFDMA_BASE0, +#endif +#ifdef MCFDMA_BASE1 + MCF_MBAR + MCFDMA_BASE1, +#endif +#ifdef MCFDMA_BASE2 + MCF_MBAR + MCFDMA_BASE2, +#endif +#ifdef MCFDMA_BASE3 + MCF_MBAR + MCFDMA_BASE3, +#endif +}; + +unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; + +/***************************************************************************/ diff --git a/arch/m68knommu/platform/5307/entry.S b/arch/m68knommu/platform/coldfire/entry.S index b333731b875a..b333731b875a 100644 --- a/arch/m68knommu/platform/5307/entry.S +++ b/arch/m68knommu/platform/coldfire/entry.S diff --git a/arch/m68knommu/platform/5307/head.S b/arch/m68knommu/platform/coldfire/head.S index b9aa0ca29bfb..b9aa0ca29bfb 100644 --- a/arch/m68knommu/platform/5307/head.S +++ b/arch/m68knommu/platform/coldfire/head.S diff --git a/arch/m68knommu/platform/5307/pit.c b/arch/m68knommu/platform/coldfire/pit.c index 173b754d1cda..4290638012e0 100644 --- a/arch/m68knommu/platform/5307/pit.c +++ b/arch/m68knommu/platform/coldfire/pit.c @@ -3,9 +3,10 @@ /* * pit.c -- Freescale ColdFire PIT timer. Currently this type of * hardware timer only exists in the Freescale ColdFire - * 5270/5271, 5282 and other CPUs. + * 5270/5271, 5282 and 5208 CPUs. No doubt newer ColdFire + * family members will probably use it too. * - * Copyright (C) 1999-2007, Greg Ungerer (gerg@snapgear.com) + * Copyright (C) 1999-2008, Greg Ungerer (gerg@snapgear.com) * Copyright (C) 2001-2004, SnapGear Inc. (www.snapgear.com) */ @@ -17,6 +18,7 @@ #include <linux/init.h> #include <linux/interrupt.h> #include <linux/irq.h> +#include <linux/clocksource.h> #include <asm/machdep.h> #include <asm/io.h> #include <asm/coldfire.h> @@ -28,70 +30,84 @@ /* * By default use timer1 as the system clock timer. */ +#define FREQ ((MCF_CLK / 2) / 64) #define TA(a) (MCF_IPSBAR + MCFPIT_BASE1 + (a)) +#define INTC0 (MCF_IPSBAR + MCFICM_INTC0) + +static u32 pit_cycles_per_jiffy; +static u32 pit_cnt; /***************************************************************************/ -static irqreturn_t hw_tick(int irq, void *dummy) +static irqreturn_t pit_tick(int irq, void *dummy) { - unsigned short pcsr; + u16 pcsr; /* Reset the ColdFire timer */ pcsr = __raw_readw(TA(MCFPIT_PCSR)); __raw_writew(pcsr | MCFPIT_PCSR_PIF, TA(MCFPIT_PCSR)); + pit_cnt += pit_cycles_per_jiffy; return arch_timer_interrupt(irq, dummy); } /***************************************************************************/ -static struct irqaction coldfire_pit_irq = { +static struct irqaction pit_irq = { .name = "timer", .flags = IRQF_DISABLED | IRQF_TIMER, - .handler = hw_tick, + .handler = pit_tick, }; -void hw_timer_init(void) +/***************************************************************************/ + +static cycle_t pit_read_clk(void) { - volatile unsigned char *icrp; - volatile unsigned long *imrp; + unsigned long flags; + u32 cycles; + u16 pcntr; - setup_irq(MCFINT_VECBASE + MCFINT_PIT1, &coldfire_pit_irq); + local_irq_save(flags); + pcntr = __raw_readw(TA(MCFPIT_PCNTR)); + cycles = pit_cnt; + local_irq_restore(flags); - icrp = (volatile unsigned char *) (MCF_IPSBAR + MCFICM_INTC0 + - MCFINTC_ICR0 + MCFINT_PIT1); - *icrp = ICR_INTRCONF; + return cycles + pit_cycles_per_jiffy - pcntr; +} - imrp = (volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFPIT_IMR); - *imrp &= ~MCFPIT_IMR_IBIT; +/***************************************************************************/ - /* Set up PIT timer 1 as poll clock */ - __raw_writew(MCFPIT_PCSR_DISABLE, TA(MCFPIT_PCSR)); - __raw_writew(((MCF_CLK / 2) / 64) / HZ, TA(MCFPIT_PMR)); - __raw_writew(MCFPIT_PCSR_EN | MCFPIT_PCSR_PIE | MCFPIT_PCSR_OVW | - MCFPIT_PCSR_RLD | MCFPIT_PCSR_CLK64, TA(MCFPIT_PCSR)); -} +static struct clocksource pit_clk = { + .name = "pit", + .rating = 250, + .read = pit_read_clk, + .shift = 20, + .mask = CLOCKSOURCE_MASK(32), + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; /***************************************************************************/ -unsigned long hw_timer_offset(void) +void hw_timer_init(void) { - volatile unsigned long *ipr; - unsigned long pmr, pcntr, offset; + u32 imr; - ipr = (volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFPIT_IMR); + setup_irq(MCFINT_VECBASE + MCFINT_PIT1, &pit_irq); - pmr = __raw_readw(TA(MCFPIT_PMR)); - pcntr = __raw_readw(TA(MCFPIT_PCNTR)); + __raw_writeb(ICR_INTRCONF, INTC0 + MCFINTC_ICR0 + MCFINT_PIT1); + imr = __raw_readl(INTC0 + MCFPIT_IMR); + imr &= ~MCFPIT_IMR_IBIT; + __raw_writel(imr, INTC0 + MCFPIT_IMR); + + /* Set up PIT timer 1 as poll clock */ + pit_cycles_per_jiffy = FREQ / HZ; + __raw_writew(MCFPIT_PCSR_DISABLE, TA(MCFPIT_PCSR)); + __raw_writew(pit_cycles_per_jiffy, TA(MCFPIT_PMR)); + __raw_writew(MCFPIT_PCSR_EN | MCFPIT_PCSR_PIE | MCFPIT_PCSR_OVW | + MCFPIT_PCSR_RLD | MCFPIT_PCSR_CLK64, TA(MCFPIT_PCSR)); - /* - * If we are still in the first half of the upcount and a - * timer interrupt is pending, then add on a ticks worth of time. - */ - offset = ((pmr - pcntr) * (1000000 / HZ)) / pmr; - if ((offset < (1000000 / HZ / 2)) && (*ipr & MCFPIT_IMR_IBIT)) - offset += 1000000 / HZ; - return offset; + pit_clk.mult = clocksource_hz2mult(FREQ, pit_clk.shift); + clocksource_register(&pit_clk); } /***************************************************************************/ diff --git a/arch/m68knommu/platform/5307/timers.c b/arch/m68knommu/platform/coldfire/timers.c index 489dec85c859..a60213e877ef 100644 --- a/arch/m68knommu/platform/5307/timers.c +++ b/arch/m68knommu/platform/coldfire/timers.c @@ -3,7 +3,7 @@ /* * timers.c -- generic ColdFire hardware timer support. * - * Copyright (C) 1999-2007, Greg Ungerer (gerg@snapgear.com) + * Copyright (C) 1999-2008, Greg Ungerer <gerg@snapgear.com> */ /***************************************************************************/ @@ -13,6 +13,8 @@ #include <linux/sched.h> #include <linux/interrupt.h> #include <linux/irq.h> +#include <linux/profile.h> +#include <linux/clocksource.h> #include <asm/io.h> #include <asm/traps.h> #include <asm/machdep.h> @@ -25,6 +27,7 @@ /* * By default use timer1 as the system clock timer. */ +#define FREQ (MCF_BUSCLK / 16) #define TA(a) (MCF_MBAR + MCFTIMER_BASE1 + (a)) /* @@ -41,7 +44,7 @@ unsigned int mcf_timerlevel = 5; * Unfortunately it is a little different on each ColdFire. */ extern void mcf_settimericr(int timer, int level); -extern int mcf_timerirqpending(int timer); +void coldfire_profile_init(void); #if defined(CONFIG_M532x) #define __raw_readtrr __raw_readl @@ -51,38 +54,70 @@ extern int mcf_timerirqpending(int timer); #define __raw_writetrr __raw_writew #endif +static u32 mcftmr_cycles_per_jiffy; +static u32 mcftmr_cnt; + /***************************************************************************/ -static irqreturn_t hw_tick(int irq, void *dummy) +static irqreturn_t mcftmr_tick(int irq, void *dummy) { /* Reset the ColdFire timer */ __raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, TA(MCFTIMER_TER)); + mcftmr_cnt += mcftmr_cycles_per_jiffy; return arch_timer_interrupt(irq, dummy); } /***************************************************************************/ -static struct irqaction coldfire_timer_irq = { +static struct irqaction mcftmr_timer_irq = { .name = "timer", .flags = IRQF_DISABLED | IRQF_TIMER, - .handler = hw_tick, + .handler = mcftmr_tick, }; /***************************************************************************/ -static int ticks_per_intr; +static cycle_t mcftmr_read_clk(void) +{ + unsigned long flags; + u32 cycles; + u16 tcn; + + local_irq_save(flags); + tcn = __raw_readw(TA(MCFTIMER_TCN)); + cycles = mcftmr_cnt; + local_irq_restore(flags); + + return cycles + tcn; +} + +/***************************************************************************/ + +static struct clocksource mcftmr_clk = { + .name = "tmr", + .rating = 250, + .read = mcftmr_read_clk, + .shift = 20, + .mask = CLOCKSOURCE_MASK(32), + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; + +/***************************************************************************/ void hw_timer_init(void) { - setup_irq(mcf_timervector, &coldfire_timer_irq); + setup_irq(mcf_timervector, &mcftmr_timer_irq); __raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR)); - ticks_per_intr = (MCF_BUSCLK / 16) / HZ; - __raw_writetrr(ticks_per_intr - 1, TA(MCFTIMER_TRR)); + mcftmr_cycles_per_jiffy = FREQ / HZ; + __raw_writetrr(mcftmr_cycles_per_jiffy, TA(MCFTIMER_TRR)); __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 | MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, TA(MCFTIMER_TMR)); + mcftmr_clk.mult = clocksource_hz2mult(FREQ, mcftmr_clk.shift); + clocksource_register(&mcftmr_clk); + mcf_settimericr(1, mcf_timerlevel); #ifdef CONFIG_HIGHPROFILE @@ -91,21 +126,6 @@ void hw_timer_init(void) } /***************************************************************************/ - -unsigned long hw_timer_offset(void) -{ - unsigned long tcn, offset; - - tcn = __raw_readw(TA(MCFTIMER_TCN)); - offset = ((tcn + 1) * (1000000 / HZ)) / ticks_per_intr; - - /* Check if we just wrapped the counters and maybe missed a tick */ - if ((offset < (1000000 / HZ / 2)) && mcf_timerirqpending(1)) - offset += 1000000 / HZ; - return offset; -} - -/***************************************************************************/ #ifdef CONFIG_HIGHPROFILE /***************************************************************************/ diff --git a/arch/m68knommu/platform/5307/vectors.c b/arch/m68knommu/platform/coldfire/vectors.c index 6cf894620234..6cf894620234 100644 --- a/arch/m68knommu/platform/5307/vectors.c +++ b/arch/m68knommu/platform/coldfire/vectors.c |
