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-rw-r--r--arch/arm/mach-davinci/devices-da8xx.c110
-rw-r--r--arch/arm/mach-davinci/dm355.c21
-rw-r--r--arch/arm/mach-davinci/dm365.c25
-rw-r--r--arch/arm/mach-davinci/dm644x.c21
-rw-r--r--arch/arm/mach-davinci/dm646x.c27
5 files changed, 74 insertions, 130 deletions
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 29e08aac8294..9ae049ae816a 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -147,150 +147,114 @@ static s8 da850_queue_priority_mapping[][2] = {
{-1, -1}
};
-static struct edma_soc_info da830_edma_cc0_info = {
+static struct edma_soc_info da8xx_edma0_pdata = {
.queue_priority_mapping = da8xx_queue_priority_mapping,
.default_queue = EVENTQ_1,
};
-static struct edma_soc_info *da830_edma_info[EDMA_MAX_CC] = {
- &da830_edma_cc0_info,
+static struct edma_soc_info da850_edma1_pdata = {
+ .queue_priority_mapping = da850_queue_priority_mapping,
+ .default_queue = EVENTQ_0,
};
-static struct edma_soc_info da850_edma_cc_info[] = {
+static struct resource da8xx_edma0_resources[] = {
{
- .queue_priority_mapping = da8xx_queue_priority_mapping,
- .default_queue = EVENTQ_1,
- },
- {
- .queue_priority_mapping = da850_queue_priority_mapping,
- .default_queue = EVENTQ_0,
- },
-};
-
-static struct edma_soc_info *da850_edma_info[EDMA_MAX_CC] = {
- &da850_edma_cc_info[0],
- &da850_edma_cc_info[1],
-};
-
-static struct resource da830_edma_resources[] = {
- {
- .name = "edma_cc0",
+ .name = "edma3_cc",
.start = DA8XX_TPCC_BASE,
.end = DA8XX_TPCC_BASE + SZ_32K - 1,
.flags = IORESOURCE_MEM,
},
{
- .name = "edma_tc0",
+ .name = "edma3_tc0",
.start = DA8XX_TPTC0_BASE,
.end = DA8XX_TPTC0_BASE + SZ_1K - 1,
.flags = IORESOURCE_MEM,
},
{
- .name = "edma_tc1",
+ .name = "edma3_tc1",
.start = DA8XX_TPTC1_BASE,
.end = DA8XX_TPTC1_BASE + SZ_1K - 1,
.flags = IORESOURCE_MEM,
},
{
- .name = "edma0",
+ .name = "edma3_ccint",
.start = IRQ_DA8XX_CCINT0,
.flags = IORESOURCE_IRQ,
},
{
- .name = "edma0_err",
+ .name = "edma3_ccerrint",
.start = IRQ_DA8XX_CCERRINT,
.flags = IORESOURCE_IRQ,
},
};
-static struct resource da850_edma_resources[] = {
- {
- .name = "edma_cc0",
- .start = DA8XX_TPCC_BASE,
- .end = DA8XX_TPCC_BASE + SZ_32K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "edma_tc0",
- .start = DA8XX_TPTC0_BASE,
- .end = DA8XX_TPTC0_BASE + SZ_1K - 1,
- .flags = IORESOURCE_MEM,
- },
+static struct resource da850_edma1_resources[] = {
{
- .name = "edma_tc1",
- .start = DA8XX_TPTC1_BASE,
- .end = DA8XX_TPTC1_BASE + SZ_1K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "edma_cc1",
+ .name = "edma3_cc",
.start = DA850_TPCC1_BASE,
.end = DA850_TPCC1_BASE + SZ_32K - 1,
.flags = IORESOURCE_MEM,
},
{
- .name = "edma_tc2",
+ .name = "edma3_tc0",
.start = DA850_TPTC2_BASE,
.end = DA850_TPTC2_BASE + SZ_1K - 1,
.flags = IORESOURCE_MEM,
},
{
- .name = "edma0",
- .start = IRQ_DA8XX_CCINT0,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "edma0_err",
- .start = IRQ_DA8XX_CCERRINT,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "edma1",
+ .name = "edma3_ccint",
.start = IRQ_DA850_CCINT1,
.flags = IORESOURCE_IRQ,
},
{
- .name = "edma1_err",
+ .name = "edma3_ccerrint",
.start = IRQ_DA850_CCERRINT1,
.flags = IORESOURCE_IRQ,
},
};
-static struct platform_device da830_edma_device = {
+static struct platform_device da8xx_edma0_device = {
.name = "edma",
- .id = -1,
+ .id = 0,
.dev = {
- .platform_data = da830_edma_info,
+ .platform_data = &da8xx_edma0_pdata,
},
- .num_resources = ARRAY_SIZE(da830_edma_resources),
- .resource = da830_edma_resources,
+ .num_resources = ARRAY_SIZE(da8xx_edma0_resources),
+ .resource = da8xx_edma0_resources,
};
-static struct platform_device da850_edma_device = {
+static struct platform_device da850_edma1_device = {
.name = "edma",
- .id = -1,
+ .id = 1,
.dev = {
- .platform_data = da850_edma_info,
+ .platform_data = &da850_edma1_pdata,
},
- .num_resources = ARRAY_SIZE(da850_edma_resources),
- .resource = da850_edma_resources,
+ .num_resources = ARRAY_SIZE(da850_edma1_resources),
+ .resource = da850_edma1_resources,
};
int __init da830_register_edma(struct edma_rsv_info *rsv)
{
- da830_edma_cc0_info.rsv = rsv;
+ da8xx_edma0_pdata.rsv = rsv;
- return platform_device_register(&da830_edma_device);
+ return platform_device_register(&da8xx_edma0_device);
}
int __init da850_register_edma(struct edma_rsv_info *rsv[2])
{
+ int ret;
+
if (rsv) {
- da850_edma_cc_info[0].rsv = rsv[0];
- da850_edma_cc_info[1].rsv = rsv[1];
+ da8xx_edma0_pdata.rsv = rsv[0];
+ da850_edma1_pdata.rsv = rsv[1];
}
- return platform_device_register(&da850_edma_device);
+ ret = platform_device_register(&da8xx_edma0_device);
+ if (ret) {
+ pr_warn("%s: Failed to register eDMA0\n", __func__);
+ return ret;
+ }
+ return platform_device_register(&da850_edma1_device);
}
static struct resource da8xx_i2c_resources0[] = {
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 567dc56fe8cd..a50bb9c66952 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -569,49 +569,44 @@ static u8 dm355_default_priorities[DAVINCI_N_AINTC_IRQ] = {
/*----------------------------------------------------------------------*/
-static s8
-queue_priority_mapping[][2] = {
+static s8 queue_priority_mapping[][2] = {
/* {event queue no, Priority} */
{0, 3},
{1, 7},
{-1, -1},
};
-static struct edma_soc_info edma_cc0_info = {
+static struct edma_soc_info dm355_edma_pdata = {
.queue_priority_mapping = queue_priority_mapping,
.default_queue = EVENTQ_1,
};
-static struct edma_soc_info *dm355_edma_info[EDMA_MAX_CC] = {
- &edma_cc0_info,
-};
-
static struct resource edma_resources[] = {
{
- .name = "edma_cc0",
+ .name = "edma3_cc",
.start = 0x01c00000,
.end = 0x01c00000 + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
{
- .name = "edma_tc0",
+ .name = "edma3_tc0",
.start = 0x01c10000,
.end = 0x01c10000 + SZ_1K - 1,
.flags = IORESOURCE_MEM,
},
{
- .name = "edma_tc1",
+ .name = "edma3_tc1",
.start = 0x01c10400,
.end = 0x01c10400 + SZ_1K - 1,
.flags = IORESOURCE_MEM,
},
{
- .name = "edma0",
+ .name = "edma3_ccint",
.start = IRQ_CCINT0,
.flags = IORESOURCE_IRQ,
},
{
- .name = "edma0_err",
+ .name = "edma3_ccerrint",
.start = IRQ_CCERRINT,
.flags = IORESOURCE_IRQ,
},
@@ -621,7 +616,7 @@ static struct resource edma_resources[] = {
static struct platform_device dm355_edma_device = {
.name = "edma",
.id = 0,
- .dev.platform_data = dm355_edma_info,
+ .dev.platform_data = &dm355_edma_pdata,
.num_resources = ARRAY_SIZE(edma_resources),
.resource = edma_resources,
};
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 6a890a8486d0..2068cbeaeb03 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -853,8 +853,7 @@ static u8 dm365_default_priorities[DAVINCI_N_AINTC_IRQ] = {
};
/* Four Transfer Controllers on DM365 */
-static s8
-dm365_queue_priority_mapping[][2] = {
+static s8 dm365_queue_priority_mapping[][2] = {
/* {event queue no, Priority} */
{0, 7},
{1, 7},
@@ -863,53 +862,49 @@ dm365_queue_priority_mapping[][2] = {
{-1, -1},
};
-static struct edma_soc_info edma_cc0_info = {
+static struct edma_soc_info dm365_edma_pdata = {
.queue_priority_mapping = dm365_queue_priority_mapping,
.default_queue = EVENTQ_3,
};
-static struct edma_soc_info *dm365_edma_info[EDMA_MAX_CC] = {
- &edma_cc0_info,
-};
-
static struct resource edma_resources[] = {
{
- .name = "edma_cc0",
+ .name = "edma3_cc",
.start = 0x01c00000,
.end = 0x01c00000 + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
{
- .name = "edma_tc0",
+ .name = "edma3_tc0",
.start = 0x01c10000,
.end = 0x01c10000 + SZ_1K - 1,
.flags = IORESOURCE_MEM,
},
{
- .name = "edma_tc1",
+ .name = "edma3_tc1",
.start = 0x01c10400,
.end = 0x01c10400 + SZ_1K - 1,
.flags = IORESOURCE_MEM,
},
{
- .name = "edma_tc2",
+ .name = "edma3_tc2",
.start = 0x01c10800,
.end = 0x01c10800 + SZ_1K - 1,
.flags = IORESOURCE_MEM,
},
{
- .name = "edma_tc3",
+ .name = "edma3_tc3",
.start = 0x01c10c00,
.end = 0x01c10c00 + SZ_1K - 1,
.flags = IORESOURCE_MEM,
},
{
- .name = "edma0",
+ .name = "edma3_ccint",
.start = IRQ_CCINT0,
.flags = IORESOURCE_IRQ,
},
{
- .name = "edma0_err",
+ .name = "edma3_ccerrint",
.start = IRQ_CCERRINT,
.flags = IORESOURCE_IRQ,
},
@@ -919,7 +914,7 @@ static struct resource edma_resources[] = {
static struct platform_device dm365_edma_device = {
.name = "edma",
.id = 0,
- .dev.platform_data = dm365_edma_info,
+ .dev.platform_data = &dm365_edma_pdata,
.num_resources = ARRAY_SIZE(edma_resources),
.resource = edma_resources,
};
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index dc52657909c4..d759ca8e58e8 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -498,49 +498,44 @@ static u8 dm644x_default_priorities[DAVINCI_N_AINTC_IRQ] = {
/*----------------------------------------------------------------------*/
-static s8
-queue_priority_mapping[][2] = {
+static s8 queue_priority_mapping[][2] = {
/* {event queue no, Priority} */
{0, 3},
{1, 7},
{-1, -1},
};
-static struct edma_soc_info edma_cc0_info = {
+static struct edma_soc_info dm644x_edma_pdata = {
.queue_priority_mapping = queue_priority_mapping,
.default_queue = EVENTQ_1,
};
-static struct edma_soc_info *dm644x_edma_info[EDMA_MAX_CC] = {
- &edma_cc0_info,
-};
-
static struct resource edma_resources[] = {
{
- .name = "edma_cc0",
+ .name = "edma3_cc",
.start = 0x01c00000,
.end = 0x01c00000 + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
{
- .name = "edma_tc0",
+ .name = "edma3_tc0",
.start = 0x01c10000,
.end = 0x01c10000 + SZ_1K - 1,
.flags = IORESOURCE_MEM,
},
{
- .name = "edma_tc1",
+ .name = "edma3_tc1",
.start = 0x01c10400,
.end = 0x01c10400 + SZ_1K - 1,
.flags = IORESOURCE_MEM,
},
{
- .name = "edma0",
+ .name = "edma3_ccint",
.start = IRQ_CCINT0,
.flags = IORESOURCE_IRQ,
},
{
- .name = "edma0_err",
+ .name = "edma3_ccerrint",
.start = IRQ_CCERRINT,
.flags = IORESOURCE_IRQ,
},
@@ -550,7 +545,7 @@ static struct resource edma_resources[] = {
static struct platform_device dm644x_edma_device = {
.name = "edma",
.id = 0,
- .dev.platform_data = dm644x_edma_info,
+ .dev.platform_data = &dm644x_edma_pdata,
.num_resources = ARRAY_SIZE(edma_resources),
.resource = edma_resources,
};
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 3f842bb266d6..219ebc8f674a 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -531,8 +531,7 @@ static u8 dm646x_default_priorities[DAVINCI_N_AINTC_IRQ] = {
/*----------------------------------------------------------------------*/
/* Four Transfer Controllers on DM646x */
-static s8
-dm646x_queue_priority_mapping[][2] = {
+static s8 dm646x_queue_priority_mapping[][2] = {
/* {event queue no, Priority} */
{0, 4},
{1, 0},
@@ -541,53 +540,49 @@ dm646x_queue_priority_mapping[][2] = {
{-1, -1},
};
-static struct edma_soc_info edma_cc0_info = {
+static struct edma_soc_info dm646x_edma_pdata = {
.queue_priority_mapping = dm646x_queue_priority_mapping,
.default_queue = EVENTQ_1,
};
-static struct edma_soc_info *dm646x_edma_info[EDMA_MAX_CC] = {
- &edma_cc0_info,
-};
-
static struct resource edma_resources[] = {
{
- .name = "edma_cc0",
+ .name = "edma3_cc",
.start = 0x01c00000,
.end = 0x01c00000 + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
{
- .name = "edma_tc0",
+ .name = "edma3_tc0",
.start = 0x01c10000,
.end = 0x01c10000 + SZ_1K - 1,
.flags = IORESOURCE_MEM,
},
{
- .name = "edma_tc1",
+ .name = "edma3_tc1",
.start = 0x01c10400,
.end = 0x01c10400 + SZ_1K - 1,
.flags = IORESOURCE_MEM,
},
{
- .name = "edma_tc2",
+ .name = "edma3_tc2",
.start = 0x01c10800,
.end = 0x01c10800 + SZ_1K - 1,
.flags = IORESOURCE_MEM,
},
{
- .name = "edma_tc3",
+ .name = "edma3_tc3",
.start = 0x01c10c00,
.end = 0x01c10c00 + SZ_1K - 1,
.flags = IORESOURCE_MEM,
},
{
- .name = "edma0",
+ .name = "edma3_ccint",
.start = IRQ_CCINT0,
.flags = IORESOURCE_IRQ,
},
{
- .name = "edma0_err",
+ .name = "edma3_ccerrint",
.start = IRQ_CCERRINT,
.flags = IORESOURCE_IRQ,
},
@@ -597,7 +592,7 @@ static struct resource edma_resources[] = {
static struct platform_device dm646x_edma_device = {
.name = "edma",
.id = 0,
- .dev.platform_data = dm646x_edma_info,
+ .dev.platform_data = &dm646x_edma_pdata,
.num_resources = ARRAY_SIZE(edma_resources),
.resource = edma_resources,
};
@@ -936,7 +931,7 @@ void dm646x_setup_vpif(struct vpif_display_config *display_config,
int __init dm646x_init_edma(struct edma_rsv_info *rsv)
{
- edma_cc0_info.rsv = rsv;
+ dm646x_edma_pdata.rsv = rsv;
return platform_device_register(&dm646x_edma_device);
}
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