diff options
Diffstat (limited to 'arch/arm/mach-bcmring/csp/chipc/chipcHw_reset.c')
| -rw-r--r-- | arch/arm/mach-bcmring/csp/chipc/chipcHw_reset.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/arch/arm/mach-bcmring/csp/chipc/chipcHw_reset.c b/arch/arm/mach-bcmring/csp/chipc/chipcHw_reset.c index 74d2b023dcec..f95ce913fa1e 100644 --- a/arch/arm/mach-bcmring/csp/chipc/chipcHw_reset.c +++ b/arch/arm/mach-bcmring/csp/chipc/chipcHw_reset.c @@ -50,15 +50,16 @@ void chipcHw_reset(uint32_t mask) chipcHw_softReset(chipcHw_REG_SOFT_RESET_CHIP_SOFT); } /* Bypass the PLL clocks before reboot */ - pChipcHw->UARTClock |= chipcHw_REG_PLL_CLOCK_BYPASS_SELECT; - pChipcHw->SPIClock |= chipcHw_REG_PLL_CLOCK_BYPASS_SELECT; + writel(readl(&pChipcHw->UARTClock) | chipcHw_REG_PLL_CLOCK_BYPASS_SELECT, + &pChipcHw->UARTClock); + writel(readl(&pChipcHw->SPIClock) | chipcHw_REG_PLL_CLOCK_BYPASS_SELECT, + &pChipcHw->SPIClock); /* Copy the chipcHw_warmReset_run_from_aram function into ARAM */ do { - ((uint32_t *) MM_IO_BASE_ARAM)[i] = - ((uint32_t *) &chipcHw_reset_run_from_aram)[i]; + writel(((uint32_t *) &chipcHw_reset_run_from_aram)[i], ((uint32_t __iomem *) MM_IO_BASE_ARAM) + i); i++; - } while (((uint32_t *) MM_IO_BASE_ARAM)[i - 1] != 0xe1a0f00f); /* 0xe1a0f00f == asm ("mov r15, r15"); */ + } while (readl(((uint32_t __iomem*) MM_IO_BASE_ARAM) + i - 1) != 0xe1a0f00f); /* 0xe1a0f00f == asm ("mov r15, r15"); */ flush_cache_all(); |
