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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2013-06-12 14:24:12 +0200
committerJiri Kosina <jkosina@suse.cz>2013-06-18 13:38:34 +0200
commit37074c5a1b9979d05b9effc7634385fc0fa7ccc4 (patch)
treecf5aaa115e0cc7a318a109024de07c9f53f54258 /kernel/irq/generic-chip.c
parentadc88ffc405c080956cd9af0538e294ff1368999 (diff)
downloadtalos-obmc-linux-37074c5a1b9979d05b9effc7634385fc0fa7ccc4.tar.gz
talos-obmc-linux-37074c5a1b9979d05b9effc7634385fc0fa7ccc4.zip
irq/generic-chip: fix a few kernel-doc entries
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'kernel/irq/generic-chip.c')
-rw-r--r--kernel/irq/generic-chip.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/kernel/irq/generic-chip.c b/kernel/irq/generic-chip.c
index c89295a8f668..b34e7267b817 100644
--- a/kernel/irq/generic-chip.c
+++ b/kernel/irq/generic-chip.c
@@ -48,7 +48,7 @@ void irq_gc_mask_disable_reg(struct irq_data *d)
}
/**
- * irq_gc_mask_set_mask_bit - Mask chip via setting bit in mask register
+ * irq_gc_mask_set_bit - Mask irq via setting bit in mask register
* @d: irq_data
*
* Chip has a single mask register. Values of this register are cached
@@ -66,7 +66,7 @@ void irq_gc_mask_set_bit(struct irq_data *d)
}
/**
- * irq_gc_mask_set_mask_bit - Mask chip via clearing bit in mask register
+ * irq_gc_mask_clr_bit - Mask chip via clearing bit in mask register
* @d: irq_data
*
* Chip has a single mask register. Values of this register are cached
@@ -130,7 +130,7 @@ void irq_gc_ack_clr_bit(struct irq_data *d)
}
/**
- * irq_gc_mask_disable_reg_and_ack- Mask and ack pending interrupt
+ * irq_gc_mask_disable_reg_and_ack - Mask and ack pending interrupt
* @d: irq_data
*/
void irq_gc_mask_disable_reg_and_ack(struct irq_data *d)
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