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authorThierry Reding <treding@nvidia.com>2017-03-29 18:34:52 +0200
committerThierry Reding <treding@nvidia.com>2017-06-13 15:23:29 +0200
commite7149a7a3fc4ee6785f17961738f40ce1266d8d0 (patch)
tree5d5576d2113537bf01fd81b0db75e1d8b77fb3ee /include/soc
parent52b8b80395835c3012bf79fc9d5a1dd82a2d922a (diff)
downloadtalos-obmc-linux-e7149a7a3fc4ee6785f17961738f40ce1266d8d0.tar.gz
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soc/tegra: bpmp: Implement generic PM domains
The BPMP firmware, found on Tegra186 and later, provides an ABI that can be used to enable and disable power to several power partitions in Tegra SoCs. The ABI allows for enumeration of the available power partitions, so the driver can be reused on future generations, provided the BPMP ABI remains stable. Based on work by Stefan Kristiansson <stefank@nvidia.com> and Mikko Perttunen <mperttunen@nvidia.com>. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'include/soc')
-rw-r--r--include/soc/tegra/bpmp.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/include/soc/tegra/bpmp.h b/include/soc/tegra/bpmp.h
index 13dcd44e91bb..9ba65222bd3f 100644
--- a/include/soc/tegra/bpmp.h
+++ b/include/soc/tegra/bpmp.h
@@ -15,6 +15,7 @@
#define __SOC_TEGRA_BPMP_H
#include <linux/mailbox_client.h>
+#include <linux/pm_domain.h>
#include <linux/reset-controller.h>
#include <linux/semaphore.h>
#include <linux/types.h>
@@ -91,6 +92,8 @@ struct tegra_bpmp {
unsigned int num_clocks;
struct reset_controller_dev rstc;
+
+ struct genpd_onecell_data genpd;
};
struct tegra_bpmp *tegra_bpmp_get(struct device *dev);
@@ -138,4 +141,13 @@ static inline int tegra_bpmp_init_resets(struct tegra_bpmp *bpmp)
}
#endif
+#if IS_ENABLED(CONFIG_SOC_TEGRA_POWERGATE_BPMP)
+int tegra_bpmp_init_powergates(struct tegra_bpmp *bpmp);
+#else
+static inline int tegra_bpmp_init_powergates(struct tegra_bpmp *bpmp)
+{
+ return 0;
+}
+#endif
+
#endif /* __SOC_TEGRA_BPMP_H */
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