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author | Linus Torvalds <torvalds@linux-foundation.org> | 2017-02-22 10:33:53 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2017-02-22 10:33:53 -0800 |
commit | a4ee7bacd6c08479d56738456c07e4f32fc8e523 (patch) | |
tree | 0cb4621dcb8a9b0895eff0596df2cd026c239248 /include/soc | |
parent | 38705613b74ab090eee55c327cd0cb77fb10eb26 (diff) | |
parent | 8ba605b607b7278548c1092b2ac36381627f0839 (diff) | |
download | talos-obmc-linux-a4ee7bacd6c08479d56738456c07e4f32fc8e523.tar.gz talos-obmc-linux-a4ee7bacd6c08479d56738456c07e4f32fc8e523.zip |
Merge tag 'arc-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
Pull ARC updates from Vineet Gupta:
- Intc imporvements [Yuriy]
- VDK platform updates [Alexey]
* tag 'arc-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc:
ARC: [plat-*] ARC_HAS_COH_CACHES no longer relevant
ARCv2: intc: Delete useless comments in Device Trees
ARCv2: IDU-intc: Delete deprecated parameters in Device Trees
ARCv2: IDU-intc: mask all common interrupts by default
ARCv2: IDU-intc: Use build registers for getting numbers of interrupts
ARCv2: intc: Set default priority for all core interrupts
ARCv2: intc: Use runtime value of irq count for setting up intc
ARCv2: intc: Rework the build time irq count information
ARC: [intc-*]: confine NR_CPU_IRQS to intc code
ARCv2: intc: Use ARC_REG_STATUS32 for addressing STATUS32 reg
arc: vdk: Add support of UIO
arc: vdk: Add support of MMC controller
arc: vdk: Disable halt on reset
Diffstat (limited to 'include/soc')
-rw-r--r-- | include/soc/arc/mcip.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/include/soc/arc/mcip.h b/include/soc/arc/mcip.h index 4b6b489a8d7c..c2d1b15da136 100644 --- a/include/soc/arc/mcip.h +++ b/include/soc/arc/mcip.h @@ -14,6 +14,7 @@ #include <soc/arc/aux.h> #define ARC_REG_MCIP_BCR 0x0d0 +#define ARC_REG_MCIP_IDU_BCR 0x0D5 #define ARC_REG_MCIP_CMD 0x600 #define ARC_REG_MCIP_WDATA 0x601 #define ARC_REG_MCIP_READBACK 0x602 @@ -69,6 +70,22 @@ struct mcip_bcr { #endif }; +struct mcip_idu_bcr { +#ifdef CONFIG_CPU_BIG_ENDIAN + unsigned int pad:21, cirqnum:3, ver:8; +#else + unsigned int ver:8, cirqnum:3, pad:21; +#endif +}; + + +/* + * Build register for IDU contains not an actual number of supported common + * interrupts but an exponent of 2 which must be multiplied by 4 to + * get a number of supported common interrupts. + */ +#define mcip_idu_bcr_to_nr_irqs(bcr) (4 * (1 << (bcr).cirqnum)) + /* * MCIP programming model * |