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authorMark Brown <broonie@linaro.org>2014-01-28 20:17:03 +0000
committerMark Brown <broonie@linaro.org>2014-02-04 20:31:33 +0000
commit3a2eba9bd0a6447dfbc01635e4cd0689f5f2bdad (patch)
tree642ccd6b3b125435d4e6efa2dce51e2ccb34c485 /include/linux
parent3700c6eb1e41a898c35c8dd4d5b10dc65fdaf486 (diff)
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spi: Provide core support for full duplex devices
It is fairly common for SPI devices to require that one or both transfer directions is always active. Currently drivers open code this in various ways with varying degrees of efficiency. Start factoring this out by providing flags SPI_MASTER_MUST_TX and SPI_MASTER_MUST_RX. These will cause the core to provide buffers for the requested direction if none are specified in the underlying transfer. Currently this is fairly inefficient since we actually allocate a data buffer which may get large, support for mapping transfers using a scatterlist will allow us to avoid this for DMA based transfers. Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/spi/spi.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index b354dcbed55b..31a5b0ee93ec 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -347,6 +347,8 @@ struct spi_master {
#define SPI_MASTER_HALF_DUPLEX BIT(0) /* can't do full duplex */
#define SPI_MASTER_NO_RX BIT(1) /* can't do buffer read */
#define SPI_MASTER_NO_TX BIT(2) /* can't do buffer write */
+#define SPI_MASTER_MUST_RX BIT(3) /* requires rx */
+#define SPI_MASTER_MUST_TX BIT(4) /* requires tx */
/* lock and mutex for SPI bus locking */
spinlock_t bus_lock_spinlock;
@@ -443,6 +445,10 @@ struct spi_master {
/* DMA channels for use with core dmaengine helpers */
struct dma_chan *dma_tx;
struct dma_chan *dma_rx;
+
+ /* dummy data for full duplex devices */
+ void *dummy_rx;
+ void *dummy_tx;
};
static inline void *spi_master_get_devdata(struct spi_master *master)
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