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author | David S. Miller <davem@davemloft.net> | 2014-11-13 15:16:28 -0500 |
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committer | David S. Miller <davem@davemloft.net> | 2014-11-13 15:16:28 -0500 |
commit | 64bb7e9949c03bff9463c40bfa740f611fb5500d (patch) | |
tree | 6a4651e46bf83c8b6c2404ca1e0890c23511b81b /include/linux | |
parent | 9cf5476bfda3c2f1d5712d7bf09b3dad91fc2f2d (diff) | |
parent | de966c5928026b100a989c8cef761d306310a184 (diff) | |
download | talos-obmc-linux-64bb7e9949c03bff9463c40bfa740f611fb5500d.tar.gz talos-obmc-linux-64bb7e9949c03bff9463c40bfa740f611fb5500d.zip |
Merge branch 'mlx4-next'
Or Gerlitz says:
====================
mlx4: Flexible (asymmetric) allocation of EQs and MSI-X vectors
This series from Matan Barak is built as follows:
The 1st two patches fix small bugs w.r.t firmware spec. Next
are two patches which do more re-factoring of the init/fini flow
and a patch that adds support for the QUERY_FUNC firmware command,
these are all pre-steps for the major patch of the series. In this
patch (#6) we change the order of talking/querying the firmware
and enabling SRIOV. This allows to remote worst-case assumption
w.r.t the number of available MSI-X vectors and EQs per function.
The last patch easily enjoys this ordering change, to enable
supports > 64 VFs over a firmware that allows for that.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/linux')
-rw-r--r-- | include/linux/mlx4/device.h | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h index 3d9bff00f24a..cf09e65c2901 100644 --- a/include/linux/mlx4/device.h +++ b/include/linux/mlx4/device.h @@ -95,7 +95,7 @@ enum { enum { MLX4_MAX_NUM_PF = 16, - MLX4_MAX_NUM_VF = 64, + MLX4_MAX_NUM_VF = 126, MLX4_MAX_NUM_VF_P_PORT = 64, MLX4_MFUNC_MAX = 80, MLX4_MAX_EQ_NUM = 1024, @@ -189,7 +189,9 @@ enum { MLX4_DEV_CAP_FLAG2_EQE_STRIDE = 1LL << 13, MLX4_DEV_CAP_FLAG2_ETH_PROT_CTRL = 1LL << 14, MLX4_DEV_CAP_FLAG2_ETH_BACKPL_AN_REP = 1LL << 15, - MLX4_DEV_CAP_FLAG2_CONFIG_DEV = 1LL << 16 + MLX4_DEV_CAP_FLAG2_CONFIG_DEV = 1LL << 16, + MLX4_DEV_CAP_FLAG2_SYS_EQS = 1LL << 17, + MLX4_DEV_CAP_FLAG2_80_VFS = 1LL << 18 }; enum { @@ -443,6 +445,7 @@ struct mlx4_caps { int num_cqs; int max_cqes; int reserved_cqs; + int num_sys_eqs; int num_eqs; int reserved_eqs; int num_comp_vectors; |