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| author | Andre Przywara <andre.przywara@arm.com> | 2014-06-03 10:26:03 +0200 |
|---|---|---|
| committer | Christoffer Dall <christoffer.dall@linaro.org> | 2015-01-20 18:25:32 +0100 |
| commit | b5d84ff600a244b655bd4f657f5350f29b0ce611 (patch) | |
| tree | dfbb1d876f6f4254f99c741170b886cc6a0d928a /include/kvm | |
| parent | 6d52f35af10cf24d59b43f3fd8c938ad23cab543 (diff) | |
| download | talos-obmc-linux-b5d84ff600a244b655bd4f657f5350f29b0ce611.tar.gz talos-obmc-linux-b5d84ff600a244b655bd4f657f5350f29b0ce611.zip | |
arm/arm64: KVM: enable kernel side of GICv3 emulation
With all the necessary GICv3 emulation code in place, we can now
connect the code to the GICv3 backend in the kernel.
The LR register handling is different depending on the emulated GIC
model, so provide different implementations for each.
Also allow non-v2-compatible GICv3 implementations (which don't
provide MMIO regions for the virtual CPU interface in the DT), but
restrict those hosts to support GICv3 guests only.
If the device tree provides a GICv2 compatible GICV resource entry,
but that one is faulty, just disable the GICv2 emulation and let the
user use at least the GICv3 emulation for guests.
To provide proper support for the legacy KVM_CREATE_IRQCHIP ioctl,
note virtual GICv2 compatibility in struct vgic_params and use it
on creating a VGICv2.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Diffstat (limited to 'include/kvm')
| -rw-r--r-- | include/kvm/arm_vgic.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h index b9b2e05a39ef..39039d5f09a8 100644 --- a/include/kvm/arm_vgic.h +++ b/include/kvm/arm_vgic.h @@ -134,6 +134,8 @@ struct vgic_params { /* Virtual control interface base address */ void __iomem *vctrl_base; int max_gic_vcpus; + /* Only needed for the legacy KVM_CREATE_IRQCHIP */ + bool can_emulate_gicv2; }; struct vgic_vm_ops { |
