diff options
author | Martin Schwidefsky <schwidefsky@de.ibm.com> | 2006-09-28 16:56:43 +0200 |
---|---|---|
committer | Martin Schwidefsky <schwidefsky@de.ibm.com> | 2006-09-28 16:56:43 +0200 |
commit | 94c12cc7d196bab34aaa98d38521549fa1e5ef76 (patch) | |
tree | 8e0cec0ed44445d74a2cb5160303d6b4dfb1bc31 /include/asm-s390/rwsem.h | |
parent | 25d83cbfaa44e1b9170c0941c3ef52ca39f54ccc (diff) | |
download | talos-obmc-linux-94c12cc7d196bab34aaa98d38521549fa1e5ef76.tar.gz talos-obmc-linux-94c12cc7d196bab34aaa98d38521549fa1e5ef76.zip |
[S390] Inline assembly cleanup.
Major cleanup of all s390 inline assemblies. They now have a common
coding style. Quite a few have been shortened, mainly by using register
asm variables. Use of the EX_TABLE macro helps as well. The atomic ops,
bit ops and locking inlines new use the Q-constraint if a newer gcc
is used. That results in slightly better code.
Thanks to Christian Borntraeger for proof reading the changes.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'include/asm-s390/rwsem.h')
-rw-r--r-- | include/asm-s390/rwsem.h | 238 |
1 files changed, 119 insertions, 119 deletions
diff --git a/include/asm-s390/rwsem.h b/include/asm-s390/rwsem.h index 13ec16965150..90f4eccaa290 100644 --- a/include/asm-s390/rwsem.h +++ b/include/asm-s390/rwsem.h @@ -122,23 +122,23 @@ static inline void __down_read(struct rw_semaphore *sem) { signed long old, new; - __asm__ __volatile__( + asm volatile( #ifndef __s390x__ - " l %0,0(%3)\n" - "0: lr %1,%0\n" - " ahi %1,%5\n" - " cs %0,%1,0(%3)\n" - " jl 0b" + " l %0,0(%3)\n" + "0: lr %1,%0\n" + " ahi %1,%5\n" + " cs %0,%1,0(%3)\n" + " jl 0b" #else /* __s390x__ */ - " lg %0,0(%3)\n" - "0: lgr %1,%0\n" - " aghi %1,%5\n" - " csg %0,%1,0(%3)\n" - " jl 0b" + " lg %0,0(%3)\n" + "0: lgr %1,%0\n" + " aghi %1,%5\n" + " csg %0,%1,0(%3)\n" + " jl 0b" #endif /* __s390x__ */ - : "=&d" (old), "=&d" (new), "=m" (sem->count) + : "=&d" (old), "=&d" (new), "=m" (sem->count) : "a" (&sem->count), "m" (sem->count), - "i" (RWSEM_ACTIVE_READ_BIAS) : "cc", "memory" ); + "i" (RWSEM_ACTIVE_READ_BIAS) : "cc", "memory"); if (old < 0) rwsem_down_read_failed(sem); } @@ -150,27 +150,27 @@ static inline int __down_read_trylock(struct rw_semaphore *sem) { signed long old, new; - __asm__ __volatile__( + asm volatile( #ifndef __s390x__ - " l %0,0(%3)\n" - "0: ltr %1,%0\n" - " jm 1f\n" - " ahi %1,%5\n" - " cs %0,%1,0(%3)\n" - " jl 0b\n" + " l %0,0(%3)\n" + "0: ltr %1,%0\n" + " jm 1f\n" + " ahi %1,%5\n" + " cs %0,%1,0(%3)\n" + " jl 0b\n" "1:" #else /* __s390x__ */ - " lg %0,0(%3)\n" - "0: ltgr %1,%0\n" - " jm 1f\n" - " aghi %1,%5\n" - " csg %0,%1,0(%3)\n" - " jl 0b\n" + " lg %0,0(%3)\n" + "0: ltgr %1,%0\n" + " jm 1f\n" + " aghi %1,%5\n" + " csg %0,%1,0(%3)\n" + " jl 0b\n" "1:" #endif /* __s390x__ */ - : "=&d" (old), "=&d" (new), "=m" (sem->count) + : "=&d" (old), "=&d" (new), "=m" (sem->count) : "a" (&sem->count), "m" (sem->count), - "i" (RWSEM_ACTIVE_READ_BIAS) : "cc", "memory" ); + "i" (RWSEM_ACTIVE_READ_BIAS) : "cc", "memory"); return old >= 0 ? 1 : 0; } @@ -182,23 +182,23 @@ static inline void __down_write_nested(struct rw_semaphore *sem, int subclass) signed long old, new, tmp; tmp = RWSEM_ACTIVE_WRITE_BIAS; - __asm__ __volatile__( + asm volatile( #ifndef __s390x__ - " l %0,0(%3)\n" - "0: lr %1,%0\n" - " a %1,%5\n" - " cs %0,%1,0(%3)\n" - " jl 0b" + " l %0,0(%3)\n" + "0: lr %1,%0\n" + " a %1,%5\n" + " cs %0,%1,0(%3)\n" + " jl 0b" #else /* __s390x__ */ - " lg %0,0(%3)\n" - "0: lgr %1,%0\n" - " ag %1,%5\n" - " csg %0,%1,0(%3)\n" - " jl 0b" + " lg %0,0(%3)\n" + "0: lgr %1,%0\n" + " ag %1,%5\n" + " csg %0,%1,0(%3)\n" + " jl 0b" #endif /* __s390x__ */ - : "=&d" (old), "=&d" (new), "=m" (sem->count) + : "=&d" (old), "=&d" (new), "=m" (sem->count) : "a" (&sem->count), "m" (sem->count), "m" (tmp) - : "cc", "memory" ); + : "cc", "memory"); if (old != 0) rwsem_down_write_failed(sem); } @@ -215,24 +215,24 @@ static inline int __down_write_trylock(struct rw_semaphore *sem) { signed long old; - __asm__ __volatile__( + asm volatile( #ifndef __s390x__ - " l %0,0(%2)\n" - "0: ltr %0,%0\n" - " jnz 1f\n" - " cs %0,%4,0(%2)\n" - " jl 0b\n" + " l %0,0(%2)\n" + "0: ltr %0,%0\n" + " jnz 1f\n" + " cs %0,%4,0(%2)\n" + " jl 0b\n" #else /* __s390x__ */ - " lg %0,0(%2)\n" - "0: ltgr %0,%0\n" - " jnz 1f\n" - " csg %0,%4,0(%2)\n" - " jl 0b\n" + " lg %0,0(%2)\n" + "0: ltgr %0,%0\n" + " jnz 1f\n" + " csg %0,%4,0(%2)\n" + " jl 0b\n" #endif /* __s390x__ */ "1:" - : "=&d" (old), "=m" (sem->count) + : "=&d" (old), "=m" (sem->count) : "a" (&sem->count), "m" (sem->count), - "d" (RWSEM_ACTIVE_WRITE_BIAS) : "cc", "memory" ); + "d" (RWSEM_ACTIVE_WRITE_BIAS) : "cc", "memory"); return (old == RWSEM_UNLOCKED_VALUE) ? 1 : 0; } @@ -243,24 +243,24 @@ static inline void __up_read(struct rw_semaphore *sem) { signed long old, new; - __asm__ __volatile__( + asm volatile( #ifndef __s390x__ - " l %0,0(%3)\n" - "0: lr %1,%0\n" - " ahi %1,%5\n" - " cs %0,%1,0(%3)\n" - " jl 0b" + " l %0,0(%3)\n" + "0: lr %1,%0\n" + " ahi %1,%5\n" + " cs %0,%1,0(%3)\n" + " jl 0b" #else /* __s390x__ */ - " lg %0,0(%3)\n" - "0: lgr %1,%0\n" - " aghi %1,%5\n" - " csg %0,%1,0(%3)\n" - " jl 0b" + " lg %0,0(%3)\n" + "0: lgr %1,%0\n" + " aghi %1,%5\n" + " csg %0,%1,0(%3)\n" + " jl 0b" #endif /* __s390x__ */ - : "=&d" (old), "=&d" (new), "=m" (sem->count) + : "=&d" (old), "=&d" (new), "=m" (sem->count) : "a" (&sem->count), "m" (sem->count), "i" (-RWSEM_ACTIVE_READ_BIAS) - : "cc", "memory" ); + : "cc", "memory"); if (new < 0) if ((new & RWSEM_ACTIVE_MASK) == 0) rwsem_wake(sem); @@ -274,23 +274,23 @@ static inline void __up_write(struct rw_semaphore *sem) signed long old, new, tmp; tmp = -RWSEM_ACTIVE_WRITE_BIAS; - __asm__ __volatile__( + asm volatile( #ifndef __s390x__ - " l %0,0(%3)\n" - "0: lr %1,%0\n" - " a %1,%5\n" - " cs %0,%1,0(%3)\n" - " jl 0b" + " l %0,0(%3)\n" + "0: lr %1,%0\n" + " a %1,%5\n" + " cs %0,%1,0(%3)\n" + " jl 0b" #else /* __s390x__ */ - " lg %0,0(%3)\n" - "0: lgr %1,%0\n" - " ag %1,%5\n" - " csg %0,%1,0(%3)\n" - " jl 0b" + " lg %0,0(%3)\n" + "0: lgr %1,%0\n" + " ag %1,%5\n" + " csg %0,%1,0(%3)\n" + " jl 0b" #endif /* __s390x__ */ - : "=&d" (old), "=&d" (new), "=m" (sem->count) + : "=&d" (old), "=&d" (new), "=m" (sem->count) : "a" (&sem->count), "m" (sem->count), "m" (tmp) - : "cc", "memory" ); + : "cc", "memory"); if (new < 0) if ((new & RWSEM_ACTIVE_MASK) == 0) rwsem_wake(sem); @@ -304,23 +304,23 @@ static inline void __downgrade_write(struct rw_semaphore *sem) signed long old, new, tmp; tmp = -RWSEM_WAITING_BIAS; - __asm__ __volatile__( + asm volatile( #ifndef __s390x__ - " l %0,0(%3)\n" - "0: lr %1,%0\n" - " a %1,%5\n" - " cs %0,%1,0(%3)\n" - " jl 0b" + " l %0,0(%3)\n" + "0: lr %1,%0\n" + " a %1,%5\n" + " cs %0,%1,0(%3)\n" + " jl 0b" #else /* __s390x__ */ - " lg %0,0(%3)\n" - "0: lgr %1,%0\n" - " ag %1,%5\n" - " csg %0,%1,0(%3)\n" - " jl 0b" + " lg %0,0(%3)\n" + "0: lgr %1,%0\n" + " ag %1,%5\n" + " csg %0,%1,0(%3)\n" + " jl 0b" #endif /* __s390x__ */ - : "=&d" (old), "=&d" (new), "=m" (sem->count) + : "=&d" (old), "=&d" (new), "=m" (sem->count) : "a" (&sem->count), "m" (sem->count), "m" (tmp) - : "cc", "memory" ); + : "cc", "memory"); if (new > 1) rwsem_downgrade_wake(sem); } @@ -332,23 +332,23 @@ static inline void rwsem_atomic_add(long delta, struct rw_semaphore *sem) { signed long old, new; - __asm__ __volatile__( + asm volatile( #ifndef __s390x__ - " l %0,0(%3)\n" - "0: lr %1,%0\n" - " ar %1,%5\n" - " cs %0,%1,0(%3)\n" - " jl 0b" + " l %0,0(%3)\n" + "0: lr %1,%0\n" + " ar %1,%5\n" + " cs %0,%1,0(%3)\n" + " jl 0b" #else /* __s390x__ */ - " lg %0,0(%3)\n" - "0: lgr %1,%0\n" - " agr %1,%5\n" - " csg %0,%1,0(%3)\n" - " jl 0b" + " lg %0,0(%3)\n" + "0: lgr %1,%0\n" + " agr %1,%5\n" + " csg %0,%1,0(%3)\n" + " jl 0b" #endif /* __s390x__ */ - : "=&d" (old), "=&d" (new), "=m" (sem->count) + : "=&d" (old), "=&d" (new), "=m" (sem->count) : "a" (&sem->count), "m" (sem->count), "d" (delta) - : "cc", "memory" ); + : "cc", "memory"); } /* @@ -358,23 +358,23 @@ static inline long rwsem_atomic_update(long delta, struct rw_semaphore *sem) { signed long old, new; - __asm__ __volatile__( + asm volatile( #ifndef __s390x__ - " l %0,0(%3)\n" - "0: lr %1,%0\n" - " ar %1,%5\n" - " cs %0,%1,0(%3)\n" - " jl 0b" + " l %0,0(%3)\n" + "0: lr %1,%0\n" + " ar %1,%5\n" + " cs %0,%1,0(%3)\n" + " jl 0b" #else /* __s390x__ */ - " lg %0,0(%3)\n" - "0: lgr %1,%0\n" - " agr %1,%5\n" - " csg %0,%1,0(%3)\n" - " jl 0b" + " lg %0,0(%3)\n" + "0: lgr %1,%0\n" + " agr %1,%5\n" + " csg %0,%1,0(%3)\n" + " jl 0b" #endif /* __s390x__ */ - : "=&d" (old), "=&d" (new), "=m" (sem->count) + : "=&d" (old), "=&d" (new), "=m" (sem->count) : "a" (&sem->count), "m" (sem->count), "d" (delta) - : "cc", "memory" ); + : "cc", "memory"); return new; } |