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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-06 10:29:33 -0700
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-06 10:29:33 -0700
commitdadde13ad86bf45bc71f0663a6ce3dfe5dd4ecc5 (patch)
tree8dd0a19bc2fd65e05fe7678babbd9a95e53d727b /include/asm-mips/war.h
parent23c1fb52961bc24bd3a8078eefc49eed533b2b38 (diff)
parent4b3e975e4a06f1710693c5aa51b8f98facfa9863 (diff)
downloadtalos-obmc-linux-dadde13ad86bf45bc71f0663a6ce3dfe5dd4ecc5.tar.gz
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Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: [MIPS] Fix scheduling latency issue on 24K, 34K and 74K cores [MIPS] Add macros to encode processor revisions. [MIPS] RM7000: Enable ICACHE_REFILLS_WORKAROUND_WAR. [MIPS] SMTC: Fix cut'n'paste bug in Kconfig.debug [MIPS] Change libgcc-style functions from lib-y to obj-y [MIPS] Fix timer/performance interrupt detection [MIPS] AP/SP: Avoid triggering the 34K E125 performance issue [MIPS] 64-bit TO_PHYS_MASK macro for RM9000 processors
Diffstat (limited to 'include/asm-mips/war.h')
-rw-r--r--include/asm-mips/war.h18
1 files changed, 11 insertions, 7 deletions
diff --git a/include/asm-mips/war.h b/include/asm-mips/war.h
index 13a3502eef44..ec0eeebd8802 100644
--- a/include/asm-mips/war.h
+++ b/include/asm-mips/war.h
@@ -177,18 +177,22 @@
#endif
/*
- * The RM9000 has a bug (though PMC-Sierra opposes it being called that)
- * where invalid instructions in the same I-cache line worth of instructions
- * being fetched may case spurious exceptions.
- */
-#if defined(CONFIG_MOMENCO_JAGUAR_ATX) || defined(CONFIG_MOMENCO_OCELOT_3) || \
- defined(CONFIG_PMC_YOSEMITE) || defined(CONFIG_BASLER_EXCITE)
+ * The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
+ * opposes it being called that) where invalid instructions in the same
+ * I-cache line worth of instructions being fetched may case spurious
+ * exceptions.
+ */
+#if defined(CONFIG_BASLER_EXCITE) || defined(CONFIG_MOMENCO_JAGUAR_ATX) || \
+ defined(CONFIG_MIPS_ATLAS) || defined(CONFIG_MIPS_MALTA) || \
+ defined(CONFIG_MOMENCO_OCELOT) || defined(CONFIG_MOMENCO_OCELOT_3) || \
+ defined(CONFIG_MOMENCO_OCELOT_C) || defined(CONFIG_PMC_YOSEMITE) || \
+ defined(CONFIG_SGI_IP32) || defined(CONFIG_WR_PPMC)
#define ICACHE_REFILLS_WORKAROUND_WAR 1
#endif
/*
- * ON the R10000 upto version 2.6 (not sure about 2.7) there is a bug that
+ * On the R10000 upto version 2.6 (not sure about 2.7) there is a bug that
* may cause ll / sc and lld / scd sequences to execute non-atomically.
*/
#ifdef CONFIG_SGI_IP27
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