diff options
| author | Magnus Damm <damm@igel.co.jp> | 2009-08-06 14:28:12 +0000 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2009-08-07 03:54:52 +0900 |
| commit | 909f10de5de81668e4d0a401f3cb5ca6b8a3d20d (patch) | |
| tree | 829643f3adbc6d927e15fa55fc7afdfd83001942 /drivers/video/sh_mobile_lcdcfb.c | |
| parent | c1155e34998bc07937cdf0c9db16b6902633a255 (diff) | |
| download | talos-obmc-linux-909f10de5de81668e4d0a401f3cb5ca6b8a3d20d.tar.gz talos-obmc-linux-909f10de5de81668e4d0a401f3cb5ca6b8a3d20d.zip | |
sh: LCDC SYS bus access wait fix
Update the SuperH Mobile LCDC driver to wait for SYS bus to
become idle after reading or writing. This is needed by the
kfr2r09 board, but also fixes potential problems on other
boards making use of the LCDC in a SYS configuration.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers/video/sh_mobile_lcdcfb.c')
| -rw-r--r-- | drivers/video/sh_mobile_lcdcfb.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/video/sh_mobile_lcdcfb.c b/drivers/video/sh_mobile_lcdcfb.c index 98fb82f11611..d1eb9656ca55 100644 --- a/drivers/video/sh_mobile_lcdcfb.c +++ b/drivers/video/sh_mobile_lcdcfb.c @@ -154,6 +154,7 @@ static void lcdc_sys_write_index(void *handle, unsigned long data) lcdc_write(ch->lcdc, _LDDWD0R, data | 0x10000000); lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0)); + lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); } static void lcdc_sys_write_data(void *handle, unsigned long data) @@ -163,6 +164,7 @@ static void lcdc_sys_write_data(void *handle, unsigned long data) lcdc_write(ch->lcdc, _LDDWD0R, data | 0x11000000); lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0)); + lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); } static unsigned long lcdc_sys_read_data(void *handle) @@ -173,6 +175,7 @@ static unsigned long lcdc_sys_read_data(void *handle) lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); lcdc_write(ch->lcdc, _LDDRAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0)); udelay(1); + lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); return lcdc_read(ch->lcdc, _LDDRDR) & 0xffff; } |
