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author | Sonic Zhang <sonic.zhang@analog.com> | 2010-10-27 04:16:47 -0400 |
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committer | Greg Kroah-Hartman <gregkh@suse.de> | 2010-11-11 11:06:07 -0800 |
commit | b6100992e31e61a2f252acb8df1f65c01f0b626d (patch) | |
tree | de2ea79d29ab2db4938fbfc6f226743db1ea804b /drivers/serial | |
parent | 47c344d0bd290e04c57eefdb0a721726e53bb57e (diff) | |
download | talos-obmc-linux-b6100992e31e61a2f252acb8df1f65c01f0b626d.tar.gz talos-obmc-linux-b6100992e31e61a2f252acb8df1f65c01f0b626d.zip |
serial: bfin_5xx: always include DMA headers
On Blackfin systems, peripherals that have optional DMA support always
route their interrupts through the corresponding DMA channel -- even
when DMA is not being used. So in PIO mode, we still need to request
the DMA channel (so interrupts are delivered) which means we need to
always include the DMA header for the DMA defines/functions.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/serial')
-rw-r--r-- | drivers/serial/bfin_5xx.c | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/drivers/serial/bfin_5xx.c b/drivers/serial/bfin_5xx.c index 351cc03578eb..c8ca3b43487d 100644 --- a/drivers/serial/bfin_5xx.c +++ b/drivers/serial/bfin_5xx.c @@ -23,6 +23,7 @@ #include <linux/tty.h> #include <linux/tty_flip.h> #include <linux/serial_core.h> +#include <linux/dma-mapping.h> #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \ defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE) @@ -33,12 +34,10 @@ #include <asm/gpio.h> #include <mach/bfin_serial_5xx.h> -#ifdef CONFIG_SERIAL_BFIN_DMA -#include <linux/dma-mapping.h> +#include <asm/dma.h> #include <asm/io.h> #include <asm/irq.h> #include <asm/cacheflush.h> -#endif #ifdef CONFIG_SERIAL_BFIN_MODULE # undef CONFIG_EARLY_PRINTK @@ -688,6 +687,13 @@ static int bfin_serial_startup(struct uart_port *port) # ifdef CONFIG_BF54x { + /* + * UART2 and UART3 on BF548 share interrupt PINs and DMA + * controllers with SPORT2 and SPORT3. UART rx and tx + * interrupts are generated in PIO mode only when configure + * their peripheral mapping registers properly, which means + * request corresponding DMA channels in PIO mode as well. + */ unsigned uart_dma_ch_rx, uart_dma_ch_tx; switch (uart->port.irq) { |