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author | Andrew Jeffery <andrew@aj.id.au> | 2017-08-23 23:11:25 +0930 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2017-08-31 13:39:38 +0200 |
commit | 5241bd16c7576de3cf189e3e40b01bd4fa10f803 (patch) | |
tree | 9c8c0e39356c90dbe8251f7e859488505cb2db16 /drivers/pinctrl | |
parent | faaaba065298faeb62ea83cd3a1cc19764becab1 (diff) | |
download | talos-obmc-linux-5241bd16c7576de3cf189e3e40b01bd4fa10f803.tar.gz talos-obmc-linux-5241bd16c7576de3cf189e3e40b01bd4fa10f803.zip |
pinctrl: aspeed: Rework strap register write logic for the AST2500
Yong Li found that writes to the AST2500 strapping register were not
properly supported by the Aspeed pinctrl core and provided a patch to
rectify the problem. Several revisions of the patch were posted and
ultimately v4 should have been applied, however some unfortunate
liberal application of tags on my part lead to confusion between v3[1]
and v4[2].
Generate the diff between v3 and v4 to apply as a fixup patch.
[1] http://patchwork.ozlabs.org/patch/801662/
[2] http://patchwork.ozlabs.org/patch/802946/
Cc: Yong Li <sdliyong@gmail.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r-- | drivers/pinctrl/aspeed/pinctrl-aspeed.c | 26 |
1 files changed, 16 insertions, 10 deletions
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c index f2d5133f6993..7f13ce8450a3 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c @@ -183,7 +183,6 @@ static int aspeed_sig_expr_set(const struct aspeed_sig_expr *expr, { int ret; int i; - unsigned int rev_id; for (i = 0; i < expr->ndescs; i++) { const struct aspeed_sig_desc *desc = &expr->descs[i]; @@ -216,20 +215,27 @@ static int aspeed_sig_expr_set(const struct aspeed_sig_expr *expr, /* On AST2500, Set bits in SCU7C are cleared from SCU70 */ if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP1) { + unsigned int rev_id; + ret = regmap_read(maps[ASPEED_IP_SCU], HW_REVISION_ID, &rev_id); if (ret < 0) return ret; - if (0x04 == ((rev_id >> 24) & 0xff)) - ret = regmap_write(maps[desc->ip], - HW_REVISION_ID, (~val & desc->mask)); - else - ret = regmap_update_bits(maps[desc->ip], - desc->reg, desc->mask, val); - } else - ret = regmap_update_bits(maps[desc->ip], desc->reg, - desc->mask, val); + if (0x04 == (rev_id >> 24)) { + u32 value = ~val & desc->mask; + + if (value) { + ret = regmap_write(maps[desc->ip], + HW_REVISION_ID, value); + if (ret < 0) + return ret; + } + } + } + + ret = regmap_update_bits(maps[desc->ip], desc->reg, + desc->mask, val); if (ret) return ret; |