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| author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2014-06-05 15:26:01 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2014-06-19 09:35:11 +0200 |
| commit | 6e1c30239fe31aae6b415088c39ede7fa62b190c (patch) | |
| tree | 0ea1ae8fba1c570caf6e2e0938512fa9d3f0291a /drivers/pinctrl/sunxi | |
| parent | 645ec714545bca2a0ed13d7ac5b97d95e09da853 (diff) | |
| download | talos-obmc-linux-6e1c30239fe31aae6b415088c39ede7fa62b190c.tar.gz talos-obmc-linux-6e1c30239fe31aae6b415088c39ede7fa62b190c.zip | |
pinctrl: sunxi: Add macro definition for pinctrl with more than one interrupt
The A31 and A23, unlike the other Allwinner SoCs, have several interrupts banks
and parent interrupts, while the other only have up to 32 interrupts in a
single bank and a single parent interrupt.
Start supporting it by introducing a function macro to declare irq functions
and their banks.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/sunxi')
| -rw-r--r-- | drivers/pinctrl/sunxi/pinctrl-sunxi.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h index 8169ba598876..cb87e15b1b3c 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h @@ -77,6 +77,7 @@ struct sunxi_desc_function { const char *name; u8 muxval; + u8 irqbank; u8 irqnum; }; @@ -139,6 +140,14 @@ struct sunxi_pinctrl { .irqnum = _irq, \ } +#define SUNXI_FUNCTION_IRQ_BANK(_val, _bank, _irq) \ + { \ + .name = "irq", \ + .muxval = _val, \ + .irqbank = _bank, \ + .irqnum = _irq, \ + } + /* * The sunXi PIO registers are organized as is: * 0x00 - 0x0c Muxing values. |
