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| author | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2015-06-09 18:47:16 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2015-06-10 14:08:44 +0200 |
| commit | 691a82161b88056fa1e52145446bc22197665782 (patch) | |
| tree | 6987a5eaa765af1a11d1cca1cf5630833c87c718 /drivers/pinctrl/mvebu | |
| parent | 50a7d13d241081838c6cd12b1fdabc36838f9b4c (diff) | |
| download | talos-obmc-linux-691a82161b88056fa1e52145446bc22197665782.tar.gz talos-obmc-linux-691a82161b88056fa1e52145446bc22197665782.zip | |
pinctrl: mvebu: armada-39x: normalize ref clock naming
This commit normalizes the subnames of the reference clock MPP pins in
the Armada 39x pinctrl driver to match with the name used on other
SoCs.
Since only the subnames are changed, DT backward compatibility is not
affected.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/mvebu')
| -rw-r--r-- | drivers/pinctrl/mvebu/pinctrl-armada-39x.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-39x.c b/drivers/pinctrl/mvebu/pinctrl-armada-39x.c index 433291a1540a..08ee427d5015 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-39x.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-39x.c @@ -205,7 +205,7 @@ static struct mvebu_mpp_mode armada_39x_mpp_modes[] = { MPP_VAR_FUNCTION(5, "dev", "ad1", V_88F6920_PLUS)), MPP_MODE(35, MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS), - MPP_VAR_FUNCTION(1, "ref", "clk", V_88F6920_PLUS), + MPP_VAR_FUNCTION(1, "ref", "clk_out1", V_88F6920_PLUS), MPP_VAR_FUNCTION(5, "dev", "a1", V_88F6920_PLUS)), MPP_MODE(36, MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS), @@ -217,7 +217,7 @@ static struct mvebu_mpp_mode armada_39x_mpp_modes[] = { MPP_VAR_FUNCTION(8, "ge", "rxclk", V_88F6920_PLUS)), MPP_MODE(38, MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS), - MPP_VAR_FUNCTION(3, "ref", "clk", V_88F6920_PLUS), + MPP_VAR_FUNCTION(3, "ref", "clk_out0", V_88F6920_PLUS), MPP_VAR_FUNCTION(4, "sd0", "d0", V_88F6920_PLUS), MPP_VAR_FUNCTION(5, "dev", "ad4", V_88F6920_PLUS), MPP_VAR_FUNCTION(8, "ge", "rxd1", V_88F6920_PLUS)), @@ -263,12 +263,12 @@ static struct mvebu_mpp_mode armada_39x_mpp_modes[] = { MPP_VAR_FUNCTION(7, "led", "clk", V_88F6920_PLUS)), MPP_MODE(45, MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS), - MPP_VAR_FUNCTION(1, "ref", "clk", V_88F6920_PLUS), + MPP_VAR_FUNCTION(1, "ref", "clk_out0", V_88F6920_PLUS), MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6920_PLUS), MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6920_PLUS)), MPP_MODE(46, MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS), - MPP_VAR_FUNCTION(1, "ref", "clk", V_88F6920_PLUS), + MPP_VAR_FUNCTION(1, "ref", "clk_out1", V_88F6920_PLUS), MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6920_PLUS), MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6920_PLUS), MPP_VAR_FUNCTION(7, "led", "stb", V_88F6920_PLUS)), |
