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author | Len Brown <len.brown@intel.com> | 2005-09-03 02:44:09 -0400 |
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committer | Len Brown <len.brown@intel.com> | 2005-09-03 02:44:09 -0400 |
commit | 129521dcc94f781890f8f668219ab79f0073ff9f (patch) | |
tree | 9f70707c88da65577f38814fe37b24c4b4957d64 /drivers/pci | |
parent | 824b558bbe2c298b165cdb54c33718994dda30bb (diff) | |
parent | f505380ba7b98ec97bf25300c2a58aeae903530b (diff) | |
download | talos-obmc-linux-129521dcc94f781890f8f668219ab79f0073ff9f.tar.gz talos-obmc-linux-129521dcc94f781890f8f668219ab79f0073ff9f.zip |
Merge linux-2.6 into linux-acpi-2.6 test
Diffstat (limited to 'drivers/pci')
-rw-r--r-- | drivers/pci/rom.c | 24 | ||||
-rw-r--r-- | drivers/pci/setup-bus.c | 2 |
2 files changed, 18 insertions, 8 deletions
diff --git a/drivers/pci/rom.c b/drivers/pci/rom.c index 713c78f3a65d..49bd21702314 100644 --- a/drivers/pci/rom.c +++ b/drivers/pci/rom.c @@ -21,13 +21,21 @@ * between the ROM and other resources, so enabling it may disable access * to MMIO registers or other card memory. */ -static void pci_enable_rom(struct pci_dev *pdev) +static int pci_enable_rom(struct pci_dev *pdev) { + struct resource *res = pdev->resource + PCI_ROM_RESOURCE; + struct pci_bus_region region; u32 rom_addr; + if (!res->flags) + return -1; + + pcibios_resource_to_bus(pdev, ®ion, res); pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr); - rom_addr |= PCI_ROM_ADDRESS_ENABLE; + rom_addr &= ~PCI_ROM_ADDRESS_MASK; + rom_addr |= region.start | PCI_ROM_ADDRESS_ENABLE; pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr); + return 0; } /** @@ -71,19 +79,21 @@ void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size) } else { if (res->flags & IORESOURCE_ROM_COPY) { *size = pci_resource_len(pdev, PCI_ROM_RESOURCE); - return (void __iomem *)pci_resource_start(pdev, PCI_ROM_RESOURCE); + return (void __iomem *)pci_resource_start(pdev, + PCI_ROM_RESOURCE); } else { /* assign the ROM an address if it doesn't have one */ - if (res->parent == NULL) - pci_assign_resource(pdev, PCI_ROM_RESOURCE); - + if (res->parent == NULL && + pci_assign_resource(pdev,PCI_ROM_RESOURCE)) + return NULL; start = pci_resource_start(pdev, PCI_ROM_RESOURCE); *size = pci_resource_len(pdev, PCI_ROM_RESOURCE); if (*size == 0) return NULL; /* Enable ROM space decodes */ - pci_enable_rom(pdev); + if (pci_enable_rom(pdev)) + return NULL; } } diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 6d864c502a1f..6b0e6464eb39 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -40,7 +40,7 @@ * FIXME: IO should be max 256 bytes. However, since we may * have a P2P bridge below a cardbus bridge, we need 4K. */ -#define CARDBUS_IO_SIZE (256) +#define CARDBUS_IO_SIZE (4*1024) #define CARDBUS_MEM_SIZE (32*1024*1024) static void __devinit |