diff options
| author | Stephen Hemminger <shemminger@osdl.org> | 2005-09-23 09:08:30 -0700 |
|---|---|---|
| committer | Jeff Garzik <jgarzik@pobox.com> | 2005-09-23 19:07:12 -0400 |
| commit | c8868611389aa28e0e5e0d63f468727781eac68c (patch) | |
| tree | da07d9bb09f99cdcb058bed5117dcac998e0b8ae /drivers/net | |
| parent | 9389d79fbf9a0167ff2de87e8796c6bb803219bf (diff) | |
| download | talos-obmc-linux-c8868611389aa28e0e5e0d63f468727781eac68c.tar.gz talos-obmc-linux-c8868611389aa28e0e5e0d63f468727781eac68c.zip | |
[PATCH] skge: fix Yukon-Lite A0 workaround
This is one of those workarounds sucked over from sk98lin driver.
The skge driver needs to detect the Yukon-Lite A0 chip properly,
and turn of Rx FIFO Flush.
Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/skge.c | 22 |
1 files changed, 20 insertions, 2 deletions
diff --git a/drivers/net/skge.c b/drivers/net/skge.c index ae1996a3bc5c..fd398da4993b 100644 --- a/drivers/net/skge.c +++ b/drivers/net/skge.c @@ -1643,6 +1643,22 @@ static void yukon_reset(struct skge_hw *hw, int port) | GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA); } +/* Apparently, early versions of Yukon-Lite had wrong chip_id? */ +static int is_yukon_lite_a0(struct skge_hw *hw) +{ + u32 reg; + int ret; + + if (hw->chip_id != CHIP_ID_YUKON) + return 0; + + reg = skge_read32(hw, B2_FAR); + skge_write8(hw, B2_FAR + 3, 0xff); + ret = (skge_read8(hw, B2_FAR + 3) != 0); + skge_write32(hw, B2_FAR, reg); + return ret; +} + static void yukon_mac_init(struct skge_hw *hw, int port) { struct skge_port *skge = netdev_priv(hw->dev[port]); @@ -1758,9 +1774,11 @@ static void yukon_mac_init(struct skge_hw *hw, int port) /* Configure Rx MAC FIFO */ skge_write16(hw, SK_REG(port, RX_GMF_FL_MSK), RX_FF_FL_DEF_MSK); reg = GMF_OPER_ON | GMF_RX_F_FL_ON; - if (hw->chip_id == CHIP_ID_YUKON_LITE && - hw->chip_rev >= CHIP_REV_YU_LITE_A3) + + /* disable Rx GMAC FIFO Flush for YUKON-Lite Rev. A0 only */ + if (is_yukon_lite_a0(hw)) reg &= ~GMF_RX_F_FL_ON; + skge_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR); skge_write16(hw, SK_REG(port, RX_GMF_CTRL_T), reg); /* |
