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author | Ben Cahill <ben.m.cahill@intel.com> | 2009-10-30 14:36:08 -0700 |
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committer | John W. Linville <linville@tuxdriver.com> | 2009-11-02 15:39:45 -0500 |
commit | c72cd19fab7983e97a1a41b7158e0b9f87a7fe96 (patch) | |
tree | 848fbfa2d14143b0e3b0d40bae5dea5dd333f597 /drivers/net/wireless/iwlwifi/iwl-agn.c | |
parent | a6c5c731c3f783f60ed79dcf41efa8b5b3af2f22 (diff) | |
download | talos-obmc-linux-c72cd19fab7983e97a1a41b7158e0b9f87a7fe96.tar.gz talos-obmc-linux-c72cd19fab7983e97a1a41b7158e0b9f87a7fe96.zip |
iwlagn: Clarify FH_TX interrupt
Add/clarify comments and debug messages for interrupt used only for uCode load
Signed-off-by: Ben Cahill <ben.m.cahill@intel.com>
Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-agn.c')
-rw-r--r-- | drivers/net/wireless/iwlwifi/iwl-agn.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c index 6daaad1e4bc9..7751a75d4dc9 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn.c @@ -1033,11 +1033,12 @@ static void iwl_irq_tasklet_legacy(struct iwl_priv *priv) handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); } + /* This "Tx" DMA channel is used only for loading uCode */ if (inta & CSR_INT_BIT_FH_TX) { - IWL_DEBUG_ISR(priv, "Tx interrupt\n"); + IWL_DEBUG_ISR(priv, "uCode load interrupt\n"); priv->isr_stats.tx++; handled |= CSR_INT_BIT_FH_TX; - /* FH finished to write, send event */ + /* Wake up uCode load routine, now that load is complete */ priv->ucode_write_complete = 1; wake_up_interruptible(&priv->wait_command_queue); } @@ -1234,12 +1235,13 @@ static void iwl_irq_tasklet(struct iwl_priv *priv) iwl_leds_background(priv); } + /* This "Tx" DMA channel is used only for loading uCode */ if (inta & CSR_INT_BIT_FH_TX) { iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK); - IWL_DEBUG_ISR(priv, "Tx interrupt\n"); + IWL_DEBUG_ISR(priv, "uCode load interrupt\n"); priv->isr_stats.tx++; handled |= CSR_INT_BIT_FH_TX; - /* FH finished to write, send event */ + /* Wake up uCode load routine, now that load is complete */ priv->ucode_write_complete = 1; wake_up_interruptible(&priv->wait_command_queue); } |