diff options
| author | Mark Rustad <mark.d.rustad@intel.com> | 2015-10-27 13:23:14 -0700 |
|---|---|---|
| committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2015-12-03 02:32:12 -0800 |
| commit | efff2e027758fd5cc739d500397f729591f32a94 (patch) | |
| tree | 9fa970bb5b7da8b49c1f3902858e1a9b418eb7d0 /drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c | |
| parent | a9763f3cb54c7f1c6a47962c814935654476d09f (diff) | |
| download | talos-obmc-linux-efff2e027758fd5cc739d500397f729591f32a94.tar.gz talos-obmc-linux-efff2e027758fd5cc739d500397f729591f32a94.zip | |
ixgbe: Correct spec violations by waiting after reset
The ixgbe driver was violating the specification in the datasheet
by not waiting 1ms before checking for the reset bit clearing. This
is called out for devices supported by ixgbe, so implement the
required delay.
Reported-by: Dan Streetman <dan.streetman@canonical.com>
Signed-off-by: Mark Rustad <mark.d.rustad@intel.com>
Tested-by: Darin Miller <darin.j.miller@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c')
| -rw-r--r-- | drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c index c1d4584f6469..b9e9b0c17398 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c @@ -110,13 +110,14 @@ mac_reset_top: ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL); IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl); IXGBE_WRITE_FLUSH(hw); + usleep_range(1000, 1200); /* Poll for reset bit to self-clear indicating reset is complete */ for (i = 0; i < 10; i++) { - udelay(1); ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL); if (!(ctrl & IXGBE_CTRL_RST_MASK)) break; + udelay(1); } if (ctrl & IXGBE_CTRL_RST_MASK) { |
