diff options
| author | Ganesh Goudar <ganeshgr@chelsio.com> | 2018-05-23 20:02:58 +0530 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2018-05-23 16:00:56 -0400 |
| commit | 1d19023fa6f65de636901b9b7340f2f7eebb710a (patch) | |
| tree | 252e189edb5bca8f7665d95813e375206b5f4af5 /drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h | |
| parent | 5ee6ad201e6cba94e199da78a7fdece8881352b4 (diff) | |
| download | talos-obmc-linux-1d19023fa6f65de636901b9b7340f2f7eebb710a.tar.gz talos-obmc-linux-1d19023fa6f65de636901b9b7340f2f7eebb710a.zip | |
cxgb4: change the port capability bits definition
MDI Port Capabilities bit definitions were inconsistent with
regard to the MDI enum values. 2 bits used to define MDI in
the port capabilities are not really separable, it's a 2-bit
field with 4 different values. Change the port capability bit
definitions to be "AUTO" and "STRAIGHT" in order to get them
to line up with the enum's.
Signed-off-by: Casey Leedom <leedom@chelsio.com>
Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h')
| -rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h index e6b2e9549d56..2d91480a5a0e 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h +++ b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h @@ -2471,8 +2471,8 @@ enum fw_port_cap { FW_PORT_CAP_FC_RX = 0x0040, FW_PORT_CAP_FC_TX = 0x0080, FW_PORT_CAP_ANEG = 0x0100, - FW_PORT_CAP_MDIX = 0x0200, - FW_PORT_CAP_MDIAUTO = 0x0400, + FW_PORT_CAP_MDIAUTO = 0x0200, + FW_PORT_CAP_MDISTRAIGHT = 0x0400, FW_PORT_CAP_FEC_RS = 0x0800, FW_PORT_CAP_FEC_BASER_RS = 0x1000, FW_PORT_CAP_FEC_RESERVED = 0x2000, @@ -2515,8 +2515,8 @@ enum fw_port_mdi { #define FW_PORT_CAP32_802_3_PAUSE 0x00040000UL #define FW_PORT_CAP32_802_3_ASM_DIR 0x00080000UL #define FW_PORT_CAP32_ANEG 0x00100000UL -#define FW_PORT_CAP32_MDIX 0x00200000UL -#define FW_PORT_CAP32_MDIAUTO 0x00400000UL +#define FW_PORT_CAP32_MDIAUTO 0x00200000UL +#define FW_PORT_CAP32_MDISTRAIGHT 0x00400000UL #define FW_PORT_CAP32_FEC_RS 0x00800000UL #define FW_PORT_CAP32_FEC_BASER_RS 0x01000000UL #define FW_PORT_CAP32_FEC_RESERVED1 0x02000000UL |
