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authorLucas Stach <l.stach@pengutronix.de>2017-03-08 12:13:18 +0100
committerPhilipp Zabel <p.zabel@pengutronix.de>2017-03-16 10:14:39 +0100
commit92681fe7e98eb8c0a3ef6e850db399b2de192562 (patch)
tree7a8fa851b1c359d9615ecdad6f88324a05b79352 /drivers/gpu/ipu-v3
parent0d6c9a424498d7167b6c6759b58bd649e96dbf80 (diff)
downloadtalos-obmc-linux-92681fe7e98eb8c0a3ef6e850db399b2de192562.tar.gz
talos-obmc-linux-92681fe7e98eb8c0a3ef6e850db399b2de192562.zip
gpu: ipu-v3: hook up PRG unit
The i.MX6 QuadPlus IPU needs to PRG unit to gain access to the data bus. Make sure it is present and available to be used. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'drivers/gpu/ipu-v3')
-rw-r--r--drivers/gpu/ipu-v3/ipu-common.c11
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 4c8453989746..7aefccec31b1 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -939,6 +939,7 @@ static const struct of_device_id imx_ipu_dt_ids[] = {
{ .compatible = "fsl,imx51-ipu", .data = &ipu_type_imx51, },
{ .compatible = "fsl,imx53-ipu", .data = &ipu_type_imx53, },
{ .compatible = "fsl,imx6q-ipu", .data = &ipu_type_imx6q, },
+ { .compatible = "fsl,imx6qp-ipu", .data = &ipu_type_imx6q, },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, imx_ipu_dt_ids);
@@ -1398,11 +1399,19 @@ static int ipu_probe(struct platform_device *pdev)
if (!ipu)
return -ENODEV;
+ ipu->id = of_alias_get_id(np, "ipu");
+
+ if (of_device_is_compatible(np, "fsl,imx6qp-ipu")) {
+ ipu->prg_priv = ipu_prg_lookup_by_phandle(&pdev->dev,
+ "fsl,prg", ipu->id);
+ if (!ipu->prg_priv)
+ return -EPROBE_DEFER;
+ }
+
for (i = 0; i < 64; i++)
ipu->channel[i].ipu = ipu;
ipu->devtype = devtype;
ipu->ipu_type = devtype->type;
- ipu->id = of_alias_get_id(np, "ipu");
spin_lock_init(&ipu->lock);
mutex_init(&ipu->channel_lock);
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