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| author | Alex Deucher <alexdeucher@gmail.com> | 2010-02-23 03:24:38 -0500 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2010-02-25 11:38:06 +1000 |
| commit | 383be5d1789d9a7a2e77dca1cb0aca89507d069e (patch) | |
| tree | e99787c96586748c9ce78fbd10d8859c648fabc0 /drivers/gpu/drm/radeon/radeon_legacy_crtc.c | |
| parent | 939461d59d6ac4e5142f767d24810c9b4b5caa38 (diff) | |
| download | talos-obmc-linux-383be5d1789d9a7a2e77dca1cb0aca89507d069e.tar.gz talos-obmc-linux-383be5d1789d9a7a2e77dca1cb0aca89507d069e.zip | |
drm/radeon/kms: update new pll algo
- add support for pre-avivo chips
- add support for fixed post/ref dividers
- add support for non-fractional fb dividers
By default avivo chips use the new algo and
pre-avivo chips use the old algo. Use the "new_pll"
module option to toggle between them.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_legacy_crtc.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_legacy_crtc.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c index 643251719f1c..df23d6a01d02 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c @@ -703,7 +703,10 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) pll = &rdev->clock.p1pll; pll->flags = RADEON_PLL_LEGACY; - pll->algo = PLL_ALGO_LEGACY; + if (radeon_new_pll == 1) + pll->algo = PLL_ALGO_NEW; + else + pll->algo = PLL_ALGO_LEGACY; if (mode->clock > 200000) /* range limits??? */ pll->flags |= RADEON_PLL_PREFER_HIGH_FB_DIV; |
