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authorFrancisco Jerez <currojerez@riseup.net>2010-09-28 20:47:58 +0200
committerBen Skeggs <bskeggs@redhat.com>2010-10-05 09:58:43 +1000
commitcd2fb2e9e0a6a3273d353b18e4bdd21cc0482724 (patch)
tree8f356e8abe542f9f873d84a7e4d7845fd0cb2307 /drivers/gpu/drm/nouveau/nv04_tv.c
parent23357e4da0e1b39c9dfd64a1db0deafc6d70b554 (diff)
downloadtalos-obmc-linux-cd2fb2e9e0a6a3273d353b18e4bdd21cc0482724.tar.gz
talos-obmc-linux-cd2fb2e9e0a6a3273d353b18e4bdd21cc0482724.zip
drm/nv0x-nv4x: Leave the 0x40 bit untouched when changing CRE_LCD.
It's an unrelated PLL filtering control bit, leave it alone when changing the CRTC-encoder binding. Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv04_tv.c')
-rw-r--r--drivers/gpu/drm/nouveau/nv04_tv.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/gpu/drm/nouveau/nv04_tv.c b/drivers/gpu/drm/nouveau/nv04_tv.c
index c8dc8a376ad9..3eb605ddfd03 100644
--- a/drivers/gpu/drm/nouveau/nv04_tv.c
+++ b/drivers/gpu/drm/nouveau/nv04_tv.c
@@ -99,12 +99,10 @@ static void nv04_tv_bind(struct drm_device *dev, int head, bool bind)
state->tv_setup = 0;
- if (bind) {
- state->CRTC[NV_CIO_CRE_LCD__INDEX] = 0;
+ if (bind)
state->CRTC[NV_CIO_CRE_49] |= 0x10;
- } else {
+ else
state->CRTC[NV_CIO_CRE_49] &= ~0x10;
- }
NVWriteVgaCrtc(dev, head, NV_CIO_CRE_LCD__INDEX,
state->CRTC[NV_CIO_CRE_LCD__INDEX]);
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