diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2015-01-14 09:57:36 +1000 |
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committer | Ben Skeggs <bskeggs@redhat.com> | 2015-01-22 12:17:43 +1000 |
commit | 5ce3bf3c72436c49fbd9a5b71d7d278665f4bf55 (patch) | |
tree | f2aaba0aa92d945db18b68c93f53723ab4659807 /drivers/gpu/drm/nouveau/nouveau_ttm.c | |
parent | ebb58dc2ef8c62d1affa28160f57faa7b0e1dc02 (diff) | |
download | talos-obmc-linux-5ce3bf3c72436c49fbd9a5b71d7d278665f4bf55.tar.gz talos-obmc-linux-5ce3bf3c72436c49fbd9a5b71d7d278665f4bf55.zip |
drm/nouveau/mmu: rename from vmmgr (no binary change)
Switch to NVIDIA's name for the device.
The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver. This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).
Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.
A comparison of objdump disassemblies proves no code changes.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_ttm.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_ttm.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_ttm.c b/drivers/gpu/drm/nouveau/nouveau_ttm.c index 2e0d1d998ca6..aa8321706103 100644 --- a/drivers/gpu/drm/nouveau/nouveau_ttm.c +++ b/drivers/gpu/drm/nouveau/nouveau_ttm.c @@ -203,13 +203,13 @@ const struct ttm_mem_type_manager_func nouveau_gart_manager = { }; /*XXX*/ -#include <subdev/vm/nv04.h> +#include <subdev/mmu/nv04.h> static int nv04_gart_manager_init(struct ttm_mem_type_manager *man, unsigned long psize) { struct nouveau_drm *drm = nouveau_bdev(man->bdev); - struct nouveau_vmmgr *vmm = nvkm_vmmgr(&drm->device); - struct nv04_vmmgr_priv *priv = (void *)vmm; + struct nouveau_mmu *mmu = nvkm_mmu(&drm->device); + struct nv04_mmu_priv *priv = (void *)mmu; struct nouveau_vm *vm = NULL; nouveau_vm_ref(priv->vm, &vm, NULL); man->priv = vm; @@ -354,7 +354,7 @@ nouveau_ttm_init(struct nouveau_drm *drm) u32 bits; int ret; - bits = nvkm_vmmgr(&drm->device)->dma_bits; + bits = nvkm_mmu(&drm->device)->dma_bits; if (nv_device_is_pci(nvkm_device(&drm->device))) { if (drm->agp.stat == ENABLED || !pci_dma_supported(dev->pdev, DMA_BIT_MASK(bits))) @@ -401,7 +401,7 @@ nouveau_ttm_init(struct nouveau_drm *drm) /* GART init */ if (drm->agp.stat != ENABLED) { - drm->gem.gart_available = nvkm_vmmgr(&drm->device)->limit; + drm->gem.gart_available = nvkm_mmu(&drm->device)->limit; } else { drm->gem.gart_available = drm->agp.size; } |