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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-02-10 17:16:10 +0000 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-02-13 23:28:18 +0100 |
| commit | 091df6cbf248811150552d51dacb9dc1fe6b0a23 (patch) | |
| tree | 3a5cc00acb6bb8c40c72522d7aa9d6ae67395fed /drivers/gpu/drm/i915/intel_fbdev.c | |
| parent | 18c5247e1e96d657334dabd8ab611001f16a62b0 (diff) | |
| download | talos-obmc-linux-091df6cbf248811150552d51dacb9dc1fe6b0a23.tar.gz talos-obmc-linux-091df6cbf248811150552d51dacb9dc1fe6b0a23.zip | |
drm/i915: Switch intel_fb_align_height to fb format modifiers
With this we can treat the fb format modifier completely independently
from the fencing mode in obj->tiling_mode in the initial plane code.
Which means new tiling modes without any gtt fence are now fully
support in the core i915 driver code.
v2: Also add pixel_format while at it, we need this to compute the
height for the new tiling formats.
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_fbdev.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_fbdev.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c index 3001a8674611..234a699b8219 100644 --- a/drivers/gpu/drm/i915/intel_fbdev.c +++ b/drivers/gpu/drm/i915/intel_fbdev.c @@ -594,7 +594,8 @@ static bool intel_fbdev_init_bios(struct drm_device *dev, cur_size = intel_crtc->config->base.adjusted_mode.crtc_vdisplay; cur_size = intel_fb_align_height(dev, cur_size, - plane_config->tiling); + fb->base.pixel_format, + fb->base.modifier[0]); cur_size *= fb->base.pitches[0]; DRM_DEBUG_KMS("pipe %c area: %dx%d, bpp: %d, size: %d\n", pipe_name(intel_crtc->pipe), |
