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| author | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2017-06-08 08:49:58 -0700 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2017-06-08 09:55:08 -0700 |
| commit | 71851fa82f4d644f947dd60cfcf81b47640c1b51 (patch) | |
| tree | bab1632cd1288c5f5972aae6b827f7313d85a1b7 /drivers/gpu/drm/i915/i915_pci.c | |
| parent | 6b567085c1bdbacea217dd628f0dbf26dd67db3f (diff) | |
| download | talos-obmc-linux-71851fa82f4d644f947dd60cfcf81b47640c1b51.tar.gz talos-obmc-linux-71851fa82f4d644f947dd60cfcf81b47640c1b51.zip | |
drm/i915/cfl: Introduce Coffee Lake platform definition.
Coffee Lake is a Intel® Processor containing Intel® HD Graphics
following Kabylake.
It is Gen9 graphics based platform on top of CNP PCH.
Let's start by adding the platform definition based on previous
platforms but yet as preliminary_hw_support.
On following patches we will start adding PCI IDs and the
platform specific changes.
v2: Also add BS2 ring that is present on GT3. As on KBL, according
spec: "GT3 also has additional media blocks with second instance
of VEBox and VDBox each", i.e. BSD2 ring in our case. Noticed
when reviewing PCI ID patches.
v3: CFL_PLATFORM instead for CFL_FEATURES because it contains
Platform information and no new features when compared to
BDW_FEATURES definition.
v4: Rebased on top of Cannonlake patches.
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1496937000-8450-1-git-send-email-rodrigo.vivi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_pci.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_pci.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 224f5f96ff65..03a495e13b5e 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -422,6 +422,22 @@ static const struct intel_device_info intel_kabylake_gt3_info = { .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING, }; +#define CFL_PLATFORM \ + .is_alpha_support = 1, \ + BDW_FEATURES, \ + .gen = 9, \ + .platform = INTEL_COFFEELAKE, \ + .ddb_size = 896 + +static const struct intel_device_info intel_coffeelake_info = { + CFL_PLATFORM, +}; + +static const struct intel_device_info intel_coffeelake_gt3_info = { + CFL_PLATFORM, + .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING, +}; + static const struct intel_device_info intel_cannonlake_info = { BDW_FEATURES, .is_alpha_support = 1, |
