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author | Rex Zhu <Rex.Zhu@amd.com> | 2016-11-08 20:38:28 +0800 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2016-11-11 10:21:11 -0500 |
commit | 68260f340e191a67056b6c27f958f09029b9e11f (patch) | |
tree | ecb5df9f0c3c22102e83f1354f5703b346f1b335 /drivers/gpu/drm/amd/powerplay/hwmgr | |
parent | 0401eb403dad1e761734c7dc88b0f06202d4b35c (diff) | |
download | talos-obmc-linux-68260f340e191a67056b6c27f958f09029b9e11f.tar.gz talos-obmc-linux-68260f340e191a67056b6c27f958f09029b9e11f.zip |
drm/amd/powerplay: partial revert commit 01b0e7fb1.
when uvd is idle, we gate uvd clock.
and uvd is busy, we ungate uvd clock.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/hwmgr')
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c index cf2ee93d8475..a1fc4fcac1e0 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c @@ -149,7 +149,7 @@ int smu7_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate) if (bgate) { cgs_set_clockgating_state(hwmgr->device, AMD_IP_BLOCK_TYPE_UVD, - AMD_CG_STATE_UNGATE); + AMD_CG_STATE_GATE); cgs_set_powergating_state(hwmgr->device, AMD_IP_BLOCK_TYPE_UVD, AMD_PG_STATE_GATE); @@ -162,7 +162,7 @@ int smu7_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate) AMD_CG_STATE_UNGATE); cgs_set_clockgating_state(hwmgr->device, AMD_IP_BLOCK_TYPE_UVD, - AMD_CG_STATE_GATE); + AMD_CG_STATE_UNGATE); smu7_update_uvd_dpm(hwmgr, false); } |